Merge branch '7.8'
[mesa.git] / src / gallium / drivers / r300 / r300_render.c
1 /*
2 * Copyright 2009 Corbin Simpson <MostAwesomeDude@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
22
23 /* r300_render: Vertex and index buffer primitive emission. Contains both
24 * HW TCL fastpath rendering, and SW TCL Draw-assisted rendering. */
25
26 #include "draw/draw_context.h"
27 #include "draw/draw_vbuf.h"
28
29 #include "util/u_inlines.h"
30
31 #include "util/u_format.h"
32 #include "util/u_memory.h"
33 #include "util/u_upload_mgr.h"
34 #include "util/u_prim.h"
35
36 #include "r300_cs.h"
37 #include "r300_context.h"
38 #include "r300_screen_buffer.h"
39 #include "r300_emit.h"
40 #include "r300_reg.h"
41 #include "r300_render.h"
42 #include "r300_state_derived.h"
43
44 /* r300_render: Vertex and index buffer primitive emission. */
45 #define R300_MAX_VBO_SIZE (1024 * 1024)
46
47 /* XXX The DRM rejects VAP_ALT_NUM_VERTICES.. */
48 //#define ENABLE_ALT_NUM_VERTS
49
50 uint32_t r300_translate_primitive(unsigned prim)
51 {
52 switch (prim) {
53 case PIPE_PRIM_POINTS:
54 return R300_VAP_VF_CNTL__PRIM_POINTS;
55 case PIPE_PRIM_LINES:
56 return R300_VAP_VF_CNTL__PRIM_LINES;
57 case PIPE_PRIM_LINE_LOOP:
58 return R300_VAP_VF_CNTL__PRIM_LINE_LOOP;
59 case PIPE_PRIM_LINE_STRIP:
60 return R300_VAP_VF_CNTL__PRIM_LINE_STRIP;
61 case PIPE_PRIM_TRIANGLES:
62 return R300_VAP_VF_CNTL__PRIM_TRIANGLES;
63 case PIPE_PRIM_TRIANGLE_STRIP:
64 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP;
65 case PIPE_PRIM_TRIANGLE_FAN:
66 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN;
67 case PIPE_PRIM_QUADS:
68 return R300_VAP_VF_CNTL__PRIM_QUADS;
69 case PIPE_PRIM_QUAD_STRIP:
70 return R300_VAP_VF_CNTL__PRIM_QUAD_STRIP;
71 case PIPE_PRIM_POLYGON:
72 return R300_VAP_VF_CNTL__PRIM_POLYGON;
73 default:
74 return 0;
75 }
76 }
77
78 static uint32_t r300_provoking_vertex_fixes(struct r300_context *r300,
79 unsigned mode)
80 {
81 struct r300_rs_state* rs = (struct r300_rs_state*)r300->rs_state.state;
82 uint32_t color_control = rs->color_control;
83
84 /* By default (see r300_state.c:r300_create_rs_state) color_control is
85 * initialized to provoking the first vertex.
86 *
87 * Triangle fans must be reduced to the second vertex, not the first, in
88 * Gallium flatshade-first mode, as per the GL spec.
89 * (http://www.opengl.org/registry/specs/ARB/provoking_vertex.txt)
90 *
91 * Quads never provoke correctly in flatshade-first mode. The first
92 * vertex is never considered as provoking, so only the second, third,
93 * and fourth vertices can be selected, and both "third" and "last" modes
94 * select the fourth vertex. This is probably due to D3D lacking quads.
95 *
96 * Similarly, polygons reduce to the first, not the last, vertex, when in
97 * "last" mode, and all other modes start from the second vertex.
98 *
99 * ~ C.
100 */
101
102 if (rs->rs.flatshade_first) {
103 switch (mode) {
104 case PIPE_PRIM_TRIANGLE_FAN:
105 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_SECOND;
106 break;
107 case PIPE_PRIM_QUADS:
108 case PIPE_PRIM_QUAD_STRIP:
109 case PIPE_PRIM_POLYGON:
110 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
111 break;
112 default:
113 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_FIRST;
114 break;
115 }
116 } else {
117 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
118 }
119
120 return color_control;
121 }
122
123 /* Check if the requested number of dwords is available in the CS and
124 * if not, flush. Return TRUE if the flush occured. */
125 static boolean r300_reserve_cs_space(struct r300_context *r300,
126 unsigned dwords)
127 {
128 if (!r300->rws->check_cs(r300->rws, dwords)) {
129 r300->context.flush(&r300->context, 0, NULL);
130 return TRUE;
131 }
132 return FALSE;
133 }
134
135 static boolean immd_is_good_idea(struct r300_context *r300,
136 unsigned count)
137 {
138 struct pipe_vertex_element* velem;
139 struct pipe_vertex_buffer* vbuf;
140 boolean checked[PIPE_MAX_ATTRIBS] = {0};
141 unsigned vertex_element_count = r300->velems->count;
142 unsigned i, vbi;
143
144 if (count > 4) {
145 return FALSE;
146 }
147
148 /* We shouldn't map buffers referenced by CS, busy buffers,
149 * and ones placed in VRAM. */
150 /* XXX Check for VRAM buffers. */
151 for (i = 0; i < vertex_element_count; i++) {
152 velem = &r300->velems->velem[i];
153 vbi = velem->vertex_buffer_index;
154
155 if (!checked[vbi]) {
156 vbuf = &r300->vertex_buffer[vbi];
157
158 if (r300_buffer_is_referenced(r300,
159 vbuf->buffer)) {
160 /* It's a very bad idea to map it... */
161 return FALSE;
162 }
163 checked[vbi] = TRUE;
164 }
165 }
166 return TRUE;
167 }
168
169 static void r300_emit_draw_arrays_immediate(struct r300_context *r300,
170 unsigned mode,
171 unsigned start,
172 unsigned count)
173 {
174 struct pipe_vertex_element* velem;
175 struct pipe_vertex_buffer* vbuf;
176 unsigned vertex_element_count = r300->velems->count;
177 unsigned i, v, vbi, dw, elem_offset, dwords;
178
179 /* Size of the vertex, in dwords. */
180 unsigned vertex_size = 0;
181
182 /* Offsets of the attribute, in dwords, from the start of the vertex. */
183 unsigned offset[PIPE_MAX_ATTRIBS];
184
185 /* Size of the vertex element, in dwords. */
186 unsigned size[PIPE_MAX_ATTRIBS];
187
188 /* Stride to the same attrib in the next vertex in the vertex buffer,
189 * in dwords. */
190 unsigned stride[PIPE_MAX_ATTRIBS] = {0};
191
192 /* Mapped vertex buffers. */
193 uint32_t* map[PIPE_MAX_ATTRIBS] = {0};
194
195 CS_LOCALS(r300);
196
197 /* Calculate the vertex size, offsets, strides etc. and map the buffers. */
198 for (i = 0; i < vertex_element_count; i++) {
199 velem = &r300->velems->velem[i];
200 offset[i] = velem->src_offset / 4;
201 size[i] = util_format_get_blocksize(velem->src_format) / 4;
202 vertex_size += size[i];
203 vbi = velem->vertex_buffer_index;
204
205 /* Map the buffer. */
206 if (!map[vbi]) {
207 vbuf = &r300->vertex_buffer[vbi];
208 map[vbi] = (uint32_t*)pipe_buffer_map(r300->context.screen,
209 vbuf->buffer,
210 PIPE_BUFFER_USAGE_CPU_READ);
211 map[vbi] += vbuf->buffer_offset / 4;
212 stride[vbi] = vbuf->stride / 4;
213 }
214 }
215
216 dwords = 9 + count * vertex_size;
217
218 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + dwords);
219 r300_emit_buffer_validate(r300, FALSE, NULL);
220 r300_emit_dirty_state(r300);
221
222 BEGIN_CS(dwords);
223 OUT_CS_REG(R300_GA_COLOR_CONTROL,
224 r300_provoking_vertex_fixes(r300, mode));
225 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size);
226 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
227 OUT_CS(count - 1);
228 OUT_CS(0);
229 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, count * vertex_size);
230 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (count << 16) |
231 r300_translate_primitive(mode));
232
233 /* Emit vertices. */
234 for (v = 0; v < count; v++) {
235 for (i = 0; i < vertex_element_count; i++) {
236 velem = &r300->velems->velem[i];
237 vbi = velem->vertex_buffer_index;
238 elem_offset = offset[i] + stride[vbi] * (v + start);
239
240 for (dw = 0; dw < size[i]; dw++) {
241 OUT_CS(map[vbi][elem_offset + dw]);
242 }
243 }
244 }
245 END_CS;
246
247 /* Unmap buffers. */
248 for (i = 0; i < vertex_element_count; i++) {
249 vbi = r300->velems->velem[i].vertex_buffer_index;
250
251 if (map[vbi]) {
252 vbuf = &r300->vertex_buffer[vbi];
253 pipe_buffer_unmap(r300->context.screen, vbuf->buffer);
254 map[vbi] = NULL;
255 }
256 }
257 }
258
259 static void r300_emit_draw_arrays(struct r300_context *r300,
260 unsigned mode,
261 unsigned count)
262 {
263 #if defined(ENABLE_ALT_NUM_VERTS)
264 boolean alt_num_verts = count > 65535;
265 #else
266 boolean alt_num_verts = FALSE;
267 #endif
268 CS_LOCALS(r300);
269
270 if (alt_num_verts) {
271 assert(count < (1 << 24));
272 BEGIN_CS(9);
273 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count);
274 } else {
275 BEGIN_CS(7);
276 }
277 OUT_CS_REG(R300_GA_COLOR_CONTROL,
278 r300_provoking_vertex_fixes(r300, mode));
279 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
280 OUT_CS(count - 1);
281 OUT_CS(0);
282 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
283 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
284 r300_translate_primitive(mode) |
285 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
286 END_CS;
287 }
288
289 static void r300_emit_draw_elements(struct r300_context *r300,
290 struct pipe_buffer* indexBuffer,
291 unsigned indexSize,
292 unsigned minIndex,
293 unsigned maxIndex,
294 unsigned mode,
295 unsigned start,
296 unsigned count)
297 {
298 uint32_t count_dwords;
299 uint32_t offset_dwords = indexSize * start / sizeof(uint32_t);
300 #if defined(ENABLE_ALT_NUM_VERTS)
301 boolean alt_num_verts = count > 65535;
302 #else
303 boolean alt_num_verts = FALSE;
304 #endif
305 CS_LOCALS(r300);
306
307 assert((start * indexSize) % 4 == 0);
308 assert(count < (1 << 24));
309
310 maxIndex = MIN3(maxIndex, r300->vertex_buffer_max_index, count - minIndex);
311
312 DBG(r300, DBG_DRAW, "r300: Indexbuf of %u indices, min %u max %u\n",
313 count, minIndex, maxIndex);
314
315 if (alt_num_verts) {
316 BEGIN_CS(15);
317 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count);
318 } else {
319 BEGIN_CS(13);
320 }
321 OUT_CS_REG(R300_GA_COLOR_CONTROL,
322 r300_provoking_vertex_fixes(r300, mode));
323 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
324 OUT_CS(maxIndex);
325 OUT_CS(minIndex);
326 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0);
327 if (indexSize == 4) {
328 count_dwords = count;
329 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
330 R300_VAP_VF_CNTL__INDEX_SIZE_32bit |
331 r300_translate_primitive(mode) |
332 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
333 } else {
334 count_dwords = (count + 1) / 2;
335 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
336 r300_translate_primitive(mode) |
337 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
338 }
339
340 /* INDX_BUFFER is a truly special packet3.
341 * Unlike most other packet3, where the offset is after the count,
342 * the order is reversed, so the relocation ends up carrying the
343 * size of the indexbuf instead of the offset.
344 */
345 OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2);
346 OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2) |
347 (0 << R300_INDX_BUFFER_SKIP_SHIFT));
348 OUT_CS(offset_dwords << 2);
349 OUT_CS_BUF_RELOC(indexBuffer, count_dwords,
350 RADEON_GEM_DOMAIN_GTT, 0, 0);
351
352 END_CS;
353 }
354
355 static void r300_shorten_ubyte_elts(struct r300_context* r300,
356 struct pipe_buffer** elts,
357 unsigned count)
358 {
359 struct pipe_screen* screen = r300->context.screen;
360 struct pipe_buffer* new_elts;
361 unsigned char *in_map;
362 unsigned short *out_map;
363 unsigned i;
364
365 new_elts = screen->buffer_create(screen, 32,
366 PIPE_BUFFER_USAGE_INDEX |
367 PIPE_BUFFER_USAGE_CPU_WRITE |
368 PIPE_BUFFER_USAGE_GPU_READ,
369 2 * count);
370
371 in_map = pipe_buffer_map(screen, *elts, PIPE_BUFFER_USAGE_CPU_READ);
372 out_map = pipe_buffer_map(screen, new_elts, PIPE_BUFFER_USAGE_CPU_WRITE);
373
374 for (i = 0; i < count; i++) {
375 *out_map = (unsigned short)*in_map;
376 in_map++;
377 out_map++;
378 }
379
380 pipe_buffer_unmap(screen, *elts);
381 pipe_buffer_unmap(screen, new_elts);
382
383 *elts = new_elts;
384 }
385
386 /* This is the fast-path drawing & emission for HW TCL. */
387 void r300_draw_range_elements(struct pipe_context* pipe,
388 struct pipe_buffer* indexBuffer,
389 unsigned indexSize,
390 unsigned minIndex,
391 unsigned maxIndex,
392 unsigned mode,
393 unsigned start,
394 unsigned count)
395 {
396 struct r300_context* r300 = r300_context(pipe);
397 struct pipe_buffer* orgIndexBuffer = indexBuffer;
398 #if defined(ENABLE_ALT_NUM_VERTS)
399 boolean alt_num_verts = r300_screen(pipe->screen)->caps->is_r500 &&
400 count > 65536;
401 #else
402 boolean alt_num_verts = FALSE;
403 #endif
404 unsigned short_count;
405
406 if (!u_trim_pipe_prim(mode, &count)) {
407 return;
408 }
409
410 if (indexSize == 1) {
411 r300_shorten_ubyte_elts(r300, &indexBuffer, count);
412 indexSize = 2;
413 }
414
415 r300_update_derived_state(r300);
416
417 r300_upload_index_buffer(r300, &indexBuffer, indexSize, start, count);
418
419 /* 128 dwords for emit_aos and emit_draw_elements */
420 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 128);
421 r300_emit_buffer_validate(r300, TRUE, indexBuffer);
422 r300_emit_dirty_state(r300);
423 r300_emit_aos(r300, 0);
424
425 u_upload_flush(r300->upload_vb);
426 u_upload_flush(r300->upload_ib);
427 if (alt_num_verts || count <= 65535) {
428 r300_emit_draw_elements(r300, indexBuffer, indexSize, minIndex,
429 maxIndex, mode, start, count);
430 } else {
431 do {
432 short_count = MIN2(count, 65534);
433 r300_emit_draw_elements(r300, indexBuffer, indexSize, minIndex,
434 maxIndex, mode, start, short_count);
435
436 start += short_count;
437 count -= short_count;
438
439 /* 16 spare dwords are enough for emit_draw_elements. */
440 if (count && r300_reserve_cs_space(r300, 16)) {
441 r300_emit_buffer_validate(r300, TRUE, indexBuffer);
442 r300_emit_dirty_state(r300);
443 r300_emit_aos(r300, 0);
444 }
445 } while (count);
446 }
447
448 if (indexBuffer != orgIndexBuffer) {
449 pipe_buffer_reference( &indexBuffer, NULL );
450 }
451 }
452
453 /* Simple helpers for context setup. Should probably be moved to util. */
454 void r300_draw_elements(struct pipe_context* pipe,
455 struct pipe_buffer* indexBuffer,
456 unsigned indexSize, unsigned mode,
457 unsigned start, unsigned count)
458 {
459 struct r300_context *r300 = r300_context(pipe);
460
461 pipe->draw_range_elements(pipe, indexBuffer, indexSize, 0,
462 r300->vertex_buffer_max_index,
463 mode, start, count);
464 }
465
466 void r300_draw_arrays(struct pipe_context* pipe, unsigned mode,
467 unsigned start, unsigned count)
468 {
469 struct r300_context* r300 = r300_context(pipe);
470 #if defined(ENABLE_ALT_NUM_VERTS)
471 boolean alt_num_verts = r300_screen(pipe->screen)->caps->is_r500 &&
472 count > 65536;
473 #else
474 boolean alt_num_verts = FALSE;
475 #endif
476 unsigned short_count;
477
478 if (!u_trim_pipe_prim(mode, &count)) {
479 return;
480 }
481
482 r300_update_derived_state(r300);
483
484 if (immd_is_good_idea(r300, count)) {
485 r300_emit_draw_arrays_immediate(r300, mode, start, count);
486 } else {
487 /* Make sure there are at least 128 spare dwords in the command buffer.
488 * (most of it being consumed by emit_aos) */
489 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 128);
490 r300_emit_buffer_validate(r300, TRUE, NULL);
491 r300_emit_dirty_state(r300);
492
493 if (alt_num_verts || count <= 65535) {
494 r300_emit_aos(r300, start);
495 r300_emit_draw_arrays(r300, mode, count);
496 } else {
497 do {
498 short_count = MIN2(count, 65535);
499 r300_emit_aos(r300, start);
500 r300_emit_draw_arrays(r300, mode, short_count);
501
502 start += short_count;
503 count -= short_count;
504
505 /* Again, we emit both AOS and draw_arrays so there should be
506 * at least 128 spare dwords. */
507 if (count && r300_reserve_cs_space(r300, 128)) {
508 r300_emit_buffer_validate(r300, TRUE, NULL);
509 r300_emit_dirty_state(r300);
510 }
511 } while (count);
512 }
513 u_upload_flush(r300->upload_vb);
514 }
515 }
516
517 /****************************************************************************
518 * The rest of this file is for SW TCL rendering only. Please be polite and *
519 * keep these functions separated so that they are easier to locate. ~C. *
520 ***************************************************************************/
521
522 /* SW TCL arrays, using Draw. */
523 void r300_swtcl_draw_arrays(struct pipe_context* pipe,
524 unsigned mode,
525 unsigned start,
526 unsigned count)
527 {
528 struct r300_context* r300 = r300_context(pipe);
529 int i;
530
531 if (!u_trim_pipe_prim(mode, &count)) {
532 return;
533 }
534
535 for (i = 0; i < r300->vertex_buffer_count; i++) {
536 void* buf = pipe_buffer_map(pipe->screen,
537 r300->vertex_buffer[i].buffer,
538 PIPE_BUFFER_USAGE_CPU_READ);
539 draw_set_mapped_vertex_buffer(r300->draw, i, buf);
540 }
541
542 draw_set_mapped_element_buffer(r300->draw, 0, NULL);
543
544 draw_set_mapped_constant_buffer(r300->draw,
545 PIPE_SHADER_VERTEX,
546 0,
547 r300->shader_constants[PIPE_SHADER_VERTEX].constants,
548 r300->shader_constants[PIPE_SHADER_VERTEX].count *
549 (sizeof(float) * 4));
550
551 draw_arrays(r300->draw, mode, start, count);
552
553 for (i = 0; i < r300->vertex_buffer_count; i++) {
554 pipe_buffer_unmap(pipe->screen, r300->vertex_buffer[i].buffer);
555 draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
556 }
557 }
558
559 /* SW TCL elements, using Draw. */
560 void r300_swtcl_draw_range_elements(struct pipe_context* pipe,
561 struct pipe_buffer* indexBuffer,
562 unsigned indexSize,
563 unsigned minIndex,
564 unsigned maxIndex,
565 unsigned mode,
566 unsigned start,
567 unsigned count)
568 {
569 struct r300_context* r300 = r300_context(pipe);
570 int i;
571 void* indices;
572
573 if (!u_trim_pipe_prim(mode, &count)) {
574 return;
575 }
576
577 for (i = 0; i < r300->vertex_buffer_count; i++) {
578 void* buf = pipe_buffer_map(pipe->screen,
579 r300->vertex_buffer[i].buffer,
580 PIPE_BUFFER_USAGE_CPU_READ);
581 draw_set_mapped_vertex_buffer(r300->draw, i, buf);
582 }
583
584 indices = pipe_buffer_map(pipe->screen, indexBuffer,
585 PIPE_BUFFER_USAGE_CPU_READ);
586 draw_set_mapped_element_buffer_range(r300->draw, indexSize,
587 minIndex, maxIndex, indices);
588
589 draw_set_mapped_constant_buffer(r300->draw,
590 PIPE_SHADER_VERTEX,
591 0,
592 r300->shader_constants[PIPE_SHADER_VERTEX].constants,
593 r300->shader_constants[PIPE_SHADER_VERTEX].count *
594 (sizeof(float) * 4));
595
596 draw_arrays(r300->draw, mode, start, count);
597
598 for (i = 0; i < r300->vertex_buffer_count; i++) {
599 pipe_buffer_unmap(pipe->screen, r300->vertex_buffer[i].buffer);
600 draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
601 }
602
603 pipe_buffer_unmap(pipe->screen, indexBuffer);
604 draw_set_mapped_element_buffer_range(r300->draw, 0, start,
605 start + count - 1, NULL);
606 }
607
608 /* Object for rendering using Draw. */
609 struct r300_render {
610 /* Parent class */
611 struct vbuf_render base;
612
613 /* Pipe context */
614 struct r300_context* r300;
615
616 /* Vertex information */
617 size_t vertex_size;
618 unsigned prim;
619 unsigned hwprim;
620
621 /* VBO */
622 struct pipe_buffer* vbo;
623 size_t vbo_size;
624 size_t vbo_offset;
625 size_t vbo_max_used;
626 void * vbo_ptr;
627 };
628
629 static INLINE struct r300_render*
630 r300_render(struct vbuf_render* render)
631 {
632 return (struct r300_render*)render;
633 }
634
635 static const struct vertex_info*
636 r300_render_get_vertex_info(struct vbuf_render* render)
637 {
638 struct r300_render* r300render = r300_render(render);
639 struct r300_context* r300 = r300render->r300;
640
641 r300_update_derived_state(r300);
642
643 return &r300->vertex_info;
644 }
645
646 static boolean r300_render_allocate_vertices(struct vbuf_render* render,
647 ushort vertex_size,
648 ushort count)
649 {
650 struct r300_render* r300render = r300_render(render);
651 struct r300_context* r300 = r300render->r300;
652 struct pipe_screen* screen = r300->context.screen;
653 size_t size = (size_t)vertex_size * (size_t)count;
654
655 if (size + r300render->vbo_offset > r300render->vbo_size)
656 {
657 pipe_buffer_reference(&r300->vbo, NULL);
658 r300render->vbo = pipe_buffer_create(screen,
659 64,
660 PIPE_BUFFER_USAGE_VERTEX,
661 R300_MAX_VBO_SIZE);
662 r300render->vbo_offset = 0;
663 r300render->vbo_size = R300_MAX_VBO_SIZE;
664 }
665
666 r300render->vertex_size = vertex_size;
667 r300->vbo = r300render->vbo;
668 r300->vbo_offset = r300render->vbo_offset;
669
670 return (r300render->vbo) ? TRUE : FALSE;
671 }
672
673 static void* r300_render_map_vertices(struct vbuf_render* render)
674 {
675 struct r300_render* r300render = r300_render(render);
676 struct pipe_screen* screen = r300render->r300->context.screen;
677
678 r300render->vbo_ptr = pipe_buffer_map(screen, r300render->vbo,
679 PIPE_BUFFER_USAGE_CPU_WRITE);
680
681 return ((uint8_t*)r300render->vbo_ptr + r300render->vbo_offset);
682 }
683
684 static void r300_render_unmap_vertices(struct vbuf_render* render,
685 ushort min,
686 ushort max)
687 {
688 struct r300_render* r300render = r300_render(render);
689 struct pipe_screen* screen = r300render->r300->context.screen;
690 CS_LOCALS(r300render->r300);
691 BEGIN_CS(2);
692 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, max);
693 END_CS;
694
695 r300render->vbo_max_used = MAX2(r300render->vbo_max_used,
696 r300render->vertex_size * (max + 1));
697 pipe_buffer_unmap(screen, r300render->vbo);
698 }
699
700 static void r300_render_release_vertices(struct vbuf_render* render)
701 {
702 struct r300_render* r300render = r300_render(render);
703
704 r300render->vbo_offset += r300render->vbo_max_used;
705 r300render->vbo_max_used = 0;
706 }
707
708 static boolean r300_render_set_primitive(struct vbuf_render* render,
709 unsigned prim)
710 {
711 struct r300_render* r300render = r300_render(render);
712
713 r300render->prim = prim;
714 r300render->hwprim = r300_translate_primitive(prim);
715
716 return TRUE;
717 }
718
719 static void r300_render_draw_arrays(struct vbuf_render* render,
720 unsigned start,
721 unsigned count)
722 {
723 struct r300_render* r300render = r300_render(render);
724 struct r300_context* r300 = r300render->r300;
725
726 CS_LOCALS(r300);
727
728 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 2);
729 r300_emit_buffer_validate(r300, FALSE, NULL);
730 r300_emit_dirty_state(r300);
731
732 DBG(r300, DBG_DRAW, "r300: Doing vbuf render, count %d\n", count);
733
734 BEGIN_CS(2);
735 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
736 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
737 r300render->hwprim);
738 END_CS;
739 }
740
741 static void r300_render_draw(struct vbuf_render* render,
742 const ushort* indices,
743 uint count)
744 {
745 struct r300_render* r300render = r300_render(render);
746 struct r300_context* r300 = r300render->r300;
747 int i;
748 unsigned dwords = 2 + (count+1)/2;
749
750 CS_LOCALS(r300);
751
752 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + dwords);
753 r300_emit_buffer_validate(r300, FALSE, NULL);
754 r300_emit_dirty_state(r300);
755
756 BEGIN_CS(dwords);
757 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, (count+1)/2);
758 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
759 r300render->hwprim);
760 for (i = 0; i < count-1; i += 2) {
761 OUT_CS(indices[i+1] << 16 | indices[i]);
762 }
763 if (count % 2) {
764 OUT_CS(indices[count-1]);
765 }
766 END_CS;
767 }
768
769 static void r300_render_destroy(struct vbuf_render* render)
770 {
771 FREE(render);
772 }
773
774 static struct vbuf_render* r300_render_create(struct r300_context* r300)
775 {
776 struct r300_render* r300render = CALLOC_STRUCT(r300_render);
777
778 r300render->r300 = r300;
779
780 /* XXX find real numbers plz */
781 r300render->base.max_vertex_buffer_bytes = 128 * 1024;
782 r300render->base.max_indices = 16 * 1024;
783
784 r300render->base.get_vertex_info = r300_render_get_vertex_info;
785 r300render->base.allocate_vertices = r300_render_allocate_vertices;
786 r300render->base.map_vertices = r300_render_map_vertices;
787 r300render->base.unmap_vertices = r300_render_unmap_vertices;
788 r300render->base.set_primitive = r300_render_set_primitive;
789 r300render->base.draw = r300_render_draw;
790 r300render->base.draw_arrays = r300_render_draw_arrays;
791 r300render->base.release_vertices = r300_render_release_vertices;
792 r300render->base.destroy = r300_render_destroy;
793
794 r300render->vbo = NULL;
795 r300render->vbo_size = 0;
796 r300render->vbo_offset = 0;
797
798 return &r300render->base;
799 }
800
801 struct draw_stage* r300_draw_stage(struct r300_context* r300)
802 {
803 struct vbuf_render* render;
804 struct draw_stage* stage;
805
806 render = r300_render_create(r300);
807
808 if (!render) {
809 return NULL;
810 }
811
812 stage = draw_vbuf_stage(r300->draw, render);
813
814 if (!stage) {
815 render->destroy(render);
816 return NULL;
817 }
818
819 draw_set_render(r300->draw, render);
820
821 return stage;
822 }