Merge commit 'origin/master' into gallium-sw-api-2
[mesa.git] / src / gallium / drivers / r300 / r300_render.c
1 /*
2 * Copyright 2009 Corbin Simpson <MostAwesomeDude@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
22
23 /* r300_render: Vertex and index buffer primitive emission. Contains both
24 * HW TCL fastpath rendering, and SW TCL Draw-assisted rendering. */
25
26 #include "draw/draw_context.h"
27 #include "draw/draw_vbuf.h"
28
29 #include "util/u_inlines.h"
30
31 #include "util/u_format.h"
32 #include "util/u_memory.h"
33 #include "util/u_prim.h"
34
35 #include "r300_cs.h"
36 #include "r300_context.h"
37 #include "r300_emit.h"
38 #include "r300_reg.h"
39 #include "r300_render.h"
40 #include "r300_state_derived.h"
41
42 /* r300_render: Vertex and index buffer primitive emission. */
43 #define R300_MAX_VBO_SIZE (1024 * 1024)
44
45 /* XXX The DRM rejects VAP_ALT_NUM_VERTICES.. */
46 //#define ENABLE_ALT_NUM_VERTS
47
48 uint32_t r300_translate_primitive(unsigned prim)
49 {
50 switch (prim) {
51 case PIPE_PRIM_POINTS:
52 return R300_VAP_VF_CNTL__PRIM_POINTS;
53 case PIPE_PRIM_LINES:
54 return R300_VAP_VF_CNTL__PRIM_LINES;
55 case PIPE_PRIM_LINE_LOOP:
56 return R300_VAP_VF_CNTL__PRIM_LINE_LOOP;
57 case PIPE_PRIM_LINE_STRIP:
58 return R300_VAP_VF_CNTL__PRIM_LINE_STRIP;
59 case PIPE_PRIM_TRIANGLES:
60 return R300_VAP_VF_CNTL__PRIM_TRIANGLES;
61 case PIPE_PRIM_TRIANGLE_STRIP:
62 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP;
63 case PIPE_PRIM_TRIANGLE_FAN:
64 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN;
65 case PIPE_PRIM_QUADS:
66 return R300_VAP_VF_CNTL__PRIM_QUADS;
67 case PIPE_PRIM_QUAD_STRIP:
68 return R300_VAP_VF_CNTL__PRIM_QUAD_STRIP;
69 case PIPE_PRIM_POLYGON:
70 return R300_VAP_VF_CNTL__PRIM_POLYGON;
71 default:
72 return 0;
73 }
74 }
75
76 static uint32_t r300_provoking_vertex_fixes(struct r300_context *r300,
77 unsigned mode)
78 {
79 struct r300_rs_state* rs = (struct r300_rs_state*)r300->rs_state.state;
80 uint32_t color_control = rs->color_control;
81
82 /* By default (see r300_state.c:r300_create_rs_state) color_control is
83 * initialized to provoking the first vertex.
84 *
85 * Triangle fans must be reduced to the second vertex, not the first, in
86 * Gallium flatshade-first mode, as per the GL spec.
87 * (http://www.opengl.org/registry/specs/ARB/provoking_vertex.txt)
88 *
89 * Quads never provoke correctly in flatshade-first mode. The first
90 * vertex is never considered as provoking, so only the second, third,
91 * and fourth vertices can be selected, and both "third" and "last" modes
92 * select the fourth vertex. This is probably due to D3D lacking quads.
93 *
94 * Similarly, polygons reduce to the first, not the last, vertex, when in
95 * "last" mode, and all other modes start from the second vertex.
96 *
97 * ~ C.
98 */
99
100 if (rs->rs.flatshade_first) {
101 switch (mode) {
102 case PIPE_PRIM_TRIANGLE_FAN:
103 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_SECOND;
104 break;
105 case PIPE_PRIM_QUADS:
106 case PIPE_PRIM_QUAD_STRIP:
107 case PIPE_PRIM_POLYGON:
108 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
109 break;
110 default:
111 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_FIRST;
112 break;
113 }
114 } else {
115 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
116 }
117
118 return color_control;
119 }
120
121 /* Check if the requested number of dwords is available in the CS and
122 * if not, flush. Return TRUE if the flush occured. */
123 static boolean r300_reserve_cs_space(struct r300_context *r300,
124 unsigned dwords)
125 {
126 if (!r300->winsys->check_cs(r300->winsys, dwords)) {
127 r300->context.flush(&r300->context, 0, NULL);
128 return TRUE;
129 }
130 return FALSE;
131 }
132
133 static boolean immd_is_good_idea(struct r300_context *r300,
134 unsigned count)
135 {
136 return count <= 4;
137 }
138
139 static void r300_emit_draw_arrays_immediate(struct r300_context *r300,
140 unsigned mode,
141 unsigned start,
142 unsigned count)
143 {
144 struct pipe_vertex_element* velem;
145 struct pipe_vertex_buffer* vbuf;
146 unsigned vertex_element_count = r300->velems->count;
147 unsigned i, v, vbi, dw, elem_offset, dwords;
148
149 /* Size of the vertex, in dwords. */
150 unsigned vertex_size = 0;
151
152 /* Offsets of the attribute, in dwords, from the start of the vertex. */
153 unsigned offset[PIPE_MAX_ATTRIBS];
154
155 /* Size of the vertex element, in dwords. */
156 unsigned size[PIPE_MAX_ATTRIBS];
157
158 /* Stride to the same attrib in the next vertex in the vertex buffer,
159 * in dwords. */
160 unsigned stride[PIPE_MAX_ATTRIBS] = {0};
161
162 /* Mapped vertex buffers. */
163 uint32_t* map[PIPE_MAX_ATTRIBS] = {0};
164
165 CS_LOCALS(r300);
166
167 /* Calculate the vertex size, offsets, strides etc. and map the buffers. */
168 for (i = 0; i < vertex_element_count; i++) {
169 velem = &r300->velems->velem[i];
170 offset[i] = velem->src_offset / 4;
171 size[i] = util_format_get_blocksize(velem->src_format) / 4;
172 vertex_size += size[i];
173 vbi = velem->vertex_buffer_index;
174
175 /* Map the buffer. */
176 if (!map[vbi]) {
177 vbuf = &r300->vertex_buffer[vbi];
178 map[vbi] = (uint32_t*)pipe_buffer_map(r300->context.screen,
179 vbuf->buffer,
180 PIPE_BUFFER_USAGE_CPU_READ);
181 map[vbi] += vbuf->buffer_offset / 4;
182 stride[vbi] = vbuf->stride / 4;
183 }
184 }
185
186 dwords = 9 + count * vertex_size;
187
188 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + dwords);
189 r300_emit_buffer_validate(r300, FALSE, NULL);
190 r300_emit_dirty_state(r300);
191
192 BEGIN_CS(dwords);
193 OUT_CS_REG(R300_GA_COLOR_CONTROL,
194 r300_provoking_vertex_fixes(r300, mode));
195 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size);
196 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
197 OUT_CS(count - 1);
198 OUT_CS(0);
199 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, count * vertex_size);
200 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (count << 16) |
201 r300_translate_primitive(mode));
202
203 /* Emit vertices. */
204 for (v = 0; v < count; v++) {
205 for (i = 0; i < vertex_element_count; i++) {
206 velem = &r300->velems->velem[i];
207 vbi = velem->vertex_buffer_index;
208 elem_offset = offset[i] + stride[vbi] * (v + start);
209
210 for (dw = 0; dw < size[i]; dw++) {
211 OUT_CS(map[vbi][elem_offset + dw]);
212 }
213 }
214 }
215 END_CS;
216
217 /* Unmap buffers. */
218 for (i = 0; i < vertex_element_count; i++) {
219 vbi = r300->velems->velem[i].vertex_buffer_index;
220
221 if (map[vbi]) {
222 vbuf = &r300->vertex_buffer[vbi];
223 pipe_buffer_unmap(r300->context.screen, vbuf->buffer);
224 map[vbi] = NULL;
225 }
226 }
227 }
228
229 static void r300_emit_draw_arrays(struct r300_context *r300,
230 unsigned mode,
231 unsigned count)
232 {
233 #if defined(ENABLE_ALT_NUM_VERTS)
234 boolean alt_num_verts = count > 65535;
235 #else
236 boolean alt_num_verts = FALSE;
237 #endif
238 CS_LOCALS(r300);
239
240 if (alt_num_verts) {
241 assert(count < (1 << 24));
242 BEGIN_CS(9);
243 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count);
244 } else {
245 BEGIN_CS(7);
246 }
247 OUT_CS_REG(R300_GA_COLOR_CONTROL,
248 r300_provoking_vertex_fixes(r300, mode));
249 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
250 OUT_CS(count - 1);
251 OUT_CS(0);
252 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
253 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
254 r300_translate_primitive(mode) |
255 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
256 END_CS;
257 }
258
259 static void r300_emit_draw_elements(struct r300_context *r300,
260 struct pipe_buffer* indexBuffer,
261 unsigned indexSize,
262 unsigned minIndex,
263 unsigned maxIndex,
264 unsigned mode,
265 unsigned start,
266 unsigned count)
267 {
268 uint32_t count_dwords;
269 uint32_t offset_dwords = indexSize * start / sizeof(uint32_t);
270 #if defined(ENABLE_ALT_NUM_VERTS)
271 boolean alt_num_verts = count > 65535;
272 #else
273 boolean alt_num_verts = FALSE;
274 #endif
275 CS_LOCALS(r300);
276
277 assert((start * indexSize) % 4 == 0);
278 assert(count < (1 << 24));
279
280 DBG(r300, DBG_DRAW, "r300: Indexbuf of %u indices, min %u max %u\n",
281 count, minIndex, maxIndex);
282
283 maxIndex = MIN2(maxIndex, r300->vertex_buffer_max_index);
284
285 if (alt_num_verts) {
286 BEGIN_CS(15);
287 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count);
288 } else {
289 BEGIN_CS(13);
290 }
291 OUT_CS_REG(R300_GA_COLOR_CONTROL,
292 r300_provoking_vertex_fixes(r300, mode));
293 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
294 OUT_CS(maxIndex);
295 OUT_CS(minIndex);
296 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0);
297 if (indexSize == 4) {
298 count_dwords = count;
299 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
300 R300_VAP_VF_CNTL__INDEX_SIZE_32bit |
301 r300_translate_primitive(mode) |
302 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
303 } else {
304 count_dwords = (count + 1) / 2;
305 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
306 r300_translate_primitive(mode) |
307 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
308 }
309
310 /* INDX_BUFFER is a truly special packet3.
311 * Unlike most other packet3, where the offset is after the count,
312 * the order is reversed, so the relocation ends up carrying the
313 * size of the indexbuf instead of the offset.
314 */
315 OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2);
316 OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2) |
317 (0 << R300_INDX_BUFFER_SKIP_SHIFT));
318 OUT_CS(offset_dwords << 2);
319 OUT_CS_RELOC(indexBuffer, count_dwords,
320 RADEON_GEM_DOMAIN_GTT, 0, 0);
321
322 END_CS;
323 }
324
325 static void r300_shorten_ubyte_elts(struct r300_context* r300,
326 struct pipe_buffer** elts,
327 unsigned count)
328 {
329 struct pipe_screen* screen = r300->context.screen;
330 struct pipe_buffer* new_elts;
331 unsigned char *in_map;
332 unsigned short *out_map;
333 unsigned i;
334
335 new_elts = screen->buffer_create(screen, 32,
336 PIPE_BUFFER_USAGE_INDEX |
337 PIPE_BUFFER_USAGE_CPU_WRITE |
338 PIPE_BUFFER_USAGE_GPU_READ,
339 2 * count);
340
341 in_map = pipe_buffer_map(screen, *elts, PIPE_BUFFER_USAGE_CPU_READ);
342 out_map = pipe_buffer_map(screen, new_elts, PIPE_BUFFER_USAGE_CPU_WRITE);
343
344 for (i = 0; i < count; i++) {
345 *out_map = (unsigned short)*in_map;
346 in_map++;
347 out_map++;
348 }
349
350 pipe_buffer_unmap(screen, *elts);
351 pipe_buffer_unmap(screen, new_elts);
352
353 *elts = new_elts;
354 }
355
356 /* This is the fast-path drawing & emission for HW TCL. */
357 void r300_draw_range_elements(struct pipe_context* pipe,
358 struct pipe_buffer* indexBuffer,
359 unsigned indexSize,
360 unsigned minIndex,
361 unsigned maxIndex,
362 unsigned mode,
363 unsigned start,
364 unsigned count)
365 {
366 struct r300_context* r300 = r300_context(pipe);
367 struct pipe_buffer* orgIndexBuffer = indexBuffer;
368 #if defined(ENABLE_ALT_NUM_VERTS)
369 boolean alt_num_verts = r300_screen(pipe->screen)->caps->is_r500 &&
370 count > 65536;
371 #else
372 boolean alt_num_verts = FALSE;
373 #endif
374 unsigned short_count;
375
376 if (!u_trim_pipe_prim(mode, &count)) {
377 return;
378 }
379
380 if (indexSize == 1) {
381 r300_shorten_ubyte_elts(r300, &indexBuffer, count);
382 indexSize = 2;
383 }
384
385 r300_update_derived_state(r300);
386
387 /* 128 dwords for emit_aos and emit_draw_elements */
388 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 128);
389 r300_emit_buffer_validate(r300, TRUE, indexBuffer);
390 r300_emit_dirty_state(r300);
391 r300_emit_aos(r300, 0);
392
393 if (alt_num_verts || count <= 65535) {
394 r300_emit_draw_elements(r300, indexBuffer, indexSize, minIndex,
395 maxIndex, mode, start, count);
396 } else {
397 do {
398 short_count = MIN2(count, 65534);
399 r300_emit_draw_elements(r300, indexBuffer, indexSize, minIndex,
400 maxIndex, mode, start, short_count);
401
402 start += short_count;
403 count -= short_count;
404
405 /* 16 spare dwords are enough for emit_draw_elements. */
406 if (count && r300_reserve_cs_space(r300, 16)) {
407 r300_emit_buffer_validate(r300, TRUE, indexBuffer);
408 r300_emit_dirty_state(r300);
409 r300_emit_aos(r300, 0);
410 }
411 } while (count);
412 }
413
414 if (indexBuffer != orgIndexBuffer) {
415 pipe->screen->buffer_destroy(indexBuffer);
416 }
417 }
418
419 /* Simple helpers for context setup. Should probably be moved to util. */
420 void r300_draw_elements(struct pipe_context* pipe,
421 struct pipe_buffer* indexBuffer,
422 unsigned indexSize, unsigned mode,
423 unsigned start, unsigned count)
424 {
425 struct r300_context *r300 = r300_context(pipe);
426
427 pipe->draw_range_elements(pipe, indexBuffer, indexSize, 0,
428 r300->vertex_buffer_max_index,
429 mode, start, count);
430 }
431
432 void r300_draw_arrays(struct pipe_context* pipe, unsigned mode,
433 unsigned start, unsigned count)
434 {
435 struct r300_context* r300 = r300_context(pipe);
436 #if defined(ENABLE_ALT_NUM_VERTS)
437 boolean alt_num_verts = r300_screen(pipe->screen)->caps->is_r500 &&
438 count > 65536;
439 #else
440 boolean alt_num_verts = FALSE;
441 #endif
442 unsigned short_count;
443
444 if (!u_trim_pipe_prim(mode, &count)) {
445 return;
446 }
447
448 r300_update_derived_state(r300);
449
450 if (immd_is_good_idea(r300, count)) {
451 r300_emit_draw_arrays_immediate(r300, mode, start, count);
452 } else {
453 /* Make sure there are at least 128 spare dwords in the command buffer.
454 * (most of it being consumed by emit_aos) */
455 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 128);
456 r300_emit_buffer_validate(r300, TRUE, NULL);
457 r300_emit_dirty_state(r300);
458
459 if (alt_num_verts || count <= 65535) {
460 r300_emit_aos(r300, start);
461 r300_emit_draw_arrays(r300, mode, count);
462 } else {
463 do {
464 short_count = MIN2(count, 65535);
465 r300_emit_aos(r300, start);
466 r300_emit_draw_arrays(r300, mode, short_count);
467
468 start += short_count;
469 count -= short_count;
470
471 /* Again, we emit both AOS and draw_arrays so there should be
472 * at least 128 spare dwords. */
473 if (count && r300_reserve_cs_space(r300, 128)) {
474 r300_emit_buffer_validate(r300, TRUE, NULL);
475 r300_emit_dirty_state(r300);
476 }
477 } while (count);
478 }
479 }
480 }
481
482 /****************************************************************************
483 * The rest of this file is for SW TCL rendering only. Please be polite and *
484 * keep these functions separated so that they are easier to locate. ~C. *
485 ***************************************************************************/
486
487 /* SW TCL arrays, using Draw. */
488 void r300_swtcl_draw_arrays(struct pipe_context* pipe,
489 unsigned mode,
490 unsigned start,
491 unsigned count)
492 {
493 struct r300_context* r300 = r300_context(pipe);
494 int i;
495
496 if (!u_trim_pipe_prim(mode, &count)) {
497 return;
498 }
499
500 for (i = 0; i < r300->vertex_buffer_count; i++) {
501 void* buf = pipe_buffer_map(pipe->screen,
502 r300->vertex_buffer[i].buffer,
503 PIPE_BUFFER_USAGE_CPU_READ);
504 draw_set_mapped_vertex_buffer(r300->draw, i, buf);
505 }
506
507 draw_set_mapped_element_buffer(r300->draw, 0, NULL);
508
509 draw_set_mapped_constant_buffer(r300->draw,
510 PIPE_SHADER_VERTEX,
511 0,
512 r300->shader_constants[PIPE_SHADER_VERTEX].constants,
513 r300->shader_constants[PIPE_SHADER_VERTEX].count *
514 (sizeof(float) * 4));
515
516 draw_arrays(r300->draw, mode, start, count);
517
518 for (i = 0; i < r300->vertex_buffer_count; i++) {
519 pipe_buffer_unmap(pipe->screen, r300->vertex_buffer[i].buffer);
520 draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
521 }
522 }
523
524 /* SW TCL elements, using Draw. */
525 void r300_swtcl_draw_range_elements(struct pipe_context* pipe,
526 struct pipe_buffer* indexBuffer,
527 unsigned indexSize,
528 unsigned minIndex,
529 unsigned maxIndex,
530 unsigned mode,
531 unsigned start,
532 unsigned count)
533 {
534 struct r300_context* r300 = r300_context(pipe);
535 int i;
536 void* indices;
537
538 if (!u_trim_pipe_prim(mode, &count)) {
539 return;
540 }
541
542 for (i = 0; i < r300->vertex_buffer_count; i++) {
543 void* buf = pipe_buffer_map(pipe->screen,
544 r300->vertex_buffer[i].buffer,
545 PIPE_BUFFER_USAGE_CPU_READ);
546 draw_set_mapped_vertex_buffer(r300->draw, i, buf);
547 }
548
549 indices = pipe_buffer_map(pipe->screen, indexBuffer,
550 PIPE_BUFFER_USAGE_CPU_READ);
551 draw_set_mapped_element_buffer_range(r300->draw, indexSize,
552 minIndex, maxIndex, indices);
553
554 draw_set_mapped_constant_buffer(r300->draw,
555 PIPE_SHADER_VERTEX,
556 0,
557 r300->shader_constants[PIPE_SHADER_VERTEX].constants,
558 r300->shader_constants[PIPE_SHADER_VERTEX].count *
559 (sizeof(float) * 4));
560
561 draw_arrays(r300->draw, mode, start, count);
562
563 for (i = 0; i < r300->vertex_buffer_count; i++) {
564 pipe_buffer_unmap(pipe->screen, r300->vertex_buffer[i].buffer);
565 draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
566 }
567
568 pipe_buffer_unmap(pipe->screen, indexBuffer);
569 draw_set_mapped_element_buffer_range(r300->draw, 0, start,
570 start + count - 1, NULL);
571 }
572
573 /* Object for rendering using Draw. */
574 struct r300_render {
575 /* Parent class */
576 struct vbuf_render base;
577
578 /* Pipe context */
579 struct r300_context* r300;
580
581 /* Vertex information */
582 size_t vertex_size;
583 unsigned prim;
584 unsigned hwprim;
585
586 /* VBO */
587 struct pipe_buffer* vbo;
588 size_t vbo_size;
589 size_t vbo_offset;
590 size_t vbo_max_used;
591 void * vbo_ptr;
592 };
593
594 static INLINE struct r300_render*
595 r300_render(struct vbuf_render* render)
596 {
597 return (struct r300_render*)render;
598 }
599
600 static const struct vertex_info*
601 r300_render_get_vertex_info(struct vbuf_render* render)
602 {
603 struct r300_render* r300render = r300_render(render);
604 struct r300_context* r300 = r300render->r300;
605
606 r300_update_derived_state(r300);
607
608 return &r300->vertex_info;
609 }
610
611 static boolean r300_render_allocate_vertices(struct vbuf_render* render,
612 ushort vertex_size,
613 ushort count)
614 {
615 struct r300_render* r300render = r300_render(render);
616 struct r300_context* r300 = r300render->r300;
617 struct pipe_screen* screen = r300->context.screen;
618 size_t size = (size_t)vertex_size * (size_t)count;
619
620 if (size + r300render->vbo_offset > r300render->vbo_size)
621 {
622 pipe_buffer_reference(&r300->vbo, NULL);
623 r300render->vbo = pipe_buffer_create(screen,
624 64,
625 PIPE_BUFFER_USAGE_VERTEX,
626 R300_MAX_VBO_SIZE);
627 r300render->vbo_offset = 0;
628 r300render->vbo_size = R300_MAX_VBO_SIZE;
629 }
630
631 r300render->vertex_size = vertex_size;
632 r300->vbo = r300render->vbo;
633 r300->vbo_offset = r300render->vbo_offset;
634
635 return (r300render->vbo) ? TRUE : FALSE;
636 }
637
638 static void* r300_render_map_vertices(struct vbuf_render* render)
639 {
640 struct r300_render* r300render = r300_render(render);
641 struct pipe_screen* screen = r300render->r300->context.screen;
642
643 r300render->vbo_ptr = pipe_buffer_map(screen, r300render->vbo,
644 PIPE_BUFFER_USAGE_CPU_WRITE);
645
646 return ((uint8_t*)r300render->vbo_ptr + r300render->vbo_offset);
647 }
648
649 static void r300_render_unmap_vertices(struct vbuf_render* render,
650 ushort min,
651 ushort max)
652 {
653 struct r300_render* r300render = r300_render(render);
654 struct pipe_screen* screen = r300render->r300->context.screen;
655 CS_LOCALS(r300render->r300);
656 BEGIN_CS(2);
657 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, max);
658 END_CS;
659
660 r300render->vbo_max_used = MAX2(r300render->vbo_max_used,
661 r300render->vertex_size * (max + 1));
662 pipe_buffer_unmap(screen, r300render->vbo);
663 }
664
665 static void r300_render_release_vertices(struct vbuf_render* render)
666 {
667 struct r300_render* r300render = r300_render(render);
668
669 r300render->vbo_offset += r300render->vbo_max_used;
670 r300render->vbo_max_used = 0;
671 }
672
673 static boolean r300_render_set_primitive(struct vbuf_render* render,
674 unsigned prim)
675 {
676 struct r300_render* r300render = r300_render(render);
677
678 r300render->prim = prim;
679 r300render->hwprim = r300_translate_primitive(prim);
680
681 return TRUE;
682 }
683
684 static void r300_render_draw_arrays(struct vbuf_render* render,
685 unsigned start,
686 unsigned count)
687 {
688 struct r300_render* r300render = r300_render(render);
689 struct r300_context* r300 = r300render->r300;
690
691 CS_LOCALS(r300);
692
693 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 2);
694 r300_emit_buffer_validate(r300, FALSE, NULL);
695 r300_emit_dirty_state(r300);
696
697 DBG(r300, DBG_DRAW, "r300: Doing vbuf render, count %d\n", count);
698
699 BEGIN_CS(2);
700 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
701 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
702 r300render->hwprim);
703 END_CS;
704 }
705
706 static void r300_render_draw(struct vbuf_render* render,
707 const ushort* indices,
708 uint count)
709 {
710 struct r300_render* r300render = r300_render(render);
711 struct r300_context* r300 = r300render->r300;
712 int i;
713 unsigned dwords = 2 + (count+1)/2;
714
715 CS_LOCALS(r300);
716
717 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + dwords);
718 r300_emit_buffer_validate(r300, FALSE, NULL);
719 r300_emit_dirty_state(r300);
720
721 BEGIN_CS(dwords);
722 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, (count+1)/2);
723 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
724 r300render->hwprim);
725 for (i = 0; i < count-1; i += 2) {
726 OUT_CS(indices[i+1] << 16 | indices[i]);
727 }
728 if (count % 2) {
729 OUT_CS(indices[count-1]);
730 }
731 END_CS;
732 }
733
734 static void r300_render_destroy(struct vbuf_render* render)
735 {
736 FREE(render);
737 }
738
739 static struct vbuf_render* r300_render_create(struct r300_context* r300)
740 {
741 struct r300_render* r300render = CALLOC_STRUCT(r300_render);
742
743 r300render->r300 = r300;
744
745 /* XXX find real numbers plz */
746 r300render->base.max_vertex_buffer_bytes = 128 * 1024;
747 r300render->base.max_indices = 16 * 1024;
748
749 r300render->base.get_vertex_info = r300_render_get_vertex_info;
750 r300render->base.allocate_vertices = r300_render_allocate_vertices;
751 r300render->base.map_vertices = r300_render_map_vertices;
752 r300render->base.unmap_vertices = r300_render_unmap_vertices;
753 r300render->base.set_primitive = r300_render_set_primitive;
754 r300render->base.draw = r300_render_draw;
755 r300render->base.draw_arrays = r300_render_draw_arrays;
756 r300render->base.release_vertices = r300_render_release_vertices;
757 r300render->base.destroy = r300_render_destroy;
758
759 r300render->vbo = NULL;
760 r300render->vbo_size = 0;
761 r300render->vbo_offset = 0;
762
763 return &r300render->base;
764 }
765
766 struct draw_stage* r300_draw_stage(struct r300_context* r300)
767 {
768 struct vbuf_render* render;
769 struct draw_stage* stage;
770
771 render = r300_render_create(r300);
772
773 if (!render) {
774 return NULL;
775 }
776
777 stage = draw_vbuf_stage(r300->draw, render);
778
779 if (!stage) {
780 render->destroy(render);
781 return NULL;
782 }
783
784 draw_set_render(r300->draw, render);
785
786 return stage;
787 }