r300g: fix rendering with a non-zero index bias in draw_elements_immediate
[mesa.git] / src / gallium / drivers / r300 / r300_render.c
1 /*
2 * Copyright 2009 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2010 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 /* r300_render: Vertex and index buffer primitive emission. Contains both
25 * HW TCL fastpath rendering, and SW TCL Draw-assisted rendering. */
26
27 #include "draw/draw_context.h"
28 #include "draw/draw_vbuf.h"
29
30 #include "util/u_inlines.h"
31
32 #include "util/u_format.h"
33 #include "util/u_memory.h"
34 #include "util/u_upload_mgr.h"
35 #include "util/u_prim.h"
36
37 #include "r300_cs.h"
38 #include "r300_context.h"
39 #include "r300_screen_buffer.h"
40 #include "r300_emit.h"
41 #include "r300_reg.h"
42
43 #include <limits.h>
44
45 #define IMMD_DWORDS 32
46
47 static uint32_t r300_translate_primitive(unsigned prim)
48 {
49 static const int prim_conv[] = {
50 R300_VAP_VF_CNTL__PRIM_POINTS,
51 R300_VAP_VF_CNTL__PRIM_LINES,
52 R300_VAP_VF_CNTL__PRIM_LINE_LOOP,
53 R300_VAP_VF_CNTL__PRIM_LINE_STRIP,
54 R300_VAP_VF_CNTL__PRIM_TRIANGLES,
55 R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP,
56 R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN,
57 R300_VAP_VF_CNTL__PRIM_QUADS,
58 R300_VAP_VF_CNTL__PRIM_QUAD_STRIP,
59 R300_VAP_VF_CNTL__PRIM_POLYGON,
60 -1,
61 -1,
62 -1,
63 -1
64 };
65 unsigned hwprim = prim_conv[prim];
66
67 assert(hwprim != -1);
68 return hwprim;
69 }
70
71 static uint32_t r300_provoking_vertex_fixes(struct r300_context *r300,
72 unsigned mode)
73 {
74 struct r300_rs_state* rs = (struct r300_rs_state*)r300->rs_state.state;
75 uint32_t color_control = rs->color_control;
76
77 /* By default (see r300_state.c:r300_create_rs_state) color_control is
78 * initialized to provoking the first vertex.
79 *
80 * Triangle fans must be reduced to the second vertex, not the first, in
81 * Gallium flatshade-first mode, as per the GL spec.
82 * (http://www.opengl.org/registry/specs/ARB/provoking_vertex.txt)
83 *
84 * Quads never provoke correctly in flatshade-first mode. The first
85 * vertex is never considered as provoking, so only the second, third,
86 * and fourth vertices can be selected, and both "third" and "last" modes
87 * select the fourth vertex. This is probably due to D3D lacking quads.
88 *
89 * Similarly, polygons reduce to the first, not the last, vertex, when in
90 * "last" mode, and all other modes start from the second vertex.
91 *
92 * ~ C.
93 */
94
95 if (rs->rs.flatshade_first) {
96 switch (mode) {
97 case PIPE_PRIM_TRIANGLE_FAN:
98 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_SECOND;
99 break;
100 case PIPE_PRIM_QUADS:
101 case PIPE_PRIM_QUAD_STRIP:
102 case PIPE_PRIM_POLYGON:
103 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
104 break;
105 default:
106 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_FIRST;
107 break;
108 }
109 } else {
110 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
111 }
112
113 return color_control;
114 }
115
116 void r500_emit_index_bias(struct r300_context *r300, int index_bias)
117 {
118 CS_LOCALS(r300);
119
120 BEGIN_CS(2);
121 OUT_CS_REG(R500_VAP_INDEX_OFFSET,
122 (index_bias & 0xFFFFFF) | (index_bias < 0 ? 1<<24 : 0));
123 END_CS;
124 }
125
126 static void r300_emit_draw_init(struct r300_context *r300, unsigned mode,
127 unsigned min_index, unsigned max_index)
128 {
129 CS_LOCALS(r300);
130
131 BEGIN_CS(5);
132 OUT_CS_REG(R300_GA_COLOR_CONTROL,
133 r300_provoking_vertex_fixes(r300, mode));
134 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
135 OUT_CS(max_index);
136 OUT_CS(min_index);
137 END_CS;
138 }
139
140 /* This function splits the index bias value into two parts:
141 * - buffer_offset: the value that can be safely added to buffer offsets
142 * in r300_emit_vertex_arrays (it must yield a positive offset when added to
143 * a vertex buffer offset)
144 * - index_offset: the value that must be manually subtracted from indices
145 * in an index buffer to achieve negative offsets. */
146 static void r300_split_index_bias(struct r300_context *r300, int index_bias,
147 int *buffer_offset, int *index_offset)
148 {
149 struct pipe_vertex_buffer *vb, *vbufs = r300->vbuf_mgr->real_vertex_buffer;
150 struct pipe_vertex_element *velem = r300->velems->velem;
151 unsigned i, size;
152 int max_neg_bias;
153
154 if (index_bias < 0) {
155 /* See how large index bias we may subtract. We must be careful
156 * here because negative buffer offsets are not allowed
157 * by the DRM API. */
158 max_neg_bias = INT_MAX;
159 for (i = 0; i < r300->velems->count; i++) {
160 vb = &vbufs[velem[i].vertex_buffer_index];
161 size = (vb->buffer_offset + velem[i].src_offset) / vb->stride;
162 max_neg_bias = MIN2(max_neg_bias, size);
163 }
164
165 /* Now set the minimum allowed value. */
166 *buffer_offset = MAX2(-max_neg_bias, index_bias);
167 } else {
168 /* A positive index bias is OK. */
169 *buffer_offset = index_bias;
170 }
171
172 *index_offset = index_bias - *buffer_offset;
173 }
174
175 enum r300_prepare_flags {
176 PREP_EMIT_STATES = (1 << 0), /* call emit_dirty_state and friends? */
177 PREP_VALIDATE_VBOS = (1 << 1), /* validate VBOs? */
178 PREP_EMIT_VARRAYS = (1 << 2), /* call emit_vertex_arrays? */
179 PREP_EMIT_VARRAYS_SWTCL = (1 << 3), /* call emit_vertex_arrays_swtcl? */
180 PREP_INDEXED = (1 << 4) /* is this draw_elements? */
181 };
182
183 /**
184 * Check if the requested number of dwords is available in the CS and
185 * if not, flush.
186 * \param r300 The context.
187 * \param flags See r300_prepare_flags.
188 * \param cs_dwords The number of dwords to reserve in CS.
189 * \return TRUE if the CS was flushed
190 */
191 static boolean r300_reserve_cs_dwords(struct r300_context *r300,
192 enum r300_prepare_flags flags,
193 unsigned cs_dwords)
194 {
195 boolean flushed = FALSE;
196 boolean emit_states = flags & PREP_EMIT_STATES;
197 boolean emit_vertex_arrays = flags & PREP_EMIT_VARRAYS;
198 boolean emit_vertex_arrays_swtcl = flags & PREP_EMIT_VARRAYS_SWTCL;
199
200 /* Add dirty state, index offset, and AOS. */
201 if (emit_states)
202 cs_dwords += r300_get_num_dirty_dwords(r300);
203
204 if (r300->screen->caps.is_r500)
205 cs_dwords += 2; /* emit_index_offset */
206
207 if (emit_vertex_arrays)
208 cs_dwords += 55; /* emit_vertex_arrays */
209
210 if (emit_vertex_arrays_swtcl)
211 cs_dwords += 7; /* emit_vertex_arrays_swtcl */
212
213 cs_dwords += r300_get_num_cs_end_dwords(r300);
214
215 /* Reserve requested CS space. */
216 if (cs_dwords > (RADEON_MAX_CMDBUF_DWORDS - r300->cs->cdw)) {
217 r300_flush(&r300->context, RADEON_FLUSH_ASYNC, NULL);
218 flushed = TRUE;
219 }
220
221 return flushed;
222 }
223
224 /**
225 * Validate buffers and emit dirty state.
226 * \param r300 The context.
227 * \param flags See r300_prepare_flags.
228 * \param index_buffer The index buffer to validate. The parameter may be NULL.
229 * \param buffer_offset The offset passed to emit_vertex_arrays.
230 * \param index_bias The index bias to emit.
231 * \param instance_id Index of instance to render
232 * \return TRUE if rendering should be skipped
233 */
234 static boolean r300_emit_states(struct r300_context *r300,
235 enum r300_prepare_flags flags,
236 struct pipe_resource *index_buffer,
237 int buffer_offset,
238 int index_bias, int instance_id)
239 {
240 boolean emit_states = flags & PREP_EMIT_STATES;
241 boolean emit_vertex_arrays = flags & PREP_EMIT_VARRAYS;
242 boolean emit_vertex_arrays_swtcl = flags & PREP_EMIT_VARRAYS_SWTCL;
243 boolean indexed = flags & PREP_INDEXED;
244 boolean validate_vbos = flags & PREP_VALIDATE_VBOS;
245
246 /* Validate buffers and emit dirty state if needed. */
247 if (emit_states || (emit_vertex_arrays && validate_vbos)) {
248 if (!r300_emit_buffer_validate(r300, validate_vbos,
249 index_buffer)) {
250 fprintf(stderr, "r300: CS space validation failed. "
251 "(not enough memory?) Skipping rendering.\n");
252 return FALSE;
253 }
254 }
255
256 if (emit_states)
257 r300_emit_dirty_state(r300);
258
259 if (r300->screen->caps.is_r500) {
260 if (r300->screen->caps.has_tcl)
261 r500_emit_index_bias(r300, index_bias);
262 else
263 r500_emit_index_bias(r300, 0);
264 }
265
266 if (emit_vertex_arrays &&
267 (r300->vertex_arrays_dirty ||
268 r300->vertex_arrays_indexed != indexed ||
269 r300->vertex_arrays_offset != buffer_offset ||
270 r300->vertex_arrays_instance_id != instance_id)) {
271 r300_emit_vertex_arrays(r300, buffer_offset, indexed, instance_id);
272
273 r300->vertex_arrays_dirty = FALSE;
274 r300->vertex_arrays_indexed = indexed;
275 r300->vertex_arrays_offset = buffer_offset;
276 r300->vertex_arrays_instance_id = instance_id;
277 }
278
279 if (emit_vertex_arrays_swtcl)
280 r300_emit_vertex_arrays_swtcl(r300, indexed);
281
282 return TRUE;
283 }
284
285 /**
286 * Check if the requested number of dwords is available in the CS and
287 * if not, flush. Then validate buffers and emit dirty state.
288 * \param r300 The context.
289 * \param flags See r300_prepare_flags.
290 * \param index_buffer The index buffer to validate. The parameter may be NULL.
291 * \param cs_dwords The number of dwords to reserve in CS.
292 * \param buffer_offset The offset passed to emit_vertex_arrays.
293 * \param index_bias The index bias to emit.
294 * \param instance_id The instance to render.
295 * \return TRUE if rendering should be skipped
296 */
297 static boolean r300_prepare_for_rendering(struct r300_context *r300,
298 enum r300_prepare_flags flags,
299 struct pipe_resource *index_buffer,
300 unsigned cs_dwords,
301 int buffer_offset,
302 int index_bias,
303 int instance_id)
304 {
305 /* Make sure there is enough space in the command stream and emit states. */
306 if (r300_reserve_cs_dwords(r300, flags, cs_dwords))
307 flags |= PREP_EMIT_STATES;
308
309 return r300_emit_states(r300, flags, index_buffer, buffer_offset,
310 index_bias, instance_id);
311 }
312
313 static boolean immd_is_good_idea(struct r300_context *r300,
314 unsigned count)
315 {
316 if (DBG_ON(r300, DBG_NO_IMMD)) {
317 return FALSE;
318 }
319
320 if (count * r300->velems->vertex_size_dwords > IMMD_DWORDS) {
321 return FALSE;
322 }
323
324 /* Buffers can only be used for read by r300 (except query buffers, but
325 * those can't be bound by a state tracker as vertex buffers). */
326 return TRUE;
327 }
328
329 /*****************************************************************************
330 * The HWTCL draw functions. *
331 ****************************************************************************/
332
333 static void r300_draw_arrays_immediate(struct r300_context *r300,
334 const struct pipe_draw_info *info)
335 {
336 struct pipe_vertex_element* velem;
337 struct pipe_vertex_buffer* vbuf;
338 unsigned vertex_element_count = r300->velems->count;
339 unsigned i, v, vbi;
340
341 /* Size of the vertex, in dwords. */
342 unsigned vertex_size = r300->velems->vertex_size_dwords;
343
344 /* The number of dwords for this draw operation. */
345 unsigned dwords = 4 + info->count * vertex_size;
346
347 /* Size of the vertex element, in dwords. */
348 unsigned size[PIPE_MAX_ATTRIBS];
349
350 /* Stride to the same attrib in the next vertex in the vertex buffer,
351 * in dwords. */
352 unsigned stride[PIPE_MAX_ATTRIBS];
353
354 /* Mapped vertex buffers. */
355 uint32_t* map[PIPE_MAX_ATTRIBS] = {0};
356 uint32_t* mapelem[PIPE_MAX_ATTRIBS];
357
358 CS_LOCALS(r300);
359
360 if (!r300_prepare_for_rendering(r300, PREP_EMIT_STATES, NULL, dwords, 0, 0, -1))
361 return;
362
363 /* Calculate the vertex size, offsets, strides etc. and map the buffers. */
364 for (i = 0; i < vertex_element_count; i++) {
365 velem = &r300->velems->velem[i];
366 size[i] = r300->velems->format_size[i] / 4;
367 vbi = velem->vertex_buffer_index;
368 vbuf = &r300->vbuf_mgr->real_vertex_buffer[vbi];
369 stride[i] = vbuf->stride / 4;
370
371 /* Map the buffer. */
372 if (!map[vbi]) {
373 map[vbi] = (uint32_t*)r300->rws->buffer_map(
374 r300_resource(vbuf->buffer)->buf,
375 r300->cs, PIPE_TRANSFER_READ | PIPE_TRANSFER_UNSYNCHRONIZED);
376 map[vbi] += (vbuf->buffer_offset / 4) + stride[i] * info->start;
377 }
378 mapelem[i] = map[vbi] + (velem->src_offset / 4);
379 }
380
381 r300_emit_draw_init(r300, info->mode, 0, info->count-1);
382
383 BEGIN_CS(dwords);
384 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size);
385 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, info->count * vertex_size);
386 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (info->count << 16) |
387 r300_translate_primitive(info->mode));
388
389 /* Emit vertices. */
390 for (v = 0; v < info->count; v++) {
391 for (i = 0; i < vertex_element_count; i++) {
392 OUT_CS_TABLE(&mapelem[i][stride[i] * v], size[i]);
393 }
394 }
395 END_CS;
396
397 /* Unmap buffers. */
398 for (i = 0; i < vertex_element_count; i++) {
399 vbi = r300->velems->velem[i].vertex_buffer_index;
400
401 if (map[vbi]) {
402 r300->rws->buffer_unmap(r300_resource(r300->vbuf_mgr->real_vertex_buffer[vbi].buffer)->buf);
403 map[vbi] = NULL;
404 }
405 }
406 }
407
408 static void r300_emit_draw_arrays(struct r300_context *r300,
409 unsigned mode,
410 unsigned count)
411 {
412 boolean alt_num_verts = count > 65535;
413 CS_LOCALS(r300);
414
415 if (count >= (1 << 24)) {
416 fprintf(stderr, "r300: Got a huge number of vertices: %i, "
417 "refusing to render.\n", count);
418 return;
419 }
420
421 r300_emit_draw_init(r300, mode, 0, count-1);
422
423 BEGIN_CS(2 + (alt_num_verts ? 2 : 0));
424 if (alt_num_verts) {
425 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count);
426 }
427 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
428 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
429 r300_translate_primitive(mode) |
430 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
431 END_CS;
432 }
433
434 static void r300_emit_draw_elements(struct r300_context *r300,
435 struct pipe_resource* indexBuffer,
436 unsigned indexSize,
437 unsigned min_index,
438 unsigned max_index,
439 unsigned mode,
440 unsigned start,
441 unsigned count,
442 uint16_t *imm_indices3)
443 {
444 uint32_t count_dwords, offset_dwords;
445 boolean alt_num_verts = count > 65535;
446 CS_LOCALS(r300);
447
448 if (count >= (1 << 24) || max_index >= (1 << 24)) {
449 fprintf(stderr, "r300: Got a huge number of vertices: %i, "
450 "refusing to render (max_index: %i).\n", count, max_index);
451 return;
452 }
453
454 DBG(r300, DBG_DRAW, "r300: Indexbuf of %u indices, min %u max %u\n",
455 count, min_index, max_index);
456
457 r300_emit_draw_init(r300, mode, min_index, max_index);
458
459 /* If start is odd, render the first triangle with indices embedded
460 * in the command stream. This will increase start by 3 and make it
461 * even. We can then proceed without a fallback. */
462 if (indexSize == 2 && (start & 1) &&
463 mode == PIPE_PRIM_TRIANGLES) {
464 BEGIN_CS(4);
465 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 2);
466 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (3 << 16) |
467 R300_VAP_VF_CNTL__PRIM_TRIANGLES);
468 OUT_CS(imm_indices3[1] << 16 | imm_indices3[0]);
469 OUT_CS(imm_indices3[2]);
470 END_CS;
471
472 start += 3;
473 count -= 3;
474 if (!count)
475 return;
476 }
477
478 offset_dwords = indexSize * start / sizeof(uint32_t);
479
480 BEGIN_CS(8 + (alt_num_verts ? 2 : 0));
481 if (alt_num_verts) {
482 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count);
483 }
484 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0);
485 if (indexSize == 4) {
486 count_dwords = count;
487 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
488 R300_VAP_VF_CNTL__INDEX_SIZE_32bit |
489 r300_translate_primitive(mode) |
490 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
491 } else {
492 count_dwords = (count + 1) / 2;
493 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) |
494 r300_translate_primitive(mode) |
495 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0));
496 }
497
498 OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2);
499 OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2) |
500 (0 << R300_INDX_BUFFER_SKIP_SHIFT));
501 OUT_CS(offset_dwords << 2);
502 OUT_CS(count_dwords);
503 OUT_CS_RELOC(r300_resource(indexBuffer));
504 END_CS;
505 }
506
507 static void r300_draw_elements_immediate(struct r300_context *r300,
508 const struct pipe_draw_info *info)
509 {
510 uint8_t *ptr1;
511 uint16_t *ptr2;
512 uint32_t *ptr4;
513 unsigned index_size = r300->index_buffer.index_size;
514 unsigned i, count_dwords = index_size == 4 ? info->count :
515 (info->count + 1) / 2;
516 CS_LOCALS(r300);
517
518 /* 19 dwords for r300_draw_elements_immediate. Give up if the function fails. */
519 if (!r300_prepare_for_rendering(r300,
520 PREP_EMIT_STATES | PREP_VALIDATE_VBOS | PREP_EMIT_VARRAYS |
521 PREP_INDEXED, NULL, 2+count_dwords, 0, info->index_bias, -1))
522 return;
523
524 r300_emit_draw_init(r300, info->mode,
525 info->min_index + info->index_bias,
526 info->max_index + info->index_bias);
527
528 BEGIN_CS(2 + count_dwords);
529 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, count_dwords);
530
531 switch (index_size) {
532 case 1:
533 ptr1 = r300_resource(r300->index_buffer.buffer)->b.user_ptr;
534 ptr1 += info->start;
535
536 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (info->count << 16) |
537 r300_translate_primitive(info->mode));
538
539 if (info->index_bias && !r300->screen->caps.is_r500) {
540 for (i = 0; i < info->count-1; i += 2)
541 OUT_CS(((ptr1[i+1] + info->index_bias) << 16) |
542 (ptr1[i] + info->index_bias));
543
544 if (info->count & 1)
545 OUT_CS(ptr1[i] + info->index_bias);
546 } else {
547 for (i = 0; i < info->count-1; i += 2)
548 OUT_CS(((ptr1[i+1]) << 16) |
549 (ptr1[i] ));
550
551 if (info->count & 1)
552 OUT_CS(ptr1[i]);
553 }
554 break;
555
556 case 2:
557 ptr2 = (uint16_t*)r300_resource(r300->index_buffer.buffer)->b.user_ptr;
558 ptr2 += info->start;
559
560 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (info->count << 16) |
561 r300_translate_primitive(info->mode));
562
563 if (info->index_bias && !r300->screen->caps.is_r500) {
564 for (i = 0; i < info->count-1; i += 2)
565 OUT_CS(((ptr2[i+1] + info->index_bias) << 16) |
566 (ptr2[i] + info->index_bias));
567
568 if (info->count & 1)
569 OUT_CS(ptr2[i] + info->index_bias);
570 } else {
571 OUT_CS_TABLE(ptr2, count_dwords);
572 }
573 break;
574
575 case 4:
576 ptr4 = (uint32_t*)r300_resource(r300->index_buffer.buffer)->b.user_ptr;
577 ptr4 += info->start;
578
579 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (info->count << 16) |
580 R300_VAP_VF_CNTL__INDEX_SIZE_32bit |
581 r300_translate_primitive(info->mode));
582
583 if (info->index_bias && !r300->screen->caps.is_r500) {
584 for (i = 0; i < info->count; i++)
585 OUT_CS(ptr4[i] + info->index_bias);
586 } else {
587 OUT_CS_TABLE(ptr4, count_dwords);
588 }
589 break;
590 }
591 END_CS;
592 }
593
594 static void r300_draw_elements(struct r300_context *r300,
595 const struct pipe_draw_info *info,
596 int instance_id)
597 {
598 struct pipe_resource *indexBuffer = r300->index_buffer.buffer;
599 unsigned indexSize = r300->index_buffer.index_size;
600 struct pipe_resource* orgIndexBuffer = indexBuffer;
601 unsigned start = info->start;
602 unsigned count = info->count;
603 boolean alt_num_verts = r300->screen->caps.is_r500 &&
604 count > 65536;
605 unsigned short_count;
606 int buffer_offset = 0, index_offset = 0; /* for index bias emulation */
607 uint16_t indices3[3];
608
609 if (info->index_bias && !r300->screen->caps.is_r500) {
610 r300_split_index_bias(r300, info->index_bias, &buffer_offset, &index_offset);
611 }
612
613 r300_translate_index_buffer(r300, &indexBuffer, &indexSize, index_offset,
614 &start, count);
615
616 /* Fallback for misaligned ushort indices. */
617 if (indexSize == 2 && (start & 1) &&
618 !r300_resource(indexBuffer)->b.user_ptr) {
619 /* If we got here, then orgIndexBuffer == indexBuffer. */
620 uint16_t *ptr = r300->rws->buffer_map(r300_resource(orgIndexBuffer)->buf,
621 r300->cs,
622 PIPE_TRANSFER_READ |
623 PIPE_TRANSFER_UNSYNCHRONIZED);
624
625 if (info->mode == PIPE_PRIM_TRIANGLES) {
626 memcpy(indices3, ptr + start, 6);
627 } else {
628 /* Copy the mapped index buffer directly to the upload buffer.
629 * The start index will be aligned simply from the fact that
630 * every sub-buffer in the upload buffer is aligned. */
631 r300_upload_index_buffer(r300, &indexBuffer, indexSize, &start,
632 count, (uint8_t*)ptr);
633 }
634 r300->rws->buffer_unmap(r300_resource(orgIndexBuffer)->buf);
635 } else {
636 if (r300_resource(indexBuffer)->b.user_ptr)
637 r300_upload_index_buffer(r300, &indexBuffer, indexSize,
638 &start, count,
639 r300_resource(indexBuffer)->b.user_ptr);
640 }
641
642 /* 19 dwords for emit_draw_elements. Give up if the function fails. */
643 if (!r300_prepare_for_rendering(r300,
644 PREP_EMIT_STATES | PREP_VALIDATE_VBOS | PREP_EMIT_VARRAYS |
645 PREP_INDEXED, indexBuffer, 19, buffer_offset, info->index_bias,
646 instance_id))
647 goto done;
648
649 if (alt_num_verts || count <= 65535) {
650 r300_emit_draw_elements(r300, indexBuffer, indexSize, info->min_index,
651 info->max_index, info->mode, start, count,
652 indices3);
653 } else {
654 do {
655 /* The maximum must be divisible by 4 and 3,
656 * so that quad and triangle lists are split correctly.
657 *
658 * Strips, loops, and fans won't work. */
659 short_count = MIN2(count, 65532);
660
661 r300_emit_draw_elements(r300, indexBuffer, indexSize,
662 info->min_index, info->max_index,
663 info->mode, start, short_count, indices3);
664
665 start += short_count;
666 count -= short_count;
667
668 /* 15 dwords for emit_draw_elements */
669 if (count) {
670 if (!r300_prepare_for_rendering(r300,
671 PREP_VALIDATE_VBOS | PREP_EMIT_VARRAYS | PREP_INDEXED,
672 indexBuffer, 19, buffer_offset, info->index_bias,
673 instance_id))
674 goto done;
675 }
676 } while (count);
677 }
678
679 done:
680 if (indexBuffer != orgIndexBuffer) {
681 pipe_resource_reference( &indexBuffer, NULL );
682 }
683 }
684
685 static void r300_draw_arrays(struct r300_context *r300,
686 const struct pipe_draw_info *info,
687 int instance_id)
688 {
689 boolean alt_num_verts = r300->screen->caps.is_r500 &&
690 info->count > 65536;
691 unsigned start = info->start;
692 unsigned count = info->count;
693 unsigned short_count;
694
695 /* 9 spare dwords for emit_draw_arrays. Give up if the function fails. */
696 if (!r300_prepare_for_rendering(r300,
697 PREP_EMIT_STATES | PREP_VALIDATE_VBOS | PREP_EMIT_VARRAYS,
698 NULL, 9, start, 0, instance_id))
699 return;
700
701 if (alt_num_verts || count <= 65535) {
702 r300_emit_draw_arrays(r300, info->mode, count);
703 } else {
704 do {
705 /* The maximum must be divisible by 4 and 3,
706 * so that quad and triangle lists are split correctly.
707 *
708 * Strips, loops, and fans won't work. */
709 short_count = MIN2(count, 65532);
710 r300_emit_draw_arrays(r300, info->mode, short_count);
711
712 start += short_count;
713 count -= short_count;
714
715 /* 9 spare dwords for emit_draw_arrays. Give up if the function fails. */
716 if (count) {
717 if (!r300_prepare_for_rendering(r300,
718 PREP_VALIDATE_VBOS | PREP_EMIT_VARRAYS, NULL, 9,
719 start, 0, instance_id))
720 return;
721 }
722 } while (count);
723 }
724 }
725
726 static void r300_draw_arrays_instanced(struct r300_context *r300,
727 const struct pipe_draw_info *info)
728 {
729 int i;
730
731 for (i = 0; i < info->instance_count; i++)
732 r300_draw_arrays(r300, info, i);
733 }
734
735 static void r300_draw_elements_instanced(struct r300_context *r300,
736 const struct pipe_draw_info *info)
737 {
738 int i;
739
740 for (i = 0; i < info->instance_count; i++)
741 r300_draw_elements(r300, info, i);
742 }
743
744 static void r300_draw_vbo(struct pipe_context* pipe,
745 const struct pipe_draw_info *dinfo)
746 {
747 struct r300_context* r300 = r300_context(pipe);
748 struct pipe_draw_info info = *dinfo;
749
750 info.indexed = info.indexed && r300->index_buffer.buffer;
751
752 if (r300->skip_rendering ||
753 !u_trim_pipe_prim(info.mode, &info.count)) {
754 return;
755 }
756
757 r300_update_derived_state(r300);
758
759 /* Start the vbuf manager and update buffers if needed. */
760 if (u_vbuf_draw_begin(r300->vbuf_mgr, &info) & U_VBUF_BUFFERS_UPDATED) {
761 r300->vertex_arrays_dirty = TRUE;
762 }
763
764 /* Draw. */
765 if (info.indexed) {
766 info.start += r300->index_buffer.offset;
767 info.max_index = MIN2(r300->vbuf_mgr->max_index, info.max_index);
768
769 if (info.instance_count <= 1) {
770 if (info.count <= 8 &&
771 r300_resource(r300->index_buffer.buffer)->b.user_ptr) {
772 r300_draw_elements_immediate(r300, &info);
773 } else {
774 r300_draw_elements(r300, &info, -1);
775 }
776 } else {
777 r300_draw_elements_instanced(r300, &info);
778 }
779 } else {
780 if (info.instance_count <= 1) {
781 if (immd_is_good_idea(r300, info.count)) {
782 r300_draw_arrays_immediate(r300, &info);
783 } else {
784 r300_draw_arrays(r300, &info, -1);
785 }
786 } else {
787 r300_draw_arrays_instanced(r300, &info);
788 }
789 }
790
791 u_vbuf_draw_end(r300->vbuf_mgr);
792 }
793
794 /****************************************************************************
795 * The rest of this file is for SW TCL rendering only. Please be polite and *
796 * keep these functions separated so that they are easier to locate. ~C. *
797 ***************************************************************************/
798
799 /* SW TCL elements, using Draw. */
800 static void r300_swtcl_draw_vbo(struct pipe_context* pipe,
801 const struct pipe_draw_info *info)
802 {
803 struct r300_context* r300 = r300_context(pipe);
804 struct pipe_transfer *vb_transfer[PIPE_MAX_ATTRIBS];
805 struct pipe_transfer *ib_transfer = NULL;
806 unsigned count = info->count;
807 int i;
808 void *indices = NULL;
809 boolean indexed = info->indexed && r300->index_buffer.buffer;
810
811 if (r300->skip_rendering) {
812 return;
813 }
814
815 if (!u_trim_pipe_prim(info->mode, &count)) {
816 return;
817 }
818
819 r300_update_derived_state(r300);
820
821 r300_reserve_cs_dwords(r300,
822 PREP_EMIT_STATES | PREP_EMIT_VARRAYS_SWTCL |
823 (indexed ? PREP_INDEXED : 0),
824 indexed ? 256 : 6);
825
826 for (i = 0; i < r300->vbuf_mgr->nr_vertex_buffers; i++) {
827 if (r300->vbuf_mgr->vertex_buffer[i].buffer) {
828 void *buf = pipe_buffer_map(pipe,
829 r300->vbuf_mgr->vertex_buffer[i].buffer,
830 PIPE_TRANSFER_READ |
831 PIPE_TRANSFER_UNSYNCHRONIZED,
832 &vb_transfer[i]);
833 draw_set_mapped_vertex_buffer(r300->draw, i, buf);
834 }
835 }
836
837 if (indexed) {
838 indices = pipe_buffer_map(pipe, r300->index_buffer.buffer,
839 PIPE_TRANSFER_READ |
840 PIPE_TRANSFER_UNSYNCHRONIZED, &ib_transfer);
841 }
842
843 draw_set_mapped_index_buffer(r300->draw, indices);
844
845 r300->draw_vbo_locked = TRUE;
846 r300->draw_first_emitted = FALSE;
847 draw_vbo(r300->draw, info);
848 draw_flush(r300->draw);
849 r300->draw_vbo_locked = FALSE;
850
851 for (i = 0; i < r300->vbuf_mgr->nr_vertex_buffers; i++) {
852 if (r300->vbuf_mgr->vertex_buffer[i].buffer) {
853 pipe_buffer_unmap(pipe, vb_transfer[i]);
854 draw_set_mapped_vertex_buffer(r300->draw, i, NULL);
855 }
856 }
857
858 if (indexed) {
859 pipe_buffer_unmap(pipe, ib_transfer);
860 draw_set_mapped_index_buffer(r300->draw, NULL);
861 }
862 }
863
864 /* Object for rendering using Draw. */
865 struct r300_render {
866 /* Parent class */
867 struct vbuf_render base;
868
869 /* Pipe context */
870 struct r300_context* r300;
871
872 /* Vertex information */
873 size_t vertex_size;
874 unsigned prim;
875 unsigned hwprim;
876
877 /* VBO */
878 size_t vbo_max_used;
879 void * vbo_ptr;
880
881 struct pipe_transfer *vbo_transfer;
882 };
883
884 static INLINE struct r300_render*
885 r300_render(struct vbuf_render* render)
886 {
887 return (struct r300_render*)render;
888 }
889
890 static const struct vertex_info*
891 r300_render_get_vertex_info(struct vbuf_render* render)
892 {
893 struct r300_render* r300render = r300_render(render);
894 struct r300_context* r300 = r300render->r300;
895
896 return &r300->vertex_info;
897 }
898
899 static boolean r300_render_allocate_vertices(struct vbuf_render* render,
900 ushort vertex_size,
901 ushort count)
902 {
903 struct r300_render* r300render = r300_render(render);
904 struct r300_context* r300 = r300render->r300;
905 struct pipe_screen* screen = r300->context.screen;
906 size_t size = (size_t)vertex_size * (size_t)count;
907
908 DBG(r300, DBG_DRAW, "r300: render_allocate_vertices (size: %d)\n", size);
909
910 if (size + r300->draw_vbo_offset > r300->draw_vbo_size)
911 {
912 pipe_resource_reference(&r300->vbo, NULL);
913 r300->vbo = pipe_buffer_create(screen,
914 PIPE_BIND_VERTEX_BUFFER,
915 PIPE_USAGE_STREAM,
916 R300_MAX_DRAW_VBO_SIZE);
917 r300->draw_vbo_offset = 0;
918 r300->draw_vbo_size = R300_MAX_DRAW_VBO_SIZE;
919 }
920
921 r300render->vertex_size = vertex_size;
922
923 return (r300->vbo) ? TRUE : FALSE;
924 }
925
926 static void* r300_render_map_vertices(struct vbuf_render* render)
927 {
928 struct r300_render* r300render = r300_render(render);
929 struct r300_context* r300 = r300render->r300;
930
931 assert(!r300render->vbo_transfer);
932
933 DBG(r300, DBG_DRAW, "r300: render_map_vertices\n");
934
935 r300render->vbo_ptr = pipe_buffer_map(&r300render->r300->context,
936 r300->vbo,
937 PIPE_TRANSFER_WRITE |
938 PIPE_TRANSFER_UNSYNCHRONIZED,
939 &r300render->vbo_transfer);
940
941 assert(r300render->vbo_ptr);
942
943 return ((uint8_t*)r300render->vbo_ptr + r300->draw_vbo_offset);
944 }
945
946 static void r300_render_unmap_vertices(struct vbuf_render* render,
947 ushort min,
948 ushort max)
949 {
950 struct r300_render* r300render = r300_render(render);
951 struct pipe_context* context = &r300render->r300->context;
952 struct r300_context* r300 = r300render->r300;
953
954 assert(r300render->vbo_transfer);
955
956 DBG(r300, DBG_DRAW, "r300: render_unmap_vertices\n");
957
958 r300render->vbo_max_used = MAX2(r300render->vbo_max_used,
959 r300render->vertex_size * (max + 1));
960 pipe_buffer_unmap(context, r300render->vbo_transfer);
961
962 r300render->vbo_transfer = NULL;
963 }
964
965 static void r300_render_release_vertices(struct vbuf_render* render)
966 {
967 struct r300_render* r300render = r300_render(render);
968 struct r300_context* r300 = r300render->r300;
969
970 DBG(r300, DBG_DRAW, "r300: render_release_vertices\n");
971
972 r300->draw_vbo_offset += r300render->vbo_max_used;
973 r300render->vbo_max_used = 0;
974 }
975
976 static boolean r300_render_set_primitive(struct vbuf_render* render,
977 unsigned prim)
978 {
979 struct r300_render* r300render = r300_render(render);
980
981 r300render->prim = prim;
982 r300render->hwprim = r300_translate_primitive(prim);
983
984 return TRUE;
985 }
986
987 static void r300_render_draw_arrays(struct vbuf_render* render,
988 unsigned start,
989 unsigned count)
990 {
991 struct r300_render* r300render = r300_render(render);
992 struct r300_context* r300 = r300render->r300;
993 uint8_t* ptr;
994 unsigned i;
995 unsigned dwords = 6;
996
997 CS_LOCALS(r300);
998 (void) i; (void) ptr;
999
1000 DBG(r300, DBG_DRAW, "r300: render_draw_arrays (count: %d)\n", count);
1001
1002 if (r300->draw_first_emitted) {
1003 if (!r300_prepare_for_rendering(r300,
1004 PREP_EMIT_STATES | PREP_EMIT_VARRAYS_SWTCL,
1005 NULL, dwords, 0, 0, -1))
1006 return;
1007 } else {
1008 if (!r300_emit_states(r300,
1009 PREP_EMIT_STATES | PREP_EMIT_VARRAYS_SWTCL,
1010 NULL, 0, 0, -1))
1011 return;
1012 }
1013
1014 BEGIN_CS(dwords);
1015 OUT_CS_REG(R300_GA_COLOR_CONTROL,
1016 r300_provoking_vertex_fixes(r300, r300render->prim));
1017 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, count - 1);
1018 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0);
1019 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) |
1020 r300render->hwprim);
1021 END_CS;
1022
1023 r300->draw_first_emitted = TRUE;
1024 }
1025
1026 static void r300_render_draw_elements(struct vbuf_render* render,
1027 const ushort* indices,
1028 uint count)
1029 {
1030 struct r300_render* r300render = r300_render(render);
1031 struct r300_context* r300 = r300render->r300;
1032 int i;
1033 unsigned end_cs_dwords;
1034 unsigned max_index = (r300->draw_vbo_size - r300->draw_vbo_offset) /
1035 (r300render->r300->vertex_info.size * 4) - 1;
1036 unsigned short_count;
1037 unsigned free_dwords;
1038
1039 CS_LOCALS(r300);
1040 DBG(r300, DBG_DRAW, "r300: render_draw_elements (count: %d)\n", count);
1041
1042 if (r300->draw_first_emitted) {
1043 if (!r300_prepare_for_rendering(r300,
1044 PREP_EMIT_STATES | PREP_EMIT_VARRAYS_SWTCL | PREP_INDEXED,
1045 NULL, 256, 0, 0, -1))
1046 return;
1047 } else {
1048 if (!r300_emit_states(r300,
1049 PREP_EMIT_STATES | PREP_EMIT_VARRAYS_SWTCL | PREP_INDEXED,
1050 NULL, 0, 0, -1))
1051 return;
1052 }
1053
1054 /* Below we manage the CS space manually because there may be more
1055 * indices than it can fit in CS. */
1056
1057 end_cs_dwords = r300_get_num_cs_end_dwords(r300);
1058
1059 while (count) {
1060 free_dwords = RADEON_MAX_CMDBUF_DWORDS - r300->cs->cdw;
1061
1062 short_count = MIN2(count, (free_dwords - end_cs_dwords - 6) * 2);
1063
1064 BEGIN_CS(6 + (short_count+1)/2);
1065 OUT_CS_REG(R300_GA_COLOR_CONTROL,
1066 r300_provoking_vertex_fixes(r300, r300render->prim));
1067 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, max_index);
1068 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, (short_count+1)/2);
1069 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (short_count << 16) |
1070 r300render->hwprim);
1071 for (i = 0; i < short_count-1; i += 2) {
1072 OUT_CS(indices[i+1] << 16 | indices[i]);
1073 }
1074 if (short_count % 2) {
1075 OUT_CS(indices[short_count-1]);
1076 }
1077 END_CS;
1078
1079 /* OK now subtract the emitted indices and see if we need to emit
1080 * another draw packet. */
1081 indices += short_count;
1082 count -= short_count;
1083
1084 if (count) {
1085 if (!r300_prepare_for_rendering(r300,
1086 PREP_EMIT_VARRAYS_SWTCL | PREP_INDEXED,
1087 NULL, 256, 0, 0, -1))
1088 return;
1089
1090 end_cs_dwords = r300_get_num_cs_end_dwords(r300);
1091 }
1092 }
1093
1094 r300->draw_first_emitted = TRUE;
1095 }
1096
1097 static void r300_render_destroy(struct vbuf_render* render)
1098 {
1099 FREE(render);
1100 }
1101
1102 static struct vbuf_render* r300_render_create(struct r300_context* r300)
1103 {
1104 struct r300_render* r300render = CALLOC_STRUCT(r300_render);
1105
1106 r300render->r300 = r300;
1107
1108 r300render->base.max_vertex_buffer_bytes = 1024 * 1024;
1109 r300render->base.max_indices = 16 * 1024;
1110
1111 r300render->base.get_vertex_info = r300_render_get_vertex_info;
1112 r300render->base.allocate_vertices = r300_render_allocate_vertices;
1113 r300render->base.map_vertices = r300_render_map_vertices;
1114 r300render->base.unmap_vertices = r300_render_unmap_vertices;
1115 r300render->base.set_primitive = r300_render_set_primitive;
1116 r300render->base.draw_elements = r300_render_draw_elements;
1117 r300render->base.draw_arrays = r300_render_draw_arrays;
1118 r300render->base.release_vertices = r300_render_release_vertices;
1119 r300render->base.destroy = r300_render_destroy;
1120
1121 return &r300render->base;
1122 }
1123
1124 struct draw_stage* r300_draw_stage(struct r300_context* r300)
1125 {
1126 struct vbuf_render* render;
1127 struct draw_stage* stage;
1128
1129 render = r300_render_create(r300);
1130
1131 if (!render) {
1132 return NULL;
1133 }
1134
1135 stage = draw_vbuf_stage(r300->draw, render);
1136
1137 if (!stage) {
1138 render->destroy(render);
1139 return NULL;
1140 }
1141
1142 draw_set_render(r300->draw, render);
1143
1144 return stage;
1145 }
1146
1147 void r300_draw_flush_vbuf(struct r300_context *r300)
1148 {
1149 pipe_resource_reference(&r300->vbo, NULL);
1150 r300->draw_vbo_size = 0;
1151 }
1152
1153 /****************************************************************************
1154 * End of SW TCL functions *
1155 ***************************************************************************/
1156
1157 /* This functions is used to draw a rectangle for the blitter module.
1158 *
1159 * If we rendered a quad, the pixels on the main diagonal
1160 * would be computed and stored twice, which makes the clear/copy codepaths
1161 * somewhat inefficient. Instead we use a rectangular point sprite. */
1162 static void r300_blitter_draw_rectangle(struct blitter_context *blitter,
1163 unsigned x1, unsigned y1,
1164 unsigned x2, unsigned y2,
1165 float depth,
1166 enum blitter_attrib_type type,
1167 const union pipe_color_union *attrib)
1168 {
1169 struct r300_context *r300 = r300_context(util_blitter_get_pipe(blitter));
1170 unsigned last_sprite_coord_enable = r300->sprite_coord_enable;
1171 unsigned width = x2 - x1;
1172 unsigned height = y2 - y1;
1173 unsigned vertex_size =
1174 type == UTIL_BLITTER_ATTRIB_COLOR || !r300->draw ? 8 : 4;
1175 unsigned dwords = 13 + vertex_size +
1176 (type == UTIL_BLITTER_ATTRIB_TEXCOORD ? 7 : 0);
1177 static const union pipe_color_union zeros;
1178 CS_LOCALS(r300);
1179
1180 if (r300->skip_rendering)
1181 return;
1182
1183 r300->context.set_vertex_buffers(&r300->context, 0, NULL);
1184
1185 if (type == UTIL_BLITTER_ATTRIB_TEXCOORD)
1186 r300->sprite_coord_enable = 1;
1187
1188 r300_update_derived_state(r300);
1189
1190 /* Mark some states we don't care about as non-dirty. */
1191 r300->clip_state.dirty = FALSE;
1192 r300->viewport_state.dirty = FALSE;
1193
1194 if (!r300_prepare_for_rendering(r300, PREP_EMIT_STATES, NULL, dwords, 0, 0, -1))
1195 goto done;
1196
1197 DBG(r300, DBG_DRAW, "r300: draw_rectangle\n");
1198
1199 BEGIN_CS(dwords);
1200 /* Set up GA. */
1201 OUT_CS_REG(R300_GA_POINT_SIZE, (height * 6) | ((width * 6) << 16));
1202
1203 if (type == UTIL_BLITTER_ATTRIB_TEXCOORD) {
1204 /* Set up the GA to generate texcoords. */
1205 OUT_CS_REG(R300_GB_ENABLE, R300_GB_POINT_STUFF_ENABLE |
1206 (R300_GB_TEX_STR << R300_GB_TEX0_SOURCE_SHIFT));
1207 OUT_CS_REG_SEQ(R300_GA_POINT_S0, 4);
1208 OUT_CS_32F(attrib->f[0]);
1209 OUT_CS_32F(attrib->f[3]);
1210 OUT_CS_32F(attrib->f[2]);
1211 OUT_CS_32F(attrib->f[1]);
1212 }
1213
1214 /* Set up VAP controls. */
1215 OUT_CS_REG(R300_VAP_CLIP_CNTL, R300_CLIP_DISABLE);
1216 OUT_CS_REG(R300_VAP_VTE_CNTL, R300_VTX_XY_FMT | R300_VTX_Z_FMT);
1217 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size);
1218 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2);
1219 OUT_CS(1);
1220 OUT_CS(0);
1221
1222 /* Draw. */
1223 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, vertex_size);
1224 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (1 << 16) |
1225 R300_VAP_VF_CNTL__PRIM_POINTS);
1226
1227 OUT_CS_32F(x1 + width * 0.5f);
1228 OUT_CS_32F(y1 + height * 0.5f);
1229 OUT_CS_32F(depth);
1230 OUT_CS_32F(1);
1231
1232 if (vertex_size == 8) {
1233 if (!attrib)
1234 attrib = &zeros;
1235 OUT_CS_TABLE(attrib->f, 4);
1236 }
1237 END_CS;
1238
1239 done:
1240 /* Restore the state. */
1241 r300_mark_atom_dirty(r300, &r300->clip_state);
1242 r300_mark_atom_dirty(r300, &r300->rs_state);
1243 r300_mark_atom_dirty(r300, &r300->viewport_state);
1244
1245 r300->sprite_coord_enable = last_sprite_coord_enable;
1246 }
1247
1248 static void r300_resource_resolve(struct pipe_context *pipe,
1249 const struct pipe_resolve_info *info)
1250 {
1251 struct r300_context *r300 = r300_context(pipe);
1252 struct pipe_surface *srcsurf, *dstsurf, surf_tmpl;
1253 struct r300_aa_state *aa = (struct r300_aa_state*)r300->aa_state.state;
1254 static const union pipe_color_union color;
1255
1256 memset(&surf_tmpl, 0, sizeof(surf_tmpl));
1257 surf_tmpl.format = info->src.res->format;
1258 surf_tmpl.u.tex.first_layer =
1259 surf_tmpl.u.tex.last_layer = info->src.layer;
1260 srcsurf = pipe->create_surface(pipe, info->src.res, &surf_tmpl);
1261 /* XXX Offset both surfaces by x0,y1. */
1262
1263 surf_tmpl.format = info->dst.res->format;
1264 surf_tmpl.u.tex.level = info->dst.level;
1265 surf_tmpl.u.tex.first_layer =
1266 surf_tmpl.u.tex.last_layer = info->dst.layer;
1267 dstsurf = pipe->create_surface(pipe, info->dst.res, &surf_tmpl);
1268
1269 DBG(r300, DBG_DRAW, "r300: Resolving resource...\n");
1270
1271 /* Enable AA resolve. */
1272 aa->dest = r300_surface(dstsurf);
1273 aa->aaresolve_ctl =
1274 R300_RB3D_AARESOLVE_CTL_AARESOLVE_MODE_RESOLVE |
1275 R300_RB3D_AARESOLVE_CTL_AARESOLVE_ALPHA_AVERAGE;
1276 r300->aa_state.size = 10;
1277 r300_mark_atom_dirty(r300, &r300->aa_state);
1278
1279 /* Resolve the surface. */
1280 /* XXX: y1 < 0 ==> Y flip */
1281 r300->context.clear_render_target(pipe,
1282 srcsurf, &color, 0, 0,
1283 info->dst.x1 - info->dst.x0,
1284 info->dst.y1 - info->dst.y0);
1285
1286 /* Disable AA resolve. */
1287 aa->aaresolve_ctl = 0;
1288 r300->aa_state.size = 4;
1289 r300_mark_atom_dirty(r300, &r300->aa_state);
1290
1291 pipe_surface_reference(&srcsurf, NULL);
1292 pipe_surface_reference(&dstsurf, NULL);
1293 }
1294
1295 void r300_init_render_functions(struct r300_context *r300)
1296 {
1297 /* Set draw functions based on presence of HW TCL. */
1298 if (r300->screen->caps.has_tcl) {
1299 r300->context.draw_vbo = r300_draw_vbo;
1300 } else {
1301 r300->context.draw_vbo = r300_swtcl_draw_vbo;
1302 }
1303
1304 r300->context.resource_resolve = r300_resource_resolve;
1305 r300->blitter->draw_rectangle = r300_blitter_draw_rectangle;
1306
1307 /* Plug in the two-sided stencil reference value fallback if needed. */
1308 if (!r300->screen->caps.is_r500)
1309 r300_plug_in_stencil_ref_fallback(r300);
1310 }