gallium: Add PIPE_SHADER_CAP_FP16
[mesa.git] / src / gallium / drivers / r300 / r300_screen.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2010 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "util/u_format.h"
25 #include "util/u_format_s3tc.h"
26 #include "util/u_memory.h"
27 #include "os/os_time.h"
28 #include "vl/vl_decoder.h"
29 #include "vl/vl_video_buffer.h"
30
31 #include "r300_context.h"
32 #include "r300_texture.h"
33 #include "r300_screen_buffer.h"
34 #include "r300_state_inlines.h"
35 #include "r300_public.h"
36
37 #include "draw/draw_context.h"
38
39 /* Return the identifier behind whom the brave coders responsible for this
40 * amalgamation of code, sweat, and duct tape, routinely obscure their names.
41 *
42 * ...I should have just put "Corbin Simpson", but I'm not that cool.
43 *
44 * (Or egotistical. Yet.) */
45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
46 {
47 return "X.Org R300 Project";
48 }
49
50 static const char* r300_get_device_vendor(struct pipe_screen* pscreen)
51 {
52 return "ATI";
53 }
54
55 static const char* chip_families[] = {
56 "unknown",
57 "ATI R300",
58 "ATI R350",
59 "ATI RV350",
60 "ATI RV370",
61 "ATI RV380",
62 "ATI RS400",
63 "ATI RC410",
64 "ATI RS480",
65 "ATI R420",
66 "ATI R423",
67 "ATI R430",
68 "ATI R480",
69 "ATI R481",
70 "ATI RV410",
71 "ATI RS600",
72 "ATI RS690",
73 "ATI RS740",
74 "ATI RV515",
75 "ATI R520",
76 "ATI RV530",
77 "ATI R580",
78 "ATI RV560",
79 "ATI RV570"
80 };
81
82 static const char* r300_get_name(struct pipe_screen* pscreen)
83 {
84 struct r300_screen* r300screen = r300_screen(pscreen);
85
86 return chip_families[r300screen->caps.family];
87 }
88
89 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
90 {
91 struct r300_screen* r300screen = r300_screen(pscreen);
92 boolean is_r500 = r300screen->caps.is_r500;
93
94 switch (param) {
95 /* Supported features (boolean caps). */
96 case PIPE_CAP_NPOT_TEXTURES:
97 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
98 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
99 case PIPE_CAP_TWO_SIDED_STENCIL:
100 case PIPE_CAP_ANISOTROPIC_FILTER:
101 case PIPE_CAP_POINT_SPRITE:
102 case PIPE_CAP_OCCLUSION_QUERY:
103 case PIPE_CAP_TEXTURE_SHADOW_MAP:
104 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
105 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
106 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
107 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
108 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
109 case PIPE_CAP_CONDITIONAL_RENDER:
110 case PIPE_CAP_TEXTURE_BARRIER:
111 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
112 case PIPE_CAP_USER_CONSTANT_BUFFERS:
113 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
114 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
115 case PIPE_CAP_CLIP_HALFZ:
116 case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
117 return 1;
118
119 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
120 return R300_BUFFER_ALIGNMENT;
121
122 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
123 return 16;
124
125 case PIPE_CAP_GLSL_FEATURE_LEVEL:
126 return 120;
127
128 /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
129 case PIPE_CAP_TEXTURE_SWIZZLE:
130 return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1;
131
132 /* We don't support color clamping on r500, so that we can use color
133 * intepolators for generic varyings. */
134 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
135 return !is_r500;
136
137 /* Supported on r500 only. */
138 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
139 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
140 case PIPE_CAP_SM3:
141 return is_r500 ? 1 : 0;
142
143 /* Unsupported features. */
144 case PIPE_CAP_QUERY_TIME_ELAPSED:
145 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
146 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
147 case PIPE_CAP_INDEP_BLEND_ENABLE:
148 case PIPE_CAP_INDEP_BLEND_FUNC:
149 case PIPE_CAP_DEPTH_CLIP_DISABLE:
150 case PIPE_CAP_SHADER_STENCIL_EXPORT:
151 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
152 case PIPE_CAP_TGSI_INSTANCEID:
153 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
154 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
155 case PIPE_CAP_SEAMLESS_CUBE_MAP:
156 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
157 case PIPE_CAP_MIN_TEXEL_OFFSET:
158 case PIPE_CAP_MAX_TEXEL_OFFSET:
159 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
160 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
161 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
162 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
163 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
164 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
165 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
166 case PIPE_CAP_MAX_VERTEX_STREAMS:
167 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
168 case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
169 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
170 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
171 case PIPE_CAP_COMPUTE:
172 case PIPE_CAP_START_INSTANCE:
173 case PIPE_CAP_QUERY_TIMESTAMP:
174 case PIPE_CAP_TEXTURE_MULTISAMPLE:
175 case PIPE_CAP_CUBE_MAP_ARRAY:
176 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
177 case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
178 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
179 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
180 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
181 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
182 case PIPE_CAP_TEXTURE_GATHER_SM5:
183 case PIPE_CAP_TEXTURE_QUERY_LOD:
184 case PIPE_CAP_FAKE_SW_MSAA:
185 case PIPE_CAP_SAMPLE_SHADING:
186 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
187 case PIPE_CAP_DRAW_INDIRECT:
188 case PIPE_CAP_MULTI_DRAW_INDIRECT:
189 case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
190 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
191 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
192 case PIPE_CAP_SAMPLER_VIEW_TARGET:
193 case PIPE_CAP_VERTEXID_NOBASE:
194 case PIPE_CAP_POLYGON_OFFSET_CLAMP:
195 case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
196 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
197 case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
198 case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
199 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
200 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
201 case PIPE_CAP_DEPTH_BOUNDS_TEST:
202 case PIPE_CAP_TGSI_TXQS:
203 case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
204 case PIPE_CAP_SHAREABLE_SHADERS:
205 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
206 case PIPE_CAP_CLEAR_TEXTURE:
207 case PIPE_CAP_DRAW_PARAMETERS:
208 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
209 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
210 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
211 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
212 case PIPE_CAP_INVALIDATE_BUFFER:
213 case PIPE_CAP_GENERATE_MIPMAP:
214 case PIPE_CAP_STRING_MARKER:
215 case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
216 case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
217 case PIPE_CAP_QUERY_BUFFER_OBJECT:
218 case PIPE_CAP_QUERY_MEMORY_INFO:
219 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
220 case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
221 case PIPE_CAP_CULL_DISTANCE:
222 case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
223 case PIPE_CAP_TGSI_VOTE:
224 case PIPE_CAP_MAX_WINDOW_RECTANGLES:
225 case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
226 case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
227 case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
228 case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
229 case PIPE_CAP_NATIVE_FENCE_FD:
230 case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
231 case PIPE_CAP_TGSI_FS_FBFETCH:
232 case PIPE_CAP_TGSI_MUL_ZERO_WINS:
233 case PIPE_CAP_DOUBLES:
234 case PIPE_CAP_INT64:
235 case PIPE_CAP_INT64_DIVMOD:
236 case PIPE_CAP_TGSI_TEX_TXF_LZ:
237 case PIPE_CAP_TGSI_CLOCK:
238 case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
239 case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
240 case PIPE_CAP_TGSI_BALLOT:
241 case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
242 case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
243 case PIPE_CAP_POST_DEPTH_COVERAGE:
244 case PIPE_CAP_BINDLESS_TEXTURE:
245 case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
246 case PIPE_CAP_QUERY_SO_OVERFLOW:
247 case PIPE_CAP_MEMOBJ:
248 case PIPE_CAP_LOAD_CONSTBUF:
249 return 0;
250
251 /* SWTCL-only features. */
252 case PIPE_CAP_PRIMITIVE_RESTART:
253 case PIPE_CAP_USER_VERTEX_BUFFERS:
254 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
255 return !r300screen->caps.has_tcl;
256
257 /* HWTCL-only features / limitations. */
258 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
259 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
260 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
261 return r300screen->caps.has_tcl;
262 case PIPE_CAP_TGSI_TEXCOORD:
263 return 0;
264
265 /* Texturing. */
266 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
267 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
268 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
269 /* 13 == 4096, 12 == 2048 */
270 return is_r500 ? 13 : 12;
271
272 /* Render targets. */
273 case PIPE_CAP_MAX_RENDER_TARGETS:
274 return 4;
275 case PIPE_CAP_ENDIANNESS:
276 return PIPE_ENDIAN_LITTLE;
277
278 case PIPE_CAP_MAX_VIEWPORTS:
279 return 1;
280
281 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
282 return 2048;
283
284 case PIPE_CAP_VENDOR_ID:
285 return 0x1002;
286 case PIPE_CAP_DEVICE_ID:
287 return r300screen->info.pci_id;
288 case PIPE_CAP_ACCELERATED:
289 return 1;
290 case PIPE_CAP_VIDEO_MEMORY:
291 return r300screen->info.vram_size >> 20;
292 case PIPE_CAP_UMA:
293 return 0;
294 case PIPE_CAP_PCI_GROUP:
295 return r300screen->info.pci_domain;
296 case PIPE_CAP_PCI_BUS:
297 return r300screen->info.pci_bus;
298 case PIPE_CAP_PCI_DEVICE:
299 return r300screen->info.pci_dev;
300 case PIPE_CAP_PCI_FUNCTION:
301 return r300screen->info.pci_func;
302 }
303 return 0;
304 }
305
306 static int r300_get_shader_param(struct pipe_screen *pscreen,
307 enum pipe_shader_type shader,
308 enum pipe_shader_cap param)
309 {
310 struct r300_screen* r300screen = r300_screen(pscreen);
311 boolean is_r400 = r300screen->caps.is_r400;
312 boolean is_r500 = r300screen->caps.is_r500;
313
314 switch (shader) {
315 case PIPE_SHADER_FRAGMENT:
316 switch (param)
317 {
318 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
319 return is_r500 || is_r400 ? 512 : 96;
320 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
321 return is_r500 || is_r400 ? 512 : 64;
322 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
323 return is_r500 || is_r400 ? 512 : 32;
324 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
325 return is_r500 ? 511 : 4;
326 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
327 return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
328 /* Fragment shader limits. */
329 case PIPE_SHADER_CAP_MAX_INPUTS:
330 /* 2 colors + 8 texcoords are always supported
331 * (minus fog and wpos).
332 *
333 * R500 has the ability to turn 3rd and 4th color into
334 * additional texcoords but there is no two-sided color
335 * selection then. However the facing bit can be used instead. */
336 return 10;
337 case PIPE_SHADER_CAP_MAX_OUTPUTS:
338 return 4;
339 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
340 return (is_r500 ? 256 : 32) * sizeof(float[4]);
341 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
342 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
343 return 1;
344 case PIPE_SHADER_CAP_MAX_TEMPS:
345 return is_r500 ? 128 : is_r400 ? 64 : 32;
346 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
347 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
348 return r300screen->caps.num_tex_units;
349 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
350 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
351 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
352 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
353 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
354 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
355 case PIPE_SHADER_CAP_SUBROUTINES:
356 case PIPE_SHADER_CAP_INTEGERS:
357 case PIPE_SHADER_CAP_FP16:
358 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
359 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
360 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
361 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
362 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
363 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
364 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
365 return 0;
366 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
367 return 32;
368 case PIPE_SHADER_CAP_PREFERRED_IR:
369 return PIPE_SHADER_IR_TGSI;
370 case PIPE_SHADER_CAP_SUPPORTED_IRS:
371 return 0;
372 }
373 break;
374 case PIPE_SHADER_VERTEX:
375 switch (param)
376 {
377 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
378 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
379 case PIPE_SHADER_CAP_SUBROUTINES:
380 return 0;
381 default:;
382 }
383
384 if (!r300screen->caps.has_tcl) {
385 return draw_get_shader_param(shader, param);
386 }
387
388 switch (param)
389 {
390 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
391 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
392 return is_r500 ? 1024 : 256;
393 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
394 return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
395 case PIPE_SHADER_CAP_MAX_INPUTS:
396 return 16;
397 case PIPE_SHADER_CAP_MAX_OUTPUTS:
398 return 10;
399 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
400 return 256 * sizeof(float[4]);
401 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
402 return 1;
403 case PIPE_SHADER_CAP_MAX_TEMPS:
404 return 32;
405 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
406 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
407 return 1;
408 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
409 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
410 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
411 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
412 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
413 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
414 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
415 case PIPE_SHADER_CAP_SUBROUTINES:
416 case PIPE_SHADER_CAP_INTEGERS:
417 case PIPE_SHADER_CAP_FP16:
418 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
419 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
420 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
421 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
422 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
423 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
424 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
425 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
426 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
427 return 0;
428 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
429 return 32;
430 case PIPE_SHADER_CAP_PREFERRED_IR:
431 return PIPE_SHADER_IR_TGSI;
432 case PIPE_SHADER_CAP_SUPPORTED_IRS:
433 return 0;
434 }
435 break;
436 default:
437 ; /* nothing */
438 }
439 return 0;
440 }
441
442 static float r300_get_paramf(struct pipe_screen* pscreen,
443 enum pipe_capf param)
444 {
445 struct r300_screen* r300screen = r300_screen(pscreen);
446
447 switch (param) {
448 case PIPE_CAPF_MAX_LINE_WIDTH:
449 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
450 case PIPE_CAPF_MAX_POINT_WIDTH:
451 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
452 /* The maximum dimensions of the colorbuffer are our practical
453 * rendering limits. 2048 pixels should be enough for anybody. */
454 if (r300screen->caps.is_r500) {
455 return 4096.0f;
456 } else if (r300screen->caps.is_r400) {
457 return 4021.0f;
458 } else {
459 return 2560.0f;
460 }
461 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
462 return 16.0f;
463 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
464 return 16.0f;
465 case PIPE_CAPF_GUARD_BAND_LEFT:
466 case PIPE_CAPF_GUARD_BAND_TOP:
467 case PIPE_CAPF_GUARD_BAND_RIGHT:
468 case PIPE_CAPF_GUARD_BAND_BOTTOM:
469 return 0.0f;
470 default:
471 debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
472 param);
473 return 0.0f;
474 }
475 }
476
477 static int r300_get_video_param(struct pipe_screen *screen,
478 enum pipe_video_profile profile,
479 enum pipe_video_entrypoint entrypoint,
480 enum pipe_video_cap param)
481 {
482 switch (param) {
483 case PIPE_VIDEO_CAP_SUPPORTED:
484 return vl_profile_supported(screen, profile, entrypoint);
485 case PIPE_VIDEO_CAP_NPOT_TEXTURES:
486 return 0;
487 case PIPE_VIDEO_CAP_MAX_WIDTH:
488 case PIPE_VIDEO_CAP_MAX_HEIGHT:
489 return vl_video_buffer_max_size(screen);
490 case PIPE_VIDEO_CAP_PREFERED_FORMAT:
491 return PIPE_FORMAT_NV12;
492 case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
493 return false;
494 case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
495 return false;
496 case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
497 return true;
498 case PIPE_VIDEO_CAP_MAX_LEVEL:
499 return vl_level_supported(screen, profile);
500 default:
501 return 0;
502 }
503 }
504
505 /**
506 * Whether the format matches:
507 * PIPE_FORMAT_?10?10?10?2_UNORM
508 */
509 static inline boolean
510 util_format_is_rgba1010102_variant(const struct util_format_description *desc)
511 {
512 static const unsigned size[4] = {10, 10, 10, 2};
513 unsigned chan;
514
515 if (desc->block.width != 1 ||
516 desc->block.height != 1 ||
517 desc->block.bits != 32)
518 return FALSE;
519
520 for (chan = 0; chan < 4; ++chan) {
521 if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
522 desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
523 return FALSE;
524 if (desc->channel[chan].size != size[chan])
525 return FALSE;
526 }
527
528 return TRUE;
529 }
530
531 static bool r300_is_blending_supported(struct r300_screen *rscreen,
532 enum pipe_format format)
533 {
534 int c;
535 const struct util_format_description *desc =
536 util_format_description(format);
537
538 if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
539 return false;
540
541 c = util_format_get_first_non_void_channel(format);
542
543 /* RGBA16F */
544 if (rscreen->caps.is_r500 &&
545 desc->nr_channels == 4 &&
546 desc->channel[c].size == 16 &&
547 desc->channel[c].type == UTIL_FORMAT_TYPE_FLOAT)
548 return true;
549
550 if (desc->channel[c].normalized &&
551 desc->channel[c].type == UTIL_FORMAT_TYPE_UNSIGNED &&
552 desc->channel[c].size >= 4 &&
553 desc->channel[c].size <= 10) {
554 /* RGB10_A2, RGBA8, RGB5_A1, RGBA4, RGB565 */
555 if (desc->nr_channels >= 3)
556 return true;
557
558 if (format == PIPE_FORMAT_R8G8_UNORM)
559 return true;
560
561 /* R8, I8, L8, A8 */
562 if (desc->nr_channels == 1)
563 return true;
564 }
565
566 return false;
567 }
568
569 static boolean r300_is_format_supported(struct pipe_screen* screen,
570 enum pipe_format format,
571 enum pipe_texture_target target,
572 unsigned sample_count,
573 unsigned usage)
574 {
575 uint32_t retval = 0;
576 boolean is_r500 = r300_screen(screen)->caps.is_r500;
577 boolean is_r400 = r300_screen(screen)->caps.is_r400;
578 boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
579 format == PIPE_FORMAT_R10G10B10X2_SNORM ||
580 format == PIPE_FORMAT_B10G10R10A2_UNORM ||
581 format == PIPE_FORMAT_B10G10R10X2_UNORM ||
582 format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
583 boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
584 format == PIPE_FORMAT_RGTC1_SNORM ||
585 format == PIPE_FORMAT_LATC1_UNORM ||
586 format == PIPE_FORMAT_LATC1_SNORM;
587 boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
588 format == PIPE_FORMAT_RGTC2_SNORM ||
589 format == PIPE_FORMAT_LATC2_UNORM ||
590 format == PIPE_FORMAT_LATC2_SNORM;
591 boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
592 format == PIPE_FORMAT_R16G16_FLOAT ||
593 format == PIPE_FORMAT_R16G16B16_FLOAT ||
594 format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
595 format == PIPE_FORMAT_R16G16B16X16_FLOAT;
596 const struct util_format_description *desc;
597
598 if (!util_format_is_supported(format, usage))
599 return FALSE;
600
601 /* Check multisampling support. */
602 switch (sample_count) {
603 case 0:
604 case 1:
605 break;
606 case 2:
607 case 4:
608 case 6:
609 /* No texturing and scanout. */
610 if (usage & (PIPE_BIND_SAMPLER_VIEW |
611 PIPE_BIND_DISPLAY_TARGET |
612 PIPE_BIND_SCANOUT)) {
613 return FALSE;
614 }
615
616 desc = util_format_description(format);
617
618 if (is_r500) {
619 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
620 if (!util_format_is_depth_or_stencil(format) &&
621 !util_format_is_rgba8_variant(desc) &&
622 !util_format_is_rgba1010102_variant(desc) &&
623 format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
624 format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
625 return FALSE;
626 }
627 } else {
628 /* Only allow depth/stencil, RGBA8. */
629 if (!util_format_is_depth_or_stencil(format) &&
630 !util_format_is_rgba8_variant(desc)) {
631 return FALSE;
632 }
633 }
634 break;
635 default:
636 return FALSE;
637 }
638
639 /* Check sampler format support. */
640 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
641 /* these two are broken for an unknown reason */
642 format != PIPE_FORMAT_R8G8B8X8_SNORM &&
643 format != PIPE_FORMAT_R16G16B16X16_SNORM &&
644 /* ATI1N is r5xx-only. */
645 (is_r500 || !is_ati1n) &&
646 /* ATI2N is supported on r4xx-r5xx. */
647 (is_r400 || is_r500 || !is_ati2n) &&
648 r300_is_sampler_format_supported(format)) {
649 retval |= PIPE_BIND_SAMPLER_VIEW;
650 }
651
652 /* Check colorbuffer format support. */
653 if ((usage & (PIPE_BIND_RENDER_TARGET |
654 PIPE_BIND_DISPLAY_TARGET |
655 PIPE_BIND_SCANOUT |
656 PIPE_BIND_SHARED |
657 PIPE_BIND_BLENDABLE)) &&
658 /* 2101010 cannot be rendered to on non-r5xx. */
659 (!is_color2101010 || is_r500) &&
660 r300_is_colorbuffer_format_supported(format)) {
661 retval |= usage &
662 (PIPE_BIND_RENDER_TARGET |
663 PIPE_BIND_DISPLAY_TARGET |
664 PIPE_BIND_SCANOUT |
665 PIPE_BIND_SHARED);
666
667 if (r300_is_blending_supported(r300_screen(screen), format)) {
668 retval |= usage & PIPE_BIND_BLENDABLE;
669 }
670 }
671
672 /* Check depth-stencil format support. */
673 if (usage & PIPE_BIND_DEPTH_STENCIL &&
674 r300_is_zs_format_supported(format)) {
675 retval |= PIPE_BIND_DEPTH_STENCIL;
676 }
677
678 /* Check vertex buffer format support. */
679 if (usage & PIPE_BIND_VERTEX_BUFFER) {
680 if (r300_screen(screen)->caps.has_tcl) {
681 /* Half float is supported on >= R400. */
682 if ((is_r400 || is_r500 || !is_half_float) &&
683 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
684 retval |= PIPE_BIND_VERTEX_BUFFER;
685 }
686 } else {
687 /* SW TCL */
688 if (!util_format_is_pure_integer(format)) {
689 retval |= PIPE_BIND_VERTEX_BUFFER;
690 }
691 }
692 }
693
694 return retval == usage;
695 }
696
697 static void r300_destroy_screen(struct pipe_screen* pscreen)
698 {
699 struct r300_screen* r300screen = r300_screen(pscreen);
700 struct radeon_winsys *rws = radeon_winsys(pscreen);
701
702 if (rws && !rws->unref(rws))
703 return;
704
705 mtx_destroy(&r300screen->cmask_mutex);
706 slab_destroy_parent(&r300screen->pool_transfers);
707
708 if (rws)
709 rws->destroy(rws);
710
711 FREE(r300screen);
712 }
713
714 static void r300_fence_reference(struct pipe_screen *screen,
715 struct pipe_fence_handle **ptr,
716 struct pipe_fence_handle *fence)
717 {
718 struct radeon_winsys *rws = r300_screen(screen)->rws;
719
720 rws->fence_reference(ptr, fence);
721 }
722
723 static boolean r300_fence_finish(struct pipe_screen *screen,
724 struct pipe_context *ctx,
725 struct pipe_fence_handle *fence,
726 uint64_t timeout)
727 {
728 struct radeon_winsys *rws = r300_screen(screen)->rws;
729
730 return rws->fence_wait(rws, fence, timeout);
731 }
732
733 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws,
734 const struct pipe_screen_config *config)
735 {
736 struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
737
738 if (!r300screen) {
739 FREE(r300screen);
740 return NULL;
741 }
742
743 rws->query_info(rws, &r300screen->info);
744
745 r300_init_debug(r300screen);
746 r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
747
748 if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
749 r300screen->caps.zmask_ram = 0;
750 if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
751 r300screen->caps.hiz_ram = 0;
752
753 r300screen->rws = rws;
754 r300screen->screen.destroy = r300_destroy_screen;
755 r300screen->screen.get_name = r300_get_name;
756 r300screen->screen.get_vendor = r300_get_vendor;
757 r300screen->screen.get_device_vendor = r300_get_device_vendor;
758 r300screen->screen.get_param = r300_get_param;
759 r300screen->screen.get_shader_param = r300_get_shader_param;
760 r300screen->screen.get_paramf = r300_get_paramf;
761 r300screen->screen.get_video_param = r300_get_video_param;
762 r300screen->screen.is_format_supported = r300_is_format_supported;
763 r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
764 r300screen->screen.context_create = r300_create_context;
765 r300screen->screen.fence_reference = r300_fence_reference;
766 r300screen->screen.fence_finish = r300_fence_finish;
767
768 r300_init_screen_resource_functions(r300screen);
769
770 slab_create_parent(&r300screen->pool_transfers, sizeof(struct pipe_transfer), 64);
771
772 util_format_s3tc_init();
773 (void) mtx_init(&r300screen->cmask_mutex, mtx_plain);
774
775 return &r300screen->screen;
776 }