src/gallium/drivers/r300/r300_screen.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2010 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 #include "util/u_format.h"
  25 #include "util/u_format_s3tc.h"
  26 #include "util/u_memory.h"
  27 #include "util/os_time.h"
  28 #include "vl/vl_decoder.h"
  29 #include "vl/vl_video_buffer.h"
  30
  31 #include "r300_context.h"
  32 #include "r300_texture.h"
  33 #include "r300_screen_buffer.h"
  34 #include "r300_state_inlines.h"
  35 #include "r300_public.h"
  36
  37 #include "draw/draw_context.h"
  38
  39 /* Return the identifier behind whom the brave coders responsible for this
  40  * amalgamation of code, sweat, and duct tape, routinely obscure their names.
  41  *
  42  * ...I should have just put "Corbin Simpson", but I'm not that cool.
  43  *
  44  * (Or egotistical. Yet.) */
  45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
  46 {
  47     return "X.Org R300 Project";
  48 }
  49
  50 static const char* r300_get_device_vendor(struct pipe_screen* pscreen)
  51 {
  52     return "ATI";
  53 }
  54
  55 static const char* chip_families[] = {
  56     "unknown",
  57     "ATI R300",
  58     "ATI R350",
  59     "ATI RV350",
  60     "ATI RV370",
  61     "ATI RV380",
  62     "ATI RS400",
  63     "ATI RC410",
  64     "ATI RS480",
  65     "ATI R420",
  66     "ATI R423",
  67     "ATI R430",
  68     "ATI R480",
  69     "ATI R481",
  70     "ATI RV410",
  71     "ATI RS600",
  72     "ATI RS690",
  73     "ATI RS740",
  74     "ATI RV515",
  75     "ATI R520",
  76     "ATI RV530",
  77     "ATI R580",
  78     "ATI RV560",
  79     "ATI RV570"
  80 };
  81
  82 static const char* r300_get_name(struct pipe_screen* pscreen)
  83 {
  84     struct r300_screen* r300screen = r300_screen(pscreen);
  85
  86     return chip_families[r300screen->caps.family];
  87 }
  88
  89 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
  90 {
  91     struct r300_screen* r300screen = r300_screen(pscreen);
  92     boolean is_r500 = r300screen->caps.is_r500;
  93
  94     switch (param) {
  95         /* Supported features (boolean caps). */
  96         case PIPE_CAP_NPOT_TEXTURES:
  97         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
  98         case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
  99         case PIPE_CAP_ANISOTROPIC_FILTER:
 100         case PIPE_CAP_POINT_SPRITE:
 101         case PIPE_CAP_OCCLUSION_QUERY:
 102         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 103         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 104         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 105         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 106         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 107         case PIPE_CAP_CONDITIONAL_RENDER:
 108         case PIPE_CAP_TEXTURE_BARRIER:
 109         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 110         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 111         case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 112         case PIPE_CAP_CLIP_HALFZ:
 113         case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
 114             return 1;
 115
 116         case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 117             return R300_BUFFER_ALIGNMENT;
 118
 119         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 120             return 16;
 121
 122         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 123             return 120;
 124
 125         /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
 126         case PIPE_CAP_TEXTURE_SWIZZLE:
 127             return r300screen->caps.dxtc_swizzle;
 128
 129         /* We don't support color clamping on r500, so that we can use color
 130          * intepolators for generic varyings. */
 131         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 132             return !is_r500;
 133
 134         /* Supported on r500 only. */
 135         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 136         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 137         case PIPE_CAP_SM3:
 138             return is_r500 ? 1 : 0;
 139
 140         /* Unsupported features. */
 141         case PIPE_CAP_QUERY_TIME_ELAPSED:
 142         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 143         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 144         case PIPE_CAP_INDEP_BLEND_ENABLE:
 145         case PIPE_CAP_INDEP_BLEND_FUNC:
 146         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 147         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 148         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 149         case PIPE_CAP_TGSI_INSTANCEID:
 150         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 151         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 152         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 153         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 154         case PIPE_CAP_MIN_TEXEL_OFFSET:
 155         case PIPE_CAP_MAX_TEXEL_OFFSET:
 156         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 157         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 158         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 159         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 160         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 161         case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 162         case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 163         case PIPE_CAP_MAX_VERTEX_STREAMS:
 164         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 165         case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
 166         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 167         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 168         case PIPE_CAP_COMPUTE:
 169         case PIPE_CAP_START_INSTANCE:
 170         case PIPE_CAP_QUERY_TIMESTAMP:
 171         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 172         case PIPE_CAP_CUBE_MAP_ARRAY:
 173         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 174         case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 175         case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 176         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 177         case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 178         case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 179         case PIPE_CAP_TEXTURE_GATHER_SM5:
 180         case PIPE_CAP_TEXTURE_QUERY_LOD:
 181         case PIPE_CAP_FAKE_SW_MSAA:
 182         case PIPE_CAP_SAMPLE_SHADING:
 183         case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 184         case PIPE_CAP_DRAW_INDIRECT:
 185         case PIPE_CAP_MULTI_DRAW_INDIRECT:
 186         case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
 187         case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 188         case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 189         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 190         case PIPE_CAP_VERTEXID_NOBASE:
 191         case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 192         case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 193         case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 194         case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 195         case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
 196         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 197         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 198         case PIPE_CAP_DEPTH_BOUNDS_TEST:
 199         case PIPE_CAP_TGSI_TXQS:
 200         case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
 201         case PIPE_CAP_SHAREABLE_SHADERS:
 202         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 203         case PIPE_CAP_CLEAR_TEXTURE:
 204         case PIPE_CAP_DRAW_PARAMETERS:
 205         case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
 206         case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 207         case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 208         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 209         case PIPE_CAP_INVALIDATE_BUFFER:
 210         case PIPE_CAP_GENERATE_MIPMAP:
 211         case PIPE_CAP_STRING_MARKER:
 212         case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
 213         case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
 214         case PIPE_CAP_QUERY_BUFFER_OBJECT:
 215         case PIPE_CAP_QUERY_MEMORY_INFO:
 216         case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
 217         case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
 218         case PIPE_CAP_CULL_DISTANCE:
 219         case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
 220         case PIPE_CAP_TGSI_VOTE:
 221         case PIPE_CAP_MAX_WINDOW_RECTANGLES:
 222         case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
 223         case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
 224         case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
 225         case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
 226         case PIPE_CAP_NATIVE_FENCE_FD:
 227         case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
 228         case PIPE_CAP_TGSI_FS_FBFETCH:
 229         case PIPE_CAP_TGSI_MUL_ZERO_WINS:
 230         case PIPE_CAP_DOUBLES:
 231         case PIPE_CAP_INT64:
 232         case PIPE_CAP_INT64_DIVMOD:
 233         case PIPE_CAP_TGSI_TEX_TXF_LZ:
 234         case PIPE_CAP_TGSI_CLOCK:
 235         case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
 236         case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
 237         case PIPE_CAP_TGSI_BALLOT:
 238         case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
 239         case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
 240         case PIPE_CAP_POST_DEPTH_COVERAGE:
 241         case PIPE_CAP_BINDLESS_TEXTURE:
 242         case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
 243         case PIPE_CAP_QUERY_SO_OVERFLOW:
 244         case PIPE_CAP_MEMOBJ:
 245         case PIPE_CAP_LOAD_CONSTBUF:
 246         case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
 247         case PIPE_CAP_TILE_RASTER_ORDER:
 248         case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
 249         case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
 250         case PIPE_CAP_CONTEXT_PRIORITY_MASK:
 251         case PIPE_CAP_FENCE_SIGNAL:
 252         case PIPE_CAP_CONSTBUF0_FLAGS:
 253         case PIPE_CAP_PACKED_UNIFORMS:
 254         case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES:
 255         case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES:
 256         case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES:
 257         case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
 258         case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
 259         case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
 260             return 0;
 261
 262         /* SWTCL-only features. */
 263         case PIPE_CAP_PRIMITIVE_RESTART:
 264         case PIPE_CAP_USER_VERTEX_BUFFERS:
 265         case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 266             return !r300screen->caps.has_tcl;
 267
 268         /* HWTCL-only features / limitations. */
 269         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 270         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 271         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 272             return r300screen->caps.has_tcl;
 273         case PIPE_CAP_TGSI_TEXCOORD:
 274             return 0;
 275
 276         /* Texturing. */
 277         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 278         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 279         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 280             /* 13 == 4096, 12 == 2048 */
 281             return is_r500 ? 13 : 12;
 282
 283         /* Render targets. */
 284         case PIPE_CAP_MAX_RENDER_TARGETS:
 285             return 4;
 286         case PIPE_CAP_ENDIANNESS:
 287             return PIPE_ENDIAN_LITTLE;
 288
 289         case PIPE_CAP_MAX_VIEWPORTS:
 290             return 1;
 291
 292         case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 293             return 2048;
 294
 295         case PIPE_CAP_VENDOR_ID:
 296                 return 0x1002;
 297         case PIPE_CAP_DEVICE_ID:
 298                 return r300screen->info.pci_id;
 299         case PIPE_CAP_ACCELERATED:
 300                 return 1;
 301         case PIPE_CAP_VIDEO_MEMORY:
 302                 return r300screen->info.vram_size >> 20;
 303         case PIPE_CAP_UMA:
 304                 return 0;
 305         case PIPE_CAP_PCI_GROUP:
 306             return r300screen->info.pci_domain;
 307         case PIPE_CAP_PCI_BUS:
 308             return r300screen->info.pci_bus;
 309         case PIPE_CAP_PCI_DEVICE:
 310             return r300screen->info.pci_dev;
 311         case PIPE_CAP_PCI_FUNCTION:
 312             return r300screen->info.pci_func;
 313     }
 314     return 0;
 315 }
 316
 317 static int r300_get_shader_param(struct pipe_screen *pscreen,
 318                                  enum pipe_shader_type shader,
 319                                  enum pipe_shader_cap param)
 320 {
 321    struct r300_screen* r300screen = r300_screen(pscreen);
 322    boolean is_r400 = r300screen->caps.is_r400;
 323    boolean is_r500 = r300screen->caps.is_r500;
 324
 325    switch (shader) {
 326     case PIPE_SHADER_FRAGMENT:
 327         switch (param)
 328         {
 329         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 330             return is_r500 || is_r400 ? 512 : 96;
 331         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 332             return is_r500 || is_r400 ? 512 : 64;
 333         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 334             return is_r500 || is_r400 ? 512 : 32;
 335         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 336             return is_r500 ? 511 : 4;
 337         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 338             return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
 339             /* Fragment shader limits. */
 340         case PIPE_SHADER_CAP_MAX_INPUTS:
 341             /* 2 colors + 8 texcoords are always supported
 342              * (minus fog and wpos).
 343              *
 344              * R500 has the ability to turn 3rd and 4th color into
 345              * additional texcoords but there is no two-sided color
 346              * selection then. However the facing bit can be used instead. */
 347             return 10;
 348         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 349             return 4;
 350         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 351             return (is_r500 ? 256 : 32) * sizeof(float[4]);
 352         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 353         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 354             return 1;
 355         case PIPE_SHADER_CAP_MAX_TEMPS:
 356             return is_r500 ? 128 : is_r400 ? 64 : 32;
 357         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 358         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 359            return r300screen->caps.num_tex_units;
 360         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 361         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 362         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 363         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 364         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 365         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 366         case PIPE_SHADER_CAP_SUBROUTINES:
 367         case PIPE_SHADER_CAP_INTEGERS:
 368         case PIPE_SHADER_CAP_INT64_ATOMICS:
 369         case PIPE_SHADER_CAP_FP16:
 370         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 371         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 372         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
 373         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 374         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 375         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 376         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 377         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 378         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 379         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 380             return 0;
 381         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 382             return 32;
 383         case PIPE_SHADER_CAP_PREFERRED_IR:
 384             return PIPE_SHADER_IR_TGSI;
 385         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 386             return 0;
 387         }
 388         break;
 389     case PIPE_SHADER_VERTEX:
 390         switch (param)
 391         {
 392         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 393         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 394         case PIPE_SHADER_CAP_SUBROUTINES:
 395             return 0;
 396         default:;
 397         }
 398
 399         if (!r300screen->caps.has_tcl) {
 400             return draw_get_shader_param(shader, param);
 401         }
 402
 403         switch (param)
 404         {
 405         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 406         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 407             return is_r500 ? 1024 : 256;
 408         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 409             return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
 410         case PIPE_SHADER_CAP_MAX_INPUTS:
 411             return 16;
 412         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 413             return 10;
 414         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 415             return 256 * sizeof(float[4]);
 416         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 417             return 1;
 418         case PIPE_SHADER_CAP_MAX_TEMPS:
 419             return 32;
 420         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 421         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 422             return 1;
 423         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 424         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 425         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 426         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 427         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 428         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 429         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 430         case PIPE_SHADER_CAP_SUBROUTINES:
 431         case PIPE_SHADER_CAP_INTEGERS:
 432         case PIPE_SHADER_CAP_FP16:
 433         case PIPE_SHADER_CAP_INT64_ATOMICS:
 434         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 435         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 436         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 437         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 438         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
 439         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 440         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 441         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 442         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 443         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 444         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 445         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 446             return 0;
 447         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 448             return 32;
 449         case PIPE_SHADER_CAP_PREFERRED_IR:
 450             return PIPE_SHADER_IR_TGSI;
 451         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 452             return 0;
 453         }
 454         break;
 455     default:
 456         ; /* nothing */
 457     }
 458     return 0;
 459 }
 460
 461 static float r300_get_paramf(struct pipe_screen* pscreen,
 462                              enum pipe_capf param)
 463 {
 464     struct r300_screen* r300screen = r300_screen(pscreen);
 465
 466     switch (param) {
 467         case PIPE_CAPF_MAX_LINE_WIDTH:
 468         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 469         case PIPE_CAPF_MAX_POINT_WIDTH:
 470         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 471             /* The maximum dimensions of the colorbuffer are our practical
 472              * rendering limits. 2048 pixels should be enough for anybody. */
 473             if (r300screen->caps.is_r500) {
 474                 return 4096.0f;
 475             } else if (r300screen->caps.is_r400) {
 476                 return 4021.0f;
 477             } else {
 478                 return 2560.0f;
 479             }
 480         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 481             return 16.0f;
 482         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 483             return 16.0f;
 484         case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
 485         case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
 486         case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
 487             return 0.0f;
 488         default:
 489             debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
 490                          param);
 491             return 0.0f;
 492     }
 493 }
 494
 495 static int r300_get_video_param(struct pipe_screen *screen,
 496                                 enum pipe_video_profile profile,
 497                                 enum pipe_video_entrypoint entrypoint,
 498                                 enum pipe_video_cap param)
 499 {
 500    switch (param) {
 501       case PIPE_VIDEO_CAP_SUPPORTED:
 502          return vl_profile_supported(screen, profile, entrypoint);
 503       case PIPE_VIDEO_CAP_NPOT_TEXTURES:
 504          return 0;
 505       case PIPE_VIDEO_CAP_MAX_WIDTH:
 506       case PIPE_VIDEO_CAP_MAX_HEIGHT:
 507          return vl_video_buffer_max_size(screen);
 508       case PIPE_VIDEO_CAP_PREFERED_FORMAT:
 509          return PIPE_FORMAT_NV12;
 510       case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
 511          return false;
 512       case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
 513          return false;
 514       case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
 515          return true;
 516       case PIPE_VIDEO_CAP_MAX_LEVEL:
 517          return vl_level_supported(screen, profile);
 518       default:
 519          return 0;
 520    }
 521 }
 522
 523 /**
 524  * Whether the format matches:
 525  *   PIPE_FORMAT_?10?10?10?2_UNORM
 526  */
 527 static inline boolean
 528 util_format_is_rgba1010102_variant(const struct util_format_description *desc)
 529 {
 530    static const unsigned size[4] = {10, 10, 10, 2};
 531    unsigned chan;
 532
 533    if (desc->block.width != 1 ||
 534        desc->block.height != 1 ||
 535        desc->block.bits != 32)
 536       return FALSE;
 537
 538    for (chan = 0; chan < 4; ++chan) {
 539       if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
 540          desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
 541          return FALSE;
 542       if (desc->channel[chan].size != size[chan])
 543          return FALSE;
 544    }
 545
 546    return TRUE;
 547 }
 548
 549 static bool r300_is_blending_supported(struct r300_screen *rscreen,
 550                                        enum pipe_format format)
 551 {
 552     int c;
 553     const struct util_format_description *desc =
 554         util_format_description(format);
 555
 556     if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
 557         return false;
 558
 559     c = util_format_get_first_non_void_channel(format);
 560
 561     /* RGBA16F */
 562     if (rscreen->caps.is_r500 &&
 563         desc->nr_channels == 4 &&
 564         desc->channel[c].size == 16 &&
 565         desc->channel[c].type == UTIL_FORMAT_TYPE_FLOAT)
 566         return true;
 567
 568     if (desc->channel[c].normalized &&
 569         desc->channel[c].type == UTIL_FORMAT_TYPE_UNSIGNED &&
 570         desc->channel[c].size >= 4 &&
 571         desc->channel[c].size <= 10) {
 572         /* RGB10_A2, RGBA8, RGB5_A1, RGBA4, RGB565 */
 573         if (desc->nr_channels >= 3)
 574             return true;
 575
 576         if (format == PIPE_FORMAT_R8G8_UNORM)
 577             return true;
 578
 579         /* R8, I8, L8, A8 */
 580         if (desc->nr_channels == 1)
 581             return true;
 582     }
 583
 584     return false;
 585 }
 586
 587 static boolean r300_is_format_supported(struct pipe_screen* screen,
 588                                         enum pipe_format format,
 589                                         enum pipe_texture_target target,
 590                                         unsigned sample_count,
 591                                         unsigned usage)
 592 {
 593     uint32_t retval = 0;
 594     boolean is_r500 = r300_screen(screen)->caps.is_r500;
 595     boolean is_r400 = r300_screen(screen)->caps.is_r400;
 596     boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
 597                               format == PIPE_FORMAT_R10G10B10X2_SNORM ||
 598                               format == PIPE_FORMAT_B10G10R10A2_UNORM ||
 599                               format == PIPE_FORMAT_B10G10R10X2_UNORM ||
 600                               format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
 601     boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
 602                        format == PIPE_FORMAT_RGTC1_SNORM ||
 603                        format == PIPE_FORMAT_LATC1_UNORM ||
 604                        format == PIPE_FORMAT_LATC1_SNORM;
 605     boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
 606                        format == PIPE_FORMAT_RGTC2_SNORM ||
 607                        format == PIPE_FORMAT_LATC2_UNORM ||
 608                        format == PIPE_FORMAT_LATC2_SNORM;
 609     boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
 610                             format == PIPE_FORMAT_R16G16_FLOAT ||
 611                             format == PIPE_FORMAT_R16G16B16_FLOAT ||
 612                             format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
 613                             format == PIPE_FORMAT_R16G16B16X16_FLOAT;
 614     const struct util_format_description *desc;
 615
 616     if (!util_format_is_supported(format, usage))
 617        return FALSE;
 618
 619     /* Check multisampling support. */
 620     switch (sample_count) {
 621         case 0:
 622         case 1:
 623             break;
 624         case 2:
 625         case 4:
 626         case 6:
 627             /* No texturing and scanout. */
 628             if (usage & (PIPE_BIND_SAMPLER_VIEW |
 629                          PIPE_BIND_DISPLAY_TARGET |
 630                          PIPE_BIND_SCANOUT)) {
 631                 return FALSE;
 632             }
 633
 634             desc = util_format_description(format);
 635
 636             if (is_r500) {
 637                 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
 638                 if (!util_format_is_depth_or_stencil(format) &&
 639                     !util_format_is_rgba8_variant(desc) &&
 640                     !util_format_is_rgba1010102_variant(desc) &&
 641                     format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
 642                     format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
 643                     return FALSE;
 644                 }
 645             } else {
 646                 /* Only allow depth/stencil, RGBA8. */
 647                 if (!util_format_is_depth_or_stencil(format) &&
 648                     !util_format_is_rgba8_variant(desc)) {
 649                     return FALSE;
 650                 }
 651             }
 652             break;
 653         default:
 654             return FALSE;
 655     }
 656
 657     /* Check sampler format support. */
 658     if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 659         /* these two are broken for an unknown reason */
 660         format != PIPE_FORMAT_R8G8B8X8_SNORM &&
 661         format != PIPE_FORMAT_R16G16B16X16_SNORM &&
 662         /* ATI1N is r5xx-only. */
 663         (is_r500 || !is_ati1n) &&
 664         /* ATI2N is supported on r4xx-r5xx. */
 665         (is_r400 || is_r500 || !is_ati2n) &&
 666         r300_is_sampler_format_supported(format)) {
 667         retval |= PIPE_BIND_SAMPLER_VIEW;
 668     }
 669
 670     /* Check colorbuffer format support. */
 671     if ((usage & (PIPE_BIND_RENDER_TARGET |
 672                   PIPE_BIND_DISPLAY_TARGET |
 673                   PIPE_BIND_SCANOUT |
 674                   PIPE_BIND_SHARED |
 675                   PIPE_BIND_BLENDABLE)) &&
 676         /* 2101010 cannot be rendered to on non-r5xx. */
 677         (!is_color2101010 || is_r500) &&
 678         r300_is_colorbuffer_format_supported(format)) {
 679         retval |= usage &
 680             (PIPE_BIND_RENDER_TARGET |
 681              PIPE_BIND_DISPLAY_TARGET |
 682              PIPE_BIND_SCANOUT |
 683              PIPE_BIND_SHARED);
 684
 685         if (r300_is_blending_supported(r300_screen(screen), format)) {
 686             retval |= usage & PIPE_BIND_BLENDABLE;
 687         }
 688     }
 689
 690     /* Check depth-stencil format support. */
 691     if (usage & PIPE_BIND_DEPTH_STENCIL &&
 692         r300_is_zs_format_supported(format)) {
 693         retval |= PIPE_BIND_DEPTH_STENCIL;
 694     }
 695
 696     /* Check vertex buffer format support. */
 697     if (usage & PIPE_BIND_VERTEX_BUFFER) {
 698         if (r300_screen(screen)->caps.has_tcl) {
 699             /* Half float is supported on >= R400. */
 700             if ((is_r400 || is_r500 || !is_half_float) &&
 701                 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
 702                 retval |= PIPE_BIND_VERTEX_BUFFER;
 703             }
 704         } else {
 705             /* SW TCL */
 706             if (!util_format_is_pure_integer(format)) {
 707                 retval |= PIPE_BIND_VERTEX_BUFFER;
 708             }
 709         }
 710     }
 711
 712     return retval == usage;
 713 }
 714
 715 static void r300_destroy_screen(struct pipe_screen* pscreen)
 716 {
 717     struct r300_screen* r300screen = r300_screen(pscreen);
 718     struct radeon_winsys *rws = radeon_winsys(pscreen);
 719
 720     if (rws && !rws->unref(rws))
 721       return;
 722
 723     mtx_destroy(&r300screen->cmask_mutex);
 724     slab_destroy_parent(&r300screen->pool_transfers);
 725
 726     if (rws)
 727       rws->destroy(rws);
 728
 729     FREE(r300screen);
 730 }
 731
 732 static void r300_fence_reference(struct pipe_screen *screen,
 733                                  struct pipe_fence_handle **ptr,
 734                                  struct pipe_fence_handle *fence)
 735 {
 736     struct radeon_winsys *rws = r300_screen(screen)->rws;
 737
 738     rws->fence_reference(ptr, fence);
 739 }
 740
 741 static boolean r300_fence_finish(struct pipe_screen *screen,
 742                                  struct pipe_context *ctx,
 743                                  struct pipe_fence_handle *fence,
 744                                  uint64_t timeout)
 745 {
 746     struct radeon_winsys *rws = r300_screen(screen)->rws;
 747
 748     return rws->fence_wait(rws, fence, timeout);
 749 }
 750
 751 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws,
 752                                        const struct pipe_screen_config *config)
 753 {
 754     struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
 755
 756     if (!r300screen) {
 757         FREE(r300screen);
 758         return NULL;
 759     }
 760
 761     rws->query_info(rws, &r300screen->info);
 762
 763     r300_init_debug(r300screen);
 764     r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
 765
 766     if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
 767         r300screen->caps.zmask_ram = 0;
 768     if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
 769         r300screen->caps.hiz_ram = 0;
 770
 771     r300screen->rws = rws;
 772     r300screen->screen.destroy = r300_destroy_screen;
 773     r300screen->screen.get_name = r300_get_name;
 774     r300screen->screen.get_vendor = r300_get_vendor;
 775     r300screen->screen.get_device_vendor = r300_get_device_vendor;
 776     r300screen->screen.get_param = r300_get_param;
 777     r300screen->screen.get_shader_param = r300_get_shader_param;
 778     r300screen->screen.get_paramf = r300_get_paramf;
 779     r300screen->screen.get_video_param = r300_get_video_param;
 780     r300screen->screen.is_format_supported = r300_is_format_supported;
 781     r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
 782     r300screen->screen.context_create = r300_create_context;
 783     r300screen->screen.fence_reference = r300_fence_reference;
 784     r300screen->screen.fence_finish = r300_fence_finish;
 785
 786     r300_init_screen_resource_functions(r300screen);
 787
 788     slab_create_parent(&r300screen->pool_transfers, sizeof(struct pipe_transfer), 64);
 789
 790     (void) mtx_init(&r300screen->cmask_mutex, mtx_plain);
 791
 792     return &r300screen->screen;
 793 }