src/gallium/drivers/r300/r300_screen.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2010 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 #include "util/u_format.h"
  25 #include "util/u_format_s3tc.h"
  26 #include "util/u_memory.h"
  27 #include "os/os_time.h"
  28 #include "vl/vl_decoder.h"
  29 #include "vl/vl_video_buffer.h"
  30
  31 #include "r300_context.h"
  32 #include "r300_texture.h"
  33 #include "r300_screen_buffer.h"
  34 #include "r300_state_inlines.h"
  35 #include "r300_public.h"
  36
  37 #include "draw/draw_context.h"
  38
  39 /* Return the identifier behind whom the brave coders responsible for this
  40  * amalgamation of code, sweat, and duct tape, routinely obscure their names.
  41  *
  42  * ...I should have just put "Corbin Simpson", but I'm not that cool.
  43  *
  44  * (Or egotistical. Yet.) */
  45 static const char* r300_get_vendor(struct pipe_screen* pscreen)
  46 {
  47     return "X.Org R300 Project";
  48 }
  49
  50 static const char* r300_get_device_vendor(struct pipe_screen* pscreen)
  51 {
  52     return "ATI";
  53 }
  54
  55 static const char* chip_families[] = {
  56     "unknown",
  57     "ATI R300",
  58     "ATI R350",
  59     "ATI RV350",
  60     "ATI RV370",
  61     "ATI RV380",
  62     "ATI RS400",
  63     "ATI RC410",
  64     "ATI RS480",
  65     "ATI R420",
  66     "ATI R423",
  67     "ATI R430",
  68     "ATI R480",
  69     "ATI R481",
  70     "ATI RV410",
  71     "ATI RS600",
  72     "ATI RS690",
  73     "ATI RS740",
  74     "ATI RV515",
  75     "ATI R520",
  76     "ATI RV530",
  77     "ATI R580",
  78     "ATI RV560",
  79     "ATI RV570"
  80 };
  81
  82 static const char* r300_get_name(struct pipe_screen* pscreen)
  83 {
  84     struct r300_screen* r300screen = r300_screen(pscreen);
  85
  86     return chip_families[r300screen->caps.family];
  87 }
  88
  89 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
  90 {
  91     struct r300_screen* r300screen = r300_screen(pscreen);
  92     boolean is_r500 = r300screen->caps.is_r500;
  93
  94     switch (param) {
  95         /* Supported features (boolean caps). */
  96         case PIPE_CAP_NPOT_TEXTURES:
  97         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
  98         case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
  99         case PIPE_CAP_TWO_SIDED_STENCIL:
 100         case PIPE_CAP_ANISOTROPIC_FILTER:
 101         case PIPE_CAP_POINT_SPRITE:
 102         case PIPE_CAP_OCCLUSION_QUERY:
 103         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 104         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 105         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 106         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 107         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 108         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 109         case PIPE_CAP_CONDITIONAL_RENDER:
 110         case PIPE_CAP_TEXTURE_BARRIER:
 111         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 112         case PIPE_CAP_USER_CONSTANT_BUFFERS:
 113         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 114         case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 115         case PIPE_CAP_CLIP_HALFZ:
 116             return 1;
 117
 118         case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 119             return R300_BUFFER_ALIGNMENT;
 120
 121         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 122             return 16;
 123
 124         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 125             return 120;
 126
 127         /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
 128         case PIPE_CAP_TEXTURE_SWIZZLE:
 129             return util_format_s3tc_enabled ? r300screen->caps.dxtc_swizzle : 1;
 130
 131         /* We don't support color clamping on r500, so that we can use color
 132          * intepolators for generic varyings. */
 133         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 134             return !is_r500;
 135
 136         /* Supported on r500 only. */
 137         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 138         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 139         case PIPE_CAP_SM3:
 140             return is_r500 ? 1 : 0;
 141
 142         /* Unsupported features. */
 143         case PIPE_CAP_QUERY_TIME_ELAPSED:
 144         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 145         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 146         case PIPE_CAP_INDEP_BLEND_ENABLE:
 147         case PIPE_CAP_INDEP_BLEND_FUNC:
 148         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 149         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 150         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 151         case PIPE_CAP_TGSI_INSTANCEID:
 152         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 153         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 154         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 155         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 156         case PIPE_CAP_MIN_TEXEL_OFFSET:
 157         case PIPE_CAP_MAX_TEXEL_OFFSET:
 158         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 159         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 160         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 161         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 162         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 163         case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 164         case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 165         case PIPE_CAP_MAX_VERTEX_STREAMS:
 166         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 167         case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
 168         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 169         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 170         case PIPE_CAP_COMPUTE:
 171         case PIPE_CAP_START_INSTANCE:
 172         case PIPE_CAP_QUERY_TIMESTAMP:
 173         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 174         case PIPE_CAP_CUBE_MAP_ARRAY:
 175         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 176         case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 177         case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 178         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 179         case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 180         case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 181         case PIPE_CAP_TEXTURE_GATHER_SM5:
 182         case PIPE_CAP_TEXTURE_QUERY_LOD:
 183         case PIPE_CAP_FAKE_SW_MSAA:
 184         case PIPE_CAP_SAMPLE_SHADING:
 185         case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 186         case PIPE_CAP_DRAW_INDIRECT:
 187         case PIPE_CAP_MULTI_DRAW_INDIRECT:
 188         case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
 189         case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 190         case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 191         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 192         case PIPE_CAP_VERTEXID_NOBASE:
 193         case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 194         case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 195         case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 196         case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 197         case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
 198         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 199         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 200         case PIPE_CAP_DEPTH_BOUNDS_TEST:
 201         case PIPE_CAP_TGSI_TXQS:
 202         case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
 203         case PIPE_CAP_SHAREABLE_SHADERS:
 204         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 205         case PIPE_CAP_CLEAR_TEXTURE:
 206         case PIPE_CAP_DRAW_PARAMETERS:
 207         case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
 208         case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 209         case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 210         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 211         case PIPE_CAP_INVALIDATE_BUFFER:
 212         case PIPE_CAP_GENERATE_MIPMAP:
 213         case PIPE_CAP_STRING_MARKER:
 214         case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
 215         case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
 216         case PIPE_CAP_QUERY_BUFFER_OBJECT:
 217         case PIPE_CAP_QUERY_MEMORY_INFO:
 218         case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
 219         case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
 220         case PIPE_CAP_CULL_DISTANCE:
 221         case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
 222         case PIPE_CAP_TGSI_VOTE:
 223         case PIPE_CAP_MAX_WINDOW_RECTANGLES:
 224         case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
 225         case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
 226         case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
 227         case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
 228         case PIPE_CAP_NATIVE_FENCE_FD:
 229         case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
 230         case PIPE_CAP_TGSI_FS_FBFETCH:
 231         case PIPE_CAP_TGSI_MUL_ZERO_WINS:
 232         case PIPE_CAP_DOUBLES:
 233         case PIPE_CAP_INT64:
 234         case PIPE_CAP_INT64_DIVMOD:
 235         case PIPE_CAP_TGSI_TEX_TXF_LZ:
 236         case PIPE_CAP_TGSI_CLOCK:
 237         case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
 238         case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
 239         case PIPE_CAP_TGSI_BALLOT:
 240         case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
 241             return 0;
 242
 243         /* SWTCL-only features. */
 244         case PIPE_CAP_PRIMITIVE_RESTART:
 245         case PIPE_CAP_USER_VERTEX_BUFFERS:
 246         case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 247             return !r300screen->caps.has_tcl;
 248
 249         /* HWTCL-only features / limitations. */
 250         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 251         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 252         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 253             return r300screen->caps.has_tcl;
 254         case PIPE_CAP_TGSI_TEXCOORD:
 255             return 0;
 256
 257         /* Texturing. */
 258         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 259         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 260         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 261             /* 13 == 4096, 12 == 2048 */
 262             return is_r500 ? 13 : 12;
 263
 264         /* Render targets. */
 265         case PIPE_CAP_MAX_RENDER_TARGETS:
 266             return 4;
 267         case PIPE_CAP_ENDIANNESS:
 268             return PIPE_ENDIAN_LITTLE;
 269
 270         case PIPE_CAP_MAX_VIEWPORTS:
 271             return 1;
 272
 273         case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 274             return 2048;
 275
 276         case PIPE_CAP_VENDOR_ID:
 277                 return 0x1002;
 278         case PIPE_CAP_DEVICE_ID:
 279                 return r300screen->info.pci_id;
 280         case PIPE_CAP_ACCELERATED:
 281                 return 1;
 282         case PIPE_CAP_VIDEO_MEMORY:
 283                 return r300screen->info.vram_size >> 20;
 284         case PIPE_CAP_UMA:
 285                 return 0;
 286         case PIPE_CAP_PCI_GROUP:
 287             return r300screen->info.pci_domain;
 288         case PIPE_CAP_PCI_BUS:
 289             return r300screen->info.pci_bus;
 290         case PIPE_CAP_PCI_DEVICE:
 291             return r300screen->info.pci_dev;
 292         case PIPE_CAP_PCI_FUNCTION:
 293             return r300screen->info.pci_func;
 294     }
 295     return 0;
 296 }
 297
 298 static int r300_get_shader_param(struct pipe_screen *pscreen,
 299                                  enum pipe_shader_type shader,
 300                                  enum pipe_shader_cap param)
 301 {
 302    struct r300_screen* r300screen = r300_screen(pscreen);
 303    boolean is_r400 = r300screen->caps.is_r400;
 304    boolean is_r500 = r300screen->caps.is_r500;
 305
 306    switch (shader) {
 307     case PIPE_SHADER_FRAGMENT:
 308         switch (param)
 309         {
 310         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 311             return is_r500 || is_r400 ? 512 : 96;
 312         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 313             return is_r500 || is_r400 ? 512 : 64;
 314         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 315             return is_r500 || is_r400 ? 512 : 32;
 316         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 317             return is_r500 ? 511 : 4;
 318         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 319             return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
 320             /* Fragment shader limits. */
 321         case PIPE_SHADER_CAP_MAX_INPUTS:
 322             /* 2 colors + 8 texcoords are always supported
 323              * (minus fog and wpos).
 324              *
 325              * R500 has the ability to turn 3rd and 4th color into
 326              * additional texcoords but there is no two-sided color
 327              * selection then. However the facing bit can be used instead. */
 328             return 10;
 329         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 330             return 4;
 331         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 332             return (is_r500 ? 256 : 32) * sizeof(float[4]);
 333         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 334         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 335             return 1;
 336         case PIPE_SHADER_CAP_MAX_TEMPS:
 337             return is_r500 ? 128 : is_r400 ? 64 : 32;
 338         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 339         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 340            return r300screen->caps.num_tex_units;
 341         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 342         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 343         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 344         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 345         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 346         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 347         case PIPE_SHADER_CAP_SUBROUTINES:
 348         case PIPE_SHADER_CAP_INTEGERS:
 349         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 350         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 351         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 352         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 353         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 354         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 355             return 0;
 356         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 357             return 32;
 358         case PIPE_SHADER_CAP_PREFERRED_IR:
 359             return PIPE_SHADER_IR_TGSI;
 360         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 361             return 0;
 362         }
 363         break;
 364     case PIPE_SHADER_VERTEX:
 365         switch (param)
 366         {
 367         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 368         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 369         case PIPE_SHADER_CAP_SUBROUTINES:
 370             return 0;
 371         default:;
 372         }
 373
 374         if (!r300screen->caps.has_tcl) {
 375             return draw_get_shader_param(shader, param);
 376         }
 377
 378         switch (param)
 379         {
 380         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 381         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 382             return is_r500 ? 1024 : 256;
 383         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 384             return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
 385         case PIPE_SHADER_CAP_MAX_INPUTS:
 386             return 16;
 387         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 388             return 10;
 389         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 390             return 256 * sizeof(float[4]);
 391         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 392             return 1;
 393         case PIPE_SHADER_CAP_MAX_TEMPS:
 394             return 32;
 395         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 396         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 397             return 1;
 398         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 399         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 400         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 401         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 402         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 403         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 404         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 405         case PIPE_SHADER_CAP_SUBROUTINES:
 406         case PIPE_SHADER_CAP_INTEGERS:
 407         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 408         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 409         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 410         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 411         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 412         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 413         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 414         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 415             return 0;
 416         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 417             return 32;
 418         case PIPE_SHADER_CAP_PREFERRED_IR:
 419             return PIPE_SHADER_IR_TGSI;
 420         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 421             return 0;
 422         }
 423         break;
 424     default:
 425         ; /* nothing */
 426     }
 427     return 0;
 428 }
 429
 430 static float r300_get_paramf(struct pipe_screen* pscreen,
 431                              enum pipe_capf param)
 432 {
 433     struct r300_screen* r300screen = r300_screen(pscreen);
 434
 435     switch (param) {
 436         case PIPE_CAPF_MAX_LINE_WIDTH:
 437         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 438         case PIPE_CAPF_MAX_POINT_WIDTH:
 439         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 440             /* The maximum dimensions of the colorbuffer are our practical
 441              * rendering limits. 2048 pixels should be enough for anybody. */
 442             if (r300screen->caps.is_r500) {
 443                 return 4096.0f;
 444             } else if (r300screen->caps.is_r400) {
 445                 return 4021.0f;
 446             } else {
 447                 return 2560.0f;
 448             }
 449         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 450             return 16.0f;
 451         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 452             return 16.0f;
 453         case PIPE_CAPF_GUARD_BAND_LEFT:
 454         case PIPE_CAPF_GUARD_BAND_TOP:
 455         case PIPE_CAPF_GUARD_BAND_RIGHT:
 456         case PIPE_CAPF_GUARD_BAND_BOTTOM:
 457             return 0.0f;
 458         default:
 459             debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
 460                          param);
 461             return 0.0f;
 462     }
 463 }
 464
 465 static int r300_get_video_param(struct pipe_screen *screen,
 466                                 enum pipe_video_profile profile,
 467                                 enum pipe_video_entrypoint entrypoint,
 468                                 enum pipe_video_cap param)
 469 {
 470    switch (param) {
 471       case PIPE_VIDEO_CAP_SUPPORTED:
 472          return vl_profile_supported(screen, profile, entrypoint);
 473       case PIPE_VIDEO_CAP_NPOT_TEXTURES:
 474          return 0;
 475       case PIPE_VIDEO_CAP_MAX_WIDTH:
 476       case PIPE_VIDEO_CAP_MAX_HEIGHT:
 477          return vl_video_buffer_max_size(screen);
 478       case PIPE_VIDEO_CAP_PREFERED_FORMAT:
 479          return PIPE_FORMAT_NV12;
 480       case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
 481          return false;
 482       case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
 483          return false;
 484       case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
 485          return true;
 486       case PIPE_VIDEO_CAP_MAX_LEVEL:
 487          return vl_level_supported(screen, profile);
 488       default:
 489          return 0;
 490    }
 491 }
 492
 493 /**
 494  * Whether the format matches:
 495  *   PIPE_FORMAT_?10?10?10?2_UNORM
 496  */
 497 static inline boolean
 498 util_format_is_rgba1010102_variant(const struct util_format_description *desc)
 499 {
 500    static const unsigned size[4] = {10, 10, 10, 2};
 501    unsigned chan;
 502
 503    if (desc->block.width != 1 ||
 504        desc->block.height != 1 ||
 505        desc->block.bits != 32)
 506       return FALSE;
 507
 508    for (chan = 0; chan < 4; ++chan) {
 509       if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
 510          desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
 511          return FALSE;
 512       if (desc->channel[chan].size != size[chan])
 513          return FALSE;
 514    }
 515
 516    return TRUE;
 517 }
 518
 519 static bool r300_is_blending_supported(struct r300_screen *rscreen,
 520                                        enum pipe_format format)
 521 {
 522     int c;
 523     const struct util_format_description *desc =
 524         util_format_description(format);
 525
 526     if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
 527         return false;
 528
 529     c = util_format_get_first_non_void_channel(format);
 530
 531     /* RGBA16F */
 532     if (rscreen->caps.is_r500 &&
 533         desc->nr_channels == 4 &&
 534         desc->channel[c].size == 16 &&
 535         desc->channel[c].type == UTIL_FORMAT_TYPE_FLOAT)
 536         return true;
 537
 538     if (desc->channel[c].normalized &&
 539         desc->channel[c].type == UTIL_FORMAT_TYPE_UNSIGNED &&
 540         desc->channel[c].size >= 4 &&
 541         desc->channel[c].size <= 10) {
 542         /* RGB10_A2, RGBA8, RGB5_A1, RGBA4, RGB565 */
 543         if (desc->nr_channels >= 3)
 544             return true;
 545
 546         if (format == PIPE_FORMAT_R8G8_UNORM)
 547             return true;
 548
 549         /* R8, I8, L8, A8 */
 550         if (desc->nr_channels == 1)
 551             return true;
 552     }
 553
 554     return false;
 555 }
 556
 557 static boolean r300_is_format_supported(struct pipe_screen* screen,
 558                                         enum pipe_format format,
 559                                         enum pipe_texture_target target,
 560                                         unsigned sample_count,
 561                                         unsigned usage)
 562 {
 563     uint32_t retval = 0;
 564     boolean is_r500 = r300_screen(screen)->caps.is_r500;
 565     boolean is_r400 = r300_screen(screen)->caps.is_r400;
 566     boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
 567                               format == PIPE_FORMAT_R10G10B10X2_SNORM ||
 568                               format == PIPE_FORMAT_B10G10R10A2_UNORM ||
 569                               format == PIPE_FORMAT_B10G10R10X2_UNORM ||
 570                               format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
 571     boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
 572                        format == PIPE_FORMAT_RGTC1_SNORM ||
 573                        format == PIPE_FORMAT_LATC1_UNORM ||
 574                        format == PIPE_FORMAT_LATC1_SNORM;
 575     boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
 576                        format == PIPE_FORMAT_RGTC2_SNORM ||
 577                        format == PIPE_FORMAT_LATC2_UNORM ||
 578                        format == PIPE_FORMAT_LATC2_SNORM;
 579     boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
 580                             format == PIPE_FORMAT_R16G16_FLOAT ||
 581                             format == PIPE_FORMAT_R16G16B16_FLOAT ||
 582                             format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
 583                             format == PIPE_FORMAT_R16G16B16X16_FLOAT;
 584     const struct util_format_description *desc;
 585
 586     if (!util_format_is_supported(format, usage))
 587        return FALSE;
 588
 589     /* Check multisampling support. */
 590     switch (sample_count) {
 591         case 0:
 592         case 1:
 593             break;
 594         case 2:
 595         case 4:
 596         case 6:
 597             /* No texturing and scanout. */
 598             if (usage & (PIPE_BIND_SAMPLER_VIEW |
 599                          PIPE_BIND_DISPLAY_TARGET |
 600                          PIPE_BIND_SCANOUT)) {
 601                 return FALSE;
 602             }
 603
 604             desc = util_format_description(format);
 605
 606             if (is_r500) {
 607                 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
 608                 if (!util_format_is_depth_or_stencil(format) &&
 609                     !util_format_is_rgba8_variant(desc) &&
 610                     !util_format_is_rgba1010102_variant(desc) &&
 611                     format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
 612                     format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
 613                     return FALSE;
 614                 }
 615             } else {
 616                 /* Only allow depth/stencil, RGBA8. */
 617                 if (!util_format_is_depth_or_stencil(format) &&
 618                     !util_format_is_rgba8_variant(desc)) {
 619                     return FALSE;
 620                 }
 621             }
 622             break;
 623         default:
 624             return FALSE;
 625     }
 626
 627     /* Check sampler format support. */
 628     if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 629         /* these two are broken for an unknown reason */
 630         format != PIPE_FORMAT_R8G8B8X8_SNORM &&
 631         format != PIPE_FORMAT_R16G16B16X16_SNORM &&
 632         /* ATI1N is r5xx-only. */
 633         (is_r500 || !is_ati1n) &&
 634         /* ATI2N is supported on r4xx-r5xx. */
 635         (is_r400 || is_r500 || !is_ati2n) &&
 636         r300_is_sampler_format_supported(format)) {
 637         retval |= PIPE_BIND_SAMPLER_VIEW;
 638     }
 639
 640     /* Check colorbuffer format support. */
 641     if ((usage & (PIPE_BIND_RENDER_TARGET |
 642                   PIPE_BIND_DISPLAY_TARGET |
 643                   PIPE_BIND_SCANOUT |
 644                   PIPE_BIND_SHARED |
 645                   PIPE_BIND_BLENDABLE)) &&
 646         /* 2101010 cannot be rendered to on non-r5xx. */
 647         (!is_color2101010 || is_r500) &&
 648         r300_is_colorbuffer_format_supported(format)) {
 649         retval |= usage &
 650             (PIPE_BIND_RENDER_TARGET |
 651              PIPE_BIND_DISPLAY_TARGET |
 652              PIPE_BIND_SCANOUT |
 653              PIPE_BIND_SHARED);
 654
 655         if (r300_is_blending_supported(r300_screen(screen), format)) {
 656             retval |= usage & PIPE_BIND_BLENDABLE;
 657         }
 658     }
 659
 660     /* Check depth-stencil format support. */
 661     if (usage & PIPE_BIND_DEPTH_STENCIL &&
 662         r300_is_zs_format_supported(format)) {
 663         retval |= PIPE_BIND_DEPTH_STENCIL;
 664     }
 665
 666     /* Check vertex buffer format support. */
 667     if (usage & PIPE_BIND_VERTEX_BUFFER) {
 668         if (r300_screen(screen)->caps.has_tcl) {
 669             /* Half float is supported on >= R400. */
 670             if ((is_r400 || is_r500 || !is_half_float) &&
 671                 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
 672                 retval |= PIPE_BIND_VERTEX_BUFFER;
 673             }
 674         } else {
 675             /* SW TCL */
 676             if (!util_format_is_pure_integer(format)) {
 677                 retval |= PIPE_BIND_VERTEX_BUFFER;
 678             }
 679         }
 680     }
 681
 682     return retval == usage;
 683 }
 684
 685 static void r300_destroy_screen(struct pipe_screen* pscreen)
 686 {
 687     struct r300_screen* r300screen = r300_screen(pscreen);
 688     struct radeon_winsys *rws = radeon_winsys(pscreen);
 689
 690     if (rws && !rws->unref(rws))
 691       return;
 692
 693     mtx_destroy(&r300screen->cmask_mutex);
 694     slab_destroy_parent(&r300screen->pool_transfers);
 695
 696     if (rws)
 697       rws->destroy(rws);
 698
 699     FREE(r300screen);
 700 }
 701
 702 static void r300_fence_reference(struct pipe_screen *screen,
 703                                  struct pipe_fence_handle **ptr,
 704                                  struct pipe_fence_handle *fence)
 705 {
 706     struct radeon_winsys *rws = r300_screen(screen)->rws;
 707
 708     rws->fence_reference(ptr, fence);
 709 }
 710
 711 static boolean r300_fence_finish(struct pipe_screen *screen,
 712                                  struct pipe_context *ctx,
 713                                  struct pipe_fence_handle *fence,
 714                                  uint64_t timeout)
 715 {
 716     struct radeon_winsys *rws = r300_screen(screen)->rws;
 717
 718     return rws->fence_wait(rws, fence, timeout);
 719 }
 720
 721 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws)
 722 {
 723     struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
 724
 725     if (!r300screen) {
 726         FREE(r300screen);
 727         return NULL;
 728     }
 729
 730     rws->query_info(rws, &r300screen->info);
 731
 732     r300_init_debug(r300screen);
 733     r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
 734
 735     if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
 736         r300screen->caps.zmask_ram = 0;
 737     if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
 738         r300screen->caps.hiz_ram = 0;
 739
 740     r300screen->rws = rws;
 741     r300screen->screen.destroy = r300_destroy_screen;
 742     r300screen->screen.get_name = r300_get_name;
 743     r300screen->screen.get_vendor = r300_get_vendor;
 744     r300screen->screen.get_device_vendor = r300_get_device_vendor;
 745     r300screen->screen.get_param = r300_get_param;
 746     r300screen->screen.get_shader_param = r300_get_shader_param;
 747     r300screen->screen.get_paramf = r300_get_paramf;
 748     r300screen->screen.get_video_param = r300_get_video_param;
 749     r300screen->screen.is_format_supported = r300_is_format_supported;
 750     r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
 751     r300screen->screen.context_create = r300_create_context;
 752     r300screen->screen.fence_reference = r300_fence_reference;
 753     r300screen->screen.fence_finish = r300_fence_finish;
 754
 755     r300_init_screen_resource_functions(r300screen);
 756
 757     slab_create_parent(&r300screen->pool_transfers, sizeof(struct pipe_transfer), 64);
 758
 759     util_format_s3tc_init();
 760     (void) mtx_init(&r300screen->cmask_mutex, mtx_plain);
 761
 762     return &r300screen->screen;
 763 }