src/gallium/drivers/r300/r300_screen.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2010 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 #include "util/format/u_format.h"
  25 #include "util/format/u_format_s3tc.h"
  26 #include "util/u_screen.h"
  27 #include "util/u_memory.h"
  28 #include "util/os_time.h"
  29 #include "vl/vl_decoder.h"
  30 #include "vl/vl_video_buffer.h"
  31
  32 #include "r300_context.h"
  33 #include "r300_texture.h"
  34 #include "r300_screen_buffer.h"
  35 #include "r300_state_inlines.h"
  36 #include "r300_public.h"
  37
  38 #include "draw/draw_context.h"
  39
  40 /* Return the identifier behind whom the brave coders responsible for this
  41  * amalgamation of code, sweat, and duct tape, routinely obscure their names.
  42  *
  43  * ...I should have just put "Corbin Simpson", but I'm not that cool.
  44  *
  45  * (Or egotistical. Yet.) */
  46 static const char* r300_get_vendor(struct pipe_screen* pscreen)
  47 {
  48     return "X.Org R300 Project";
  49 }
  50
  51 static const char* r300_get_device_vendor(struct pipe_screen* pscreen)
  52 {
  53     return "ATI";
  54 }
  55
  56 static const char* chip_families[] = {
  57     "unknown",
  58     "ATI R300",
  59     "ATI R350",
  60     "ATI RV350",
  61     "ATI RV370",
  62     "ATI RV380",
  63     "ATI RS400",
  64     "ATI RC410",
  65     "ATI RS480",
  66     "ATI R420",
  67     "ATI R423",
  68     "ATI R430",
  69     "ATI R480",
  70     "ATI R481",
  71     "ATI RV410",
  72     "ATI RS600",
  73     "ATI RS690",
  74     "ATI RS740",
  75     "ATI RV515",
  76     "ATI R520",
  77     "ATI RV530",
  78     "ATI R580",
  79     "ATI RV560",
  80     "ATI RV570"
  81 };
  82
  83 static const char* r300_get_family_name(struct r300_screen* r300screen)
  84 {
  85     return chip_families[r300screen->caps.family];
  86 }
  87
  88 static const char* r300_get_name(struct pipe_screen* pscreen)
  89 {
  90     struct r300_screen* r300screen = r300_screen(pscreen);
  91
  92     return r300_get_family_name(r300screen);
  93 }
  94
  95 static void r300_disk_cache_create(struct r300_screen* r300screen)
  96 {
  97     struct mesa_sha1 ctx;
  98     unsigned char sha1[20];
  99     char cache_id[20 * 2 + 1];
 100
 101     _mesa_sha1_init(&ctx);
 102     if (!disk_cache_get_function_identifier(r300_disk_cache_create,
 103                                             &ctx))
 104         return;
 105
 106     _mesa_sha1_final(&ctx, sha1);
 107     disk_cache_format_hex_id(cache_id, sha1, 20 * 2);
 108
 109     r300screen->disk_shader_cache =
 110                     disk_cache_create(r300_get_family_name(r300screen),
 111                                       cache_id,
 112                                       r300screen->debug);
 113 }
 114
 115 static struct disk_cache* r300_get_disk_shader_cache(struct pipe_screen* pscreen)
 116 {
 117         struct r300_screen* r300screen = r300_screen(pscreen);
 118         return r300screen->disk_shader_cache;
 119 }
 120
 121 static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 122 {
 123     struct r300_screen* r300screen = r300_screen(pscreen);
 124     boolean is_r500 = r300screen->caps.is_r500;
 125
 126     switch (param) {
 127         /* Supported features (boolean caps). */
 128         case PIPE_CAP_NPOT_TEXTURES:
 129         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 130         case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
 131         case PIPE_CAP_ANISOTROPIC_FILTER:
 132         case PIPE_CAP_POINT_SPRITE:
 133         case PIPE_CAP_OCCLUSION_QUERY:
 134         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 135         case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
 136         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 137         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 138         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 139         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 140         case PIPE_CAP_CONDITIONAL_RENDER:
 141         case PIPE_CAP_TEXTURE_BARRIER:
 142         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 143         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 144         case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 145         case PIPE_CAP_CLIP_HALFZ:
 146         case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
 147             return 1;
 148
 149         case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 150             return R300_BUFFER_ALIGNMENT;
 151
 152         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 153             return 16;
 154
 155         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 156         case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
 157             return 120;
 158
 159         /* r300 cannot do swizzling of compressed textures. Supported otherwise. */
 160         case PIPE_CAP_TEXTURE_SWIZZLE:
 161             return r300screen->caps.dxtc_swizzle;
 162
 163         /* We don't support color clamping on r500, so that we can use color
 164          * intepolators for generic varyings. */
 165         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 166             return !is_r500;
 167
 168         /* Supported on r500 only. */
 169         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 170         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 171         case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
 172         case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES:
 173         case PIPE_CAP_VERTEX_SHADER_SATURATE:
 174             return is_r500 ? 1 : 0;
 175
 176         case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
 177             return 0;
 178
 179         case PIPE_CAP_MAX_GS_INVOCATIONS:
 180             return 32;
 181        case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
 182             return 1 << 27;
 183
 184         /* SWTCL-only features. */
 185         case PIPE_CAP_PRIMITIVE_RESTART:
 186         case PIPE_CAP_PRIMITIVE_RESTART_FIXED_INDEX:
 187         case PIPE_CAP_USER_VERTEX_BUFFERS:
 188         case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 189             return !r300screen->caps.has_tcl;
 190
 191         /* HWTCL-only features / limitations. */
 192         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 193         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 194         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 195             return r300screen->caps.has_tcl;
 196
 197         /* Texturing. */
 198         case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
 199             return is_r500 ? 4096 : 2048;
 200         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 201         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 202             /* 13 == 4096, 12 == 2048 */
 203             return is_r500 ? 13 : 12;
 204
 205         /* Render targets. */
 206         case PIPE_CAP_MAX_RENDER_TARGETS:
 207             return 4;
 208         case PIPE_CAP_ENDIANNESS:
 209             return PIPE_ENDIAN_LITTLE;
 210
 211         case PIPE_CAP_MAX_VIEWPORTS:
 212             return 1;
 213
 214         case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 215             return 2048;
 216
 217         case PIPE_CAP_MAX_VARYINGS:
 218             return 10;
 219
 220         case PIPE_CAP_VENDOR_ID:
 221                 return 0x1002;
 222         case PIPE_CAP_DEVICE_ID:
 223                 return r300screen->info.pci_id;
 224         case PIPE_CAP_ACCELERATED:
 225                 return 1;
 226         case PIPE_CAP_VIDEO_MEMORY:
 227                 return r300screen->info.vram_size >> 20;
 228         case PIPE_CAP_UMA:
 229                 return 0;
 230         case PIPE_CAP_PCI_GROUP:
 231             return r300screen->info.pci_domain;
 232         case PIPE_CAP_PCI_BUS:
 233             return r300screen->info.pci_bus;
 234         case PIPE_CAP_PCI_DEVICE:
 235             return r300screen->info.pci_dev;
 236         case PIPE_CAP_PCI_FUNCTION:
 237             return r300screen->info.pci_func;
 238         default:
 239             return u_pipe_screen_get_param_defaults(pscreen, param);
 240     }
 241 }
 242
 243 static int r300_get_shader_param(struct pipe_screen *pscreen,
 244                                  enum pipe_shader_type shader,
 245                                  enum pipe_shader_cap param)
 246 {
 247    struct r300_screen* r300screen = r300_screen(pscreen);
 248    boolean is_r400 = r300screen->caps.is_r400;
 249    boolean is_r500 = r300screen->caps.is_r500;
 250
 251    switch (shader) {
 252     case PIPE_SHADER_FRAGMENT:
 253         switch (param)
 254         {
 255         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 256             return is_r500 || is_r400 ? 512 : 96;
 257         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 258             return is_r500 || is_r400 ? 512 : 64;
 259         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 260             return is_r500 || is_r400 ? 512 : 32;
 261         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 262             return is_r500 ? 511 : 4;
 263         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 264             return is_r500 ? 64 : 0; /* Actually unlimited on r500. */
 265             /* Fragment shader limits. */
 266         case PIPE_SHADER_CAP_MAX_INPUTS:
 267             /* 2 colors + 8 texcoords are always supported
 268              * (minus fog and wpos).
 269              *
 270              * R500 has the ability to turn 3rd and 4th color into
 271              * additional texcoords but there is no two-sided color
 272              * selection then. However the facing bit can be used instead. */
 273             return 10;
 274         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 275             return 4;
 276         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 277             return (is_r500 ? 256 : 32) * sizeof(float[4]);
 278         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 279         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 280             return 1;
 281         case PIPE_SHADER_CAP_MAX_TEMPS:
 282             return is_r500 ? 128 : is_r400 ? 64 : 32;
 283         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 284         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 285            return r300screen->caps.num_tex_units;
 286         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 287         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 288         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 289         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 290         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 291         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 292         case PIPE_SHADER_CAP_SUBROUTINES:
 293         case PIPE_SHADER_CAP_INTEGERS:
 294         case PIPE_SHADER_CAP_INT64_ATOMICS:
 295         case PIPE_SHADER_CAP_FP16:
 296         case PIPE_SHADER_CAP_FP16_DERIVATIVES:
 297         case PIPE_SHADER_CAP_INT16:
 298         case PIPE_SHADER_CAP_GLSL_16BIT_CONSTS:
 299         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 300         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 301         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
 302         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 303         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 304         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 305         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 306         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 307         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 308         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 309             return 0;
 310         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 311             return 32;
 312         case PIPE_SHADER_CAP_PREFERRED_IR:
 313             return PIPE_SHADER_IR_TGSI;
 314         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 315             return 0;
 316         }
 317         break;
 318     case PIPE_SHADER_VERTEX:
 319         switch (param)
 320         {
 321         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 322         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 323         case PIPE_SHADER_CAP_SUBROUTINES:
 324             return 0;
 325         default:;
 326         }
 327
 328         if (!r300screen->caps.has_tcl) {
 329             return draw_get_shader_param(shader, param);
 330         }
 331
 332         switch (param)
 333         {
 334         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 335         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 336             return is_r500 ? 1024 : 256;
 337         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 338             return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */
 339         case PIPE_SHADER_CAP_MAX_INPUTS:
 340             return 16;
 341         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 342             return 10;
 343         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 344             return 256 * sizeof(float[4]);
 345         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 346             return 1;
 347         case PIPE_SHADER_CAP_MAX_TEMPS:
 348             return 32;
 349         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 350         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 351             return 1;
 352         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 353         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 354         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 355         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 356         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 357         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 358         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 359         case PIPE_SHADER_CAP_SUBROUTINES:
 360         case PIPE_SHADER_CAP_INTEGERS:
 361         case PIPE_SHADER_CAP_FP16:
 362         case PIPE_SHADER_CAP_FP16_DERIVATIVES:
 363         case PIPE_SHADER_CAP_INT16:
 364         case PIPE_SHADER_CAP_GLSL_16BIT_CONSTS:
 365         case PIPE_SHADER_CAP_INT64_ATOMICS:
 366         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 367         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 368         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 369         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 370         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
 371         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 372         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 373         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 374         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 375         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 376         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 377         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 378             return 0;
 379         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 380             return 32;
 381         case PIPE_SHADER_CAP_PREFERRED_IR:
 382             return PIPE_SHADER_IR_TGSI;
 383         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 384             return 0;
 385         }
 386         break;
 387     default:
 388         ; /* nothing */
 389     }
 390     return 0;
 391 }
 392
 393 static float r300_get_paramf(struct pipe_screen* pscreen,
 394                              enum pipe_capf param)
 395 {
 396     struct r300_screen* r300screen = r300_screen(pscreen);
 397
 398     switch (param) {
 399         case PIPE_CAPF_MAX_LINE_WIDTH:
 400         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 401         case PIPE_CAPF_MAX_POINT_WIDTH:
 402         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 403             /* The maximum dimensions of the colorbuffer are our practical
 404              * rendering limits. 2048 pixels should be enough for anybody. */
 405             if (r300screen->caps.is_r500) {
 406                 return 4096.0f;
 407             } else if (r300screen->caps.is_r400) {
 408                 return 4021.0f;
 409             } else {
 410                 return 2560.0f;
 411             }
 412         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 413             return 16.0f;
 414         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 415             return 16.0f;
 416         case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
 417         case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
 418         case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
 419             return 0.0f;
 420         default:
 421             debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n",
 422                          param);
 423             return 0.0f;
 424     }
 425 }
 426
 427 static int r300_get_video_param(struct pipe_screen *screen,
 428                                 enum pipe_video_profile profile,
 429                                 enum pipe_video_entrypoint entrypoint,
 430                                 enum pipe_video_cap param)
 431 {
 432    switch (param) {
 433       case PIPE_VIDEO_CAP_SUPPORTED:
 434          return vl_profile_supported(screen, profile, entrypoint);
 435       case PIPE_VIDEO_CAP_NPOT_TEXTURES:
 436          return 0;
 437       case PIPE_VIDEO_CAP_MAX_WIDTH:
 438       case PIPE_VIDEO_CAP_MAX_HEIGHT:
 439          return vl_video_buffer_max_size(screen);
 440       case PIPE_VIDEO_CAP_PREFERED_FORMAT:
 441          return PIPE_FORMAT_NV12;
 442       case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
 443          return false;
 444       case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
 445          return false;
 446       case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
 447          return true;
 448       case PIPE_VIDEO_CAP_MAX_LEVEL:
 449          return vl_level_supported(screen, profile);
 450       default:
 451          return 0;
 452    }
 453 }
 454
 455 /**
 456  * Whether the format matches:
 457  *   PIPE_FORMAT_?10?10?10?2_UNORM
 458  */
 459 static inline boolean
 460 util_format_is_rgba1010102_variant(const struct util_format_description *desc)
 461 {
 462    static const unsigned size[4] = {10, 10, 10, 2};
 463    unsigned chan;
 464
 465    if (desc->block.width != 1 ||
 466        desc->block.height != 1 ||
 467        desc->block.bits != 32)
 468       return FALSE;
 469
 470    for (chan = 0; chan < 4; ++chan) {
 471       if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED &&
 472          desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID)
 473          return FALSE;
 474       if (desc->channel[chan].size != size[chan])
 475          return FALSE;
 476    }
 477
 478    return TRUE;
 479 }
 480
 481 static bool r300_is_blending_supported(struct r300_screen *rscreen,
 482                                        enum pipe_format format)
 483 {
 484     int c;
 485     const struct util_format_description *desc =
 486         util_format_description(format);
 487
 488     if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
 489         return false;
 490
 491     c = util_format_get_first_non_void_channel(format);
 492
 493     /* RGBA16F */
 494     if (rscreen->caps.is_r500 &&
 495         desc->nr_channels == 4 &&
 496         desc->channel[c].size == 16 &&
 497         desc->channel[c].type == UTIL_FORMAT_TYPE_FLOAT)
 498         return true;
 499
 500     if (desc->channel[c].normalized &&
 501         desc->channel[c].type == UTIL_FORMAT_TYPE_UNSIGNED &&
 502         desc->channel[c].size >= 4 &&
 503         desc->channel[c].size <= 10) {
 504         /* RGB10_A2, RGBA8, RGB5_A1, RGBA4, RGB565 */
 505         if (desc->nr_channels >= 3)
 506             return true;
 507
 508         if (format == PIPE_FORMAT_R8G8_UNORM)
 509             return true;
 510
 511         /* R8, I8, L8, A8 */
 512         if (desc->nr_channels == 1)
 513             return true;
 514     }
 515
 516     return false;
 517 }
 518
 519 static bool r300_is_format_supported(struct pipe_screen* screen,
 520                                      enum pipe_format format,
 521                                      enum pipe_texture_target target,
 522                                      unsigned sample_count,
 523                                      unsigned storage_sample_count,
 524                                      unsigned usage)
 525 {
 526     uint32_t retval = 0;
 527     boolean is_r500 = r300_screen(screen)->caps.is_r500;
 528     boolean is_r400 = r300_screen(screen)->caps.is_r400;
 529     boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
 530                               format == PIPE_FORMAT_R10G10B10X2_SNORM ||
 531                               format == PIPE_FORMAT_B10G10R10A2_UNORM ||
 532                               format == PIPE_FORMAT_B10G10R10X2_UNORM ||
 533                               format == PIPE_FORMAT_R10SG10SB10SA2U_NORM;
 534     boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM ||
 535                        format == PIPE_FORMAT_RGTC1_SNORM ||
 536                        format == PIPE_FORMAT_LATC1_UNORM ||
 537                        format == PIPE_FORMAT_LATC1_SNORM;
 538     boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM ||
 539                        format == PIPE_FORMAT_RGTC2_SNORM ||
 540                        format == PIPE_FORMAT_LATC2_UNORM ||
 541                        format == PIPE_FORMAT_LATC2_SNORM;
 542     boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
 543                             format == PIPE_FORMAT_R16G16_FLOAT ||
 544                             format == PIPE_FORMAT_R16G16B16_FLOAT ||
 545                             format == PIPE_FORMAT_R16G16B16A16_FLOAT ||
 546                             format == PIPE_FORMAT_R16G16B16X16_FLOAT;
 547     const struct util_format_description *desc;
 548
 549     if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
 550         return false;
 551
 552     /* Check multisampling support. */
 553     switch (sample_count) {
 554         case 0:
 555         case 1:
 556             break;
 557         case 2:
 558         case 4:
 559         case 6:
 560             /* No texturing and scanout. */
 561             if (usage & (PIPE_BIND_SAMPLER_VIEW |
 562                          PIPE_BIND_DISPLAY_TARGET |
 563                          PIPE_BIND_SCANOUT)) {
 564                 return false;
 565             }
 566
 567             desc = util_format_description(format);
 568
 569             if (is_r500) {
 570                 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */
 571                 if (!util_format_is_depth_or_stencil(format) &&
 572                     !util_format_is_rgba8_variant(desc) &&
 573                     !util_format_is_rgba1010102_variant(desc) &&
 574                     format != PIPE_FORMAT_R16G16B16A16_FLOAT &&
 575                     format != PIPE_FORMAT_R16G16B16X16_FLOAT) {
 576                     return false;
 577                 }
 578             } else {
 579                 /* Only allow depth/stencil, RGBA8. */
 580                 if (!util_format_is_depth_or_stencil(format) &&
 581                     !util_format_is_rgba8_variant(desc)) {
 582                     return false;
 583                 }
 584             }
 585             break;
 586         default:
 587             return false;
 588     }
 589
 590     /* Check sampler format support. */
 591     if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 592         /* these two are broken for an unknown reason */
 593         format != PIPE_FORMAT_R8G8B8X8_SNORM &&
 594         format != PIPE_FORMAT_R16G16B16X16_SNORM &&
 595         /* ATI1N is r5xx-only. */
 596         (is_r500 || !is_ati1n) &&
 597         /* ATI2N is supported on r4xx-r5xx. */
 598         (is_r400 || is_r500 || !is_ati2n) &&
 599         r300_is_sampler_format_supported(format)) {
 600         retval |= PIPE_BIND_SAMPLER_VIEW;
 601     }
 602
 603     /* Check colorbuffer format support. */
 604     if ((usage & (PIPE_BIND_RENDER_TARGET |
 605                   PIPE_BIND_DISPLAY_TARGET |
 606                   PIPE_BIND_SCANOUT |
 607                   PIPE_BIND_SHARED |
 608                   PIPE_BIND_BLENDABLE)) &&
 609         /* 2101010 cannot be rendered to on non-r5xx. */
 610         (!is_color2101010 || is_r500) &&
 611         r300_is_colorbuffer_format_supported(format)) {
 612         retval |= usage &
 613             (PIPE_BIND_RENDER_TARGET |
 614              PIPE_BIND_DISPLAY_TARGET |
 615              PIPE_BIND_SCANOUT |
 616              PIPE_BIND_SHARED);
 617
 618         if (r300_is_blending_supported(r300_screen(screen), format)) {
 619             retval |= usage & PIPE_BIND_BLENDABLE;
 620         }
 621     }
 622
 623     /* Check depth-stencil format support. */
 624     if (usage & PIPE_BIND_DEPTH_STENCIL &&
 625         r300_is_zs_format_supported(format)) {
 626         retval |= PIPE_BIND_DEPTH_STENCIL;
 627     }
 628
 629     /* Check vertex buffer format support. */
 630     if (usage & PIPE_BIND_VERTEX_BUFFER) {
 631         if (r300_screen(screen)->caps.has_tcl) {
 632             /* Half float is supported on >= R400. */
 633             if ((is_r400 || is_r500 || !is_half_float) &&
 634                 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) {
 635                 retval |= PIPE_BIND_VERTEX_BUFFER;
 636             }
 637         } else {
 638             /* SW TCL */
 639             if (!util_format_is_pure_integer(format)) {
 640                 retval |= PIPE_BIND_VERTEX_BUFFER;
 641             }
 642         }
 643     }
 644
 645     return retval == usage;
 646 }
 647
 648 static void r300_destroy_screen(struct pipe_screen* pscreen)
 649 {
 650     struct r300_screen* r300screen = r300_screen(pscreen);
 651     struct radeon_winsys *rws = radeon_winsys(pscreen);
 652
 653     if (rws && !rws->unref(rws))
 654       return;
 655
 656     mtx_destroy(&r300screen->cmask_mutex);
 657     slab_destroy_parent(&r300screen->pool_transfers);
 658
 659     disk_cache_destroy(r300screen->disk_shader_cache);
 660
 661     if (rws)
 662       rws->destroy(rws);
 663
 664     FREE(r300screen);
 665 }
 666
 667 static void r300_fence_reference(struct pipe_screen *screen,
 668                                  struct pipe_fence_handle **ptr,
 669                                  struct pipe_fence_handle *fence)
 670 {
 671     struct radeon_winsys *rws = r300_screen(screen)->rws;
 672
 673     rws->fence_reference(ptr, fence);
 674 }
 675
 676 static bool r300_fence_finish(struct pipe_screen *screen,
 677                               struct pipe_context *ctx,
 678                               struct pipe_fence_handle *fence,
 679                               uint64_t timeout)
 680 {
 681     struct radeon_winsys *rws = r300_screen(screen)->rws;
 682
 683     return rws->fence_wait(rws, fence, timeout);
 684 }
 685
 686 struct pipe_screen* r300_screen_create(struct radeon_winsys *rws,
 687                                        const struct pipe_screen_config *config)
 688 {
 689     struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
 690
 691     if (!r300screen) {
 692         FREE(r300screen);
 693         return NULL;
 694     }
 695
 696     rws->query_info(rws, &r300screen->info);
 697
 698     r300_init_debug(r300screen);
 699     r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
 700
 701     if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
 702         r300screen->caps.zmask_ram = 0;
 703     if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
 704         r300screen->caps.hiz_ram = 0;
 705
 706     r300screen->rws = rws;
 707     r300screen->screen.destroy = r300_destroy_screen;
 708     r300screen->screen.get_name = r300_get_name;
 709     r300screen->screen.get_vendor = r300_get_vendor;
 710     r300screen->screen.get_device_vendor = r300_get_device_vendor;
 711     r300screen->screen.get_disk_shader_cache = r300_get_disk_shader_cache;
 712     r300screen->screen.get_param = r300_get_param;
 713     r300screen->screen.get_shader_param = r300_get_shader_param;
 714     r300screen->screen.get_paramf = r300_get_paramf;
 715     r300screen->screen.get_video_param = r300_get_video_param;
 716     r300screen->screen.is_format_supported = r300_is_format_supported;
 717     r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
 718     r300screen->screen.context_create = r300_create_context;
 719     r300screen->screen.fence_reference = r300_fence_reference;
 720     r300screen->screen.fence_finish = r300_fence_finish;
 721
 722     r300_init_screen_resource_functions(r300screen);
 723
 724     r300_disk_cache_create(r300screen);
 725
 726     slab_create_parent(&r300screen->pool_transfers, sizeof(struct pipe_transfer), 64);
 727
 728     (void) mtx_init(&r300screen->cmask_mutex, mtx_plain);
 729
 730     return &r300screen->screen;
 731 }