Merge branch '7.8'
[mesa.git] / src / gallium / drivers / r300 / r300_state.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2009 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "draw/draw_context.h"
25
26 #include "util/u_math.h"
27 #include "util/u_memory.h"
28 #include "util/u_pack_color.h"
29
30 #include "tgsi/tgsi_parse.h"
31
32 #include "pipe/p_config.h"
33
34 #include "r300_context.h"
35 #include "r300_reg.h"
36 #include "r300_screen.h"
37 #include "r300_screen_buffer.h"
38 #include "r300_state_inlines.h"
39 #include "r300_fs.h"
40 #include "r300_vs.h"
41 #include "r300_winsys.h"
42
43 /* r300_state: Functions used to intialize state context by translating
44 * Gallium state objects into semi-native r300 state objects. */
45
46 #define UPDATE_STATE(cso, atom) \
47 if (cso != atom.state) { \
48 atom.state = cso; \
49 atom.dirty = TRUE; \
50 }
51
52 static boolean blend_discard_if_src_alpha_0(unsigned srcRGB, unsigned srcA,
53 unsigned dstRGB, unsigned dstA)
54 {
55 /* If the blend equation is ADD or REVERSE_SUBTRACT,
56 * SRC_ALPHA == 0, and the following state is set, the colorbuffer
57 * will not be changed.
58 * Notice that the dst factors are the src factors inverted. */
59 return (srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
60 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
61 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
62 (srcA == PIPE_BLENDFACTOR_SRC_COLOR ||
63 srcA == PIPE_BLENDFACTOR_SRC_ALPHA ||
64 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
65 srcA == PIPE_BLENDFACTOR_ZERO) &&
66 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
67 dstRGB == PIPE_BLENDFACTOR_ONE) &&
68 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
69 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
70 dstA == PIPE_BLENDFACTOR_ONE);
71 }
72
73 static boolean blend_discard_if_src_alpha_1(unsigned srcRGB, unsigned srcA,
74 unsigned dstRGB, unsigned dstA)
75 {
76 /* If the blend equation is ADD or REVERSE_SUBTRACT,
77 * SRC_ALPHA == 1, and the following state is set, the colorbuffer
78 * will not be changed.
79 * Notice that the dst factors are the src factors inverted. */
80 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
81 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
82 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
83 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
84 srcA == PIPE_BLENDFACTOR_ZERO) &&
85 (dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
86 dstRGB == PIPE_BLENDFACTOR_ONE) &&
87 (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
88 dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
89 dstA == PIPE_BLENDFACTOR_ONE);
90 }
91
92 static boolean blend_discard_if_src_color_0(unsigned srcRGB, unsigned srcA,
93 unsigned dstRGB, unsigned dstA)
94 {
95 /* If the blend equation is ADD or REVERSE_SUBTRACT,
96 * SRC_COLOR == (0,0,0), and the following state is set, the colorbuffer
97 * will not be changed.
98 * Notice that the dst factors are the src factors inverted. */
99 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
100 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
101 (srcA == PIPE_BLENDFACTOR_ZERO) &&
102 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
103 dstRGB == PIPE_BLENDFACTOR_ONE) &&
104 (dstA == PIPE_BLENDFACTOR_ONE);
105 }
106
107 static boolean blend_discard_if_src_color_1(unsigned srcRGB, unsigned srcA,
108 unsigned dstRGB, unsigned dstA)
109 {
110 /* If the blend equation is ADD or REVERSE_SUBTRACT,
111 * SRC_COLOR == (1,1,1), and the following state is set, the colorbuffer
112 * will not be changed.
113 * Notice that the dst factors are the src factors inverted. */
114 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
115 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
116 (srcA == PIPE_BLENDFACTOR_ZERO) &&
117 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
118 dstRGB == PIPE_BLENDFACTOR_ONE) &&
119 (dstA == PIPE_BLENDFACTOR_ONE);
120 }
121
122 static boolean blend_discard_if_src_alpha_color_0(unsigned srcRGB, unsigned srcA,
123 unsigned dstRGB, unsigned dstA)
124 {
125 /* If the blend equation is ADD or REVERSE_SUBTRACT,
126 * SRC_ALPHA_COLOR == (0,0,0,0), and the following state is set,
127 * the colorbuffer will not be changed.
128 * Notice that the dst factors are the src factors inverted. */
129 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
130 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
131 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
132 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
133 (srcA == PIPE_BLENDFACTOR_SRC_COLOR ||
134 srcA == PIPE_BLENDFACTOR_SRC_ALPHA ||
135 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
136 srcA == PIPE_BLENDFACTOR_ZERO) &&
137 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
138 dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
139 dstRGB == PIPE_BLENDFACTOR_ONE) &&
140 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
141 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
142 dstA == PIPE_BLENDFACTOR_ONE);
143 }
144
145 static boolean blend_discard_if_src_alpha_color_1(unsigned srcRGB, unsigned srcA,
146 unsigned dstRGB, unsigned dstA)
147 {
148 /* If the blend equation is ADD or REVERSE_SUBTRACT,
149 * SRC_ALPHA_COLOR == (1,1,1,1), and the following state is set,
150 * the colorbuffer will not be changed.
151 * Notice that the dst factors are the src factors inverted. */
152 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
153 srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
154 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
155 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
156 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
157 srcA == PIPE_BLENDFACTOR_ZERO) &&
158 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
159 dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
160 dstRGB == PIPE_BLENDFACTOR_ONE) &&
161 (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
162 dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
163 dstA == PIPE_BLENDFACTOR_ONE);
164 }
165
166 static unsigned bgra_cmask(unsigned mask)
167 {
168 /* Gallium uses RGBA color ordering while R300 expects BGRA. */
169
170 return ((mask & PIPE_MASK_R) << 2) |
171 ((mask & PIPE_MASK_B) >> 2) |
172 (mask & (PIPE_MASK_G | PIPE_MASK_A));
173 }
174
175 /* Create a new blend state based on the CSO blend state.
176 *
177 * This encompasses alpha blending, logic/raster ops, and blend dithering. */
178 static void* r300_create_blend_state(struct pipe_context* pipe,
179 const struct pipe_blend_state* state)
180 {
181 struct r300_screen* r300screen = r300_screen(pipe->screen);
182 struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state);
183
184 if (state->rt[0].blend_enable)
185 {
186 unsigned eqRGB = state->rt[0].rgb_func;
187 unsigned srcRGB = state->rt[0].rgb_src_factor;
188 unsigned dstRGB = state->rt[0].rgb_dst_factor;
189
190 unsigned eqA = state->rt[0].alpha_func;
191 unsigned srcA = state->rt[0].alpha_src_factor;
192 unsigned dstA = state->rt[0].alpha_dst_factor;
193
194 /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha,
195 * this is just the crappy D3D naming */
196 blend->blend_control = R300_ALPHA_BLEND_ENABLE |
197 r300_translate_blend_function(eqRGB) |
198 ( r300_translate_blend_factor(srcRGB) << R300_SRC_BLEND_SHIFT) |
199 ( r300_translate_blend_factor(dstRGB) << R300_DST_BLEND_SHIFT);
200
201 /* Optimization: some operations do not require the destination color.
202 *
203 * When SRC_ALPHA_SATURATE is used, colorbuffer reads must be enabled,
204 * otherwise blending gives incorrect results. It seems to be
205 * a hardware bug. */
206 if (eqRGB == PIPE_BLEND_MIN || eqA == PIPE_BLEND_MIN ||
207 eqRGB == PIPE_BLEND_MAX || eqA == PIPE_BLEND_MAX ||
208 dstRGB != PIPE_BLENDFACTOR_ZERO ||
209 dstA != PIPE_BLENDFACTOR_ZERO ||
210 srcRGB == PIPE_BLENDFACTOR_DST_COLOR ||
211 srcRGB == PIPE_BLENDFACTOR_DST_ALPHA ||
212 srcRGB == PIPE_BLENDFACTOR_INV_DST_COLOR ||
213 srcRGB == PIPE_BLENDFACTOR_INV_DST_ALPHA ||
214 srcA == PIPE_BLENDFACTOR_DST_COLOR ||
215 srcA == PIPE_BLENDFACTOR_DST_ALPHA ||
216 srcA == PIPE_BLENDFACTOR_INV_DST_COLOR ||
217 srcA == PIPE_BLENDFACTOR_INV_DST_ALPHA ||
218 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE) {
219 /* Enable reading from the colorbuffer. */
220 blend->blend_control |= R300_READ_ENABLE;
221
222 if (r300_screen(r300_context(pipe)->context.screen)->caps->is_r500) {
223 /* Optimization: Depending on incoming pixels, we can
224 * conditionally disable the reading in hardware... */
225 if (eqRGB != PIPE_BLEND_MIN && eqA != PIPE_BLEND_MIN &&
226 eqRGB != PIPE_BLEND_MAX && eqA != PIPE_BLEND_MAX) {
227 /* Disable reading if SRC_ALPHA == 0. */
228 if ((dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
229 dstRGB == PIPE_BLENDFACTOR_ZERO) &&
230 (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
231 dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
232 dstA == PIPE_BLENDFACTOR_ZERO)) {
233 blend->blend_control |= R500_SRC_ALPHA_0_NO_READ;
234 }
235
236 /* Disable reading if SRC_ALPHA == 1. */
237 if ((dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
238 dstRGB == PIPE_BLENDFACTOR_ZERO) &&
239 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
240 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
241 dstA == PIPE_BLENDFACTOR_ZERO)) {
242 blend->blend_control |= R500_SRC_ALPHA_1_NO_READ;
243 }
244 }
245 }
246 }
247
248 /* Optimization: discard pixels which don't change the colorbuffer.
249 *
250 * The code below is non-trivial and some math is involved.
251 *
252 * Discarding pixels must be disabled when FP16 AA is enabled.
253 * This is a hardware bug. Also, this implementation wouldn't work
254 * with FP blending enabled and equation clamping disabled.
255 *
256 * Equations other than ADD are rarely used and therefore won't be
257 * optimized. */
258 if ((eqRGB == PIPE_BLEND_ADD || eqRGB == PIPE_BLEND_REVERSE_SUBTRACT) &&
259 (eqA == PIPE_BLEND_ADD || eqA == PIPE_BLEND_REVERSE_SUBTRACT)) {
260 /* ADD: X+Y
261 * REVERSE_SUBTRACT: Y-X
262 *
263 * The idea is:
264 * If X = src*srcFactor = 0 and Y = dst*dstFactor = 1,
265 * then CB will not be changed.
266 *
267 * Given the srcFactor and dstFactor variables, we can derive
268 * what src and dst should be equal to and discard appropriate
269 * pixels.
270 */
271 if (blend_discard_if_src_alpha_0(srcRGB, srcA, dstRGB, dstA)) {
272 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0;
273 } else if (blend_discard_if_src_alpha_1(srcRGB, srcA,
274 dstRGB, dstA)) {
275 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1;
276 } else if (blend_discard_if_src_color_0(srcRGB, srcA,
277 dstRGB, dstA)) {
278 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_0;
279 } else if (blend_discard_if_src_color_1(srcRGB, srcA,
280 dstRGB, dstA)) {
281 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_1;
282 } else if (blend_discard_if_src_alpha_color_0(srcRGB, srcA,
283 dstRGB, dstA)) {
284 blend->blend_control |=
285 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_0;
286 } else if (blend_discard_if_src_alpha_color_1(srcRGB, srcA,
287 dstRGB, dstA)) {
288 blend->blend_control |=
289 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1;
290 }
291 }
292
293 /* separate alpha */
294 if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) {
295 blend->blend_control |= R300_SEPARATE_ALPHA_ENABLE;
296 blend->alpha_blend_control =
297 r300_translate_blend_function(eqA) |
298 (r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) |
299 (r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT);
300 }
301 }
302
303 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */
304 if (state->logicop_enable) {
305 blend->rop = R300_RB3D_ROPCNTL_ROP_ENABLE |
306 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT;
307 }
308
309 /* Color channel masks for all MRTs. */
310 blend->color_channel_mask = bgra_cmask(state->rt[0].colormask);
311 if (r300screen->caps->is_r500 && state->independent_blend_enable) {
312 if (state->rt[1].blend_enable) {
313 blend->color_channel_mask |= bgra_cmask(state->rt[1].colormask) << 4;
314 }
315 if (state->rt[2].blend_enable) {
316 blend->color_channel_mask |= bgra_cmask(state->rt[2].colormask) << 8;
317 }
318 if (state->rt[3].blend_enable) {
319 blend->color_channel_mask |= bgra_cmask(state->rt[3].colormask) << 12;
320 }
321 }
322
323 /* Neither fglrx nor classic r300 ever set this, regardless of dithering
324 * state. Since it's an optional implementation detail, we can leave it
325 * out and never dither.
326 *
327 * This could be revisited if we ever get quality or conformance hints.
328 *
329 if (state->dither) {
330 blend->dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
331 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT;
332 }
333 */
334
335 return (void*)blend;
336 }
337
338 /* Bind blend state. */
339 static void r300_bind_blend_state(struct pipe_context* pipe,
340 void* state)
341 {
342 struct r300_context* r300 = r300_context(pipe);
343
344 UPDATE_STATE(state, r300->blend_state);
345 }
346
347 /* Free blend state. */
348 static void r300_delete_blend_state(struct pipe_context* pipe,
349 void* state)
350 {
351 FREE(state);
352 }
353
354 /* Convert float to 10bit integer */
355 static unsigned float_to_fixed10(float f)
356 {
357 return CLAMP((unsigned)(f * 1023.9f), 0, 1023);
358 }
359
360 /* Set blend color.
361 * Setup both R300 and R500 registers, figure out later which one to write. */
362 static void r300_set_blend_color(struct pipe_context* pipe,
363 const struct pipe_blend_color* color)
364 {
365 struct r300_context* r300 = r300_context(pipe);
366 struct r300_screen* r300screen = r300_screen(pipe->screen);
367 struct r300_blend_color_state* state =
368 (struct r300_blend_color_state*)r300->blend_color_state.state;
369 union util_color uc;
370
371 util_pack_color(color->color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc);
372 state->blend_color = uc.ui;
373
374 /* XXX if FP16 blending is enabled, we should use the FP16 format */
375 state->blend_color_red_alpha =
376 float_to_fixed10(color->color[0]) |
377 (float_to_fixed10(color->color[3]) << 16);
378 state->blend_color_green_blue =
379 float_to_fixed10(color->color[2]) |
380 (float_to_fixed10(color->color[1]) << 16);
381
382 r300->blend_color_state.size = r300screen->caps->is_r500 ? 3 : 2;
383 r300->blend_color_state.dirty = TRUE;
384 }
385
386 static void r300_set_clip_state(struct pipe_context* pipe,
387 const struct pipe_clip_state* state)
388 {
389 struct r300_context* r300 = r300_context(pipe);
390
391 r300->clip = *state;
392
393 if (r300_screen(pipe->screen)->caps->has_tcl) {
394 memcpy(r300->clip_state.state, state, sizeof(struct pipe_clip_state));
395 r300->clip_state.size = 29;
396 } else {
397 draw_flush(r300->draw);
398 draw_set_clip_state(r300->draw, state);
399 r300->clip_state.size = 2;
400 }
401
402 r300->clip_state.dirty = TRUE;
403 }
404
405 /* Create a new depth, stencil, and alpha state based on the CSO dsa state.
406 *
407 * This contains the depth buffer, stencil buffer, alpha test, and such.
408 * On the Radeon, depth and stencil buffer setup are intertwined, which is
409 * the reason for some of the strange-looking assignments across registers. */
410 static void*
411 r300_create_dsa_state(struct pipe_context* pipe,
412 const struct pipe_depth_stencil_alpha_state* state)
413 {
414 struct r300_capabilities *caps =
415 r300_screen(r300_context(pipe)->context.screen)->caps;
416 struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state);
417
418 /* Depth test setup. */
419 if (state->depth.enabled) {
420 dsa->z_buffer_control |= R300_Z_ENABLE;
421
422 if (state->depth.writemask) {
423 dsa->z_buffer_control |= R300_Z_WRITE_ENABLE;
424 }
425
426 dsa->z_stencil_control |=
427 (r300_translate_depth_stencil_function(state->depth.func) <<
428 R300_Z_FUNC_SHIFT);
429 }
430
431 /* Stencil buffer setup. */
432 if (state->stencil[0].enabled) {
433 dsa->z_buffer_control |= R300_STENCIL_ENABLE;
434 dsa->z_stencil_control |=
435 (r300_translate_depth_stencil_function(state->stencil[0].func) <<
436 R300_S_FRONT_FUNC_SHIFT) |
437 (r300_translate_stencil_op(state->stencil[0].fail_op) <<
438 R300_S_FRONT_SFAIL_OP_SHIFT) |
439 (r300_translate_stencil_op(state->stencil[0].zpass_op) <<
440 R300_S_FRONT_ZPASS_OP_SHIFT) |
441 (r300_translate_stencil_op(state->stencil[0].zfail_op) <<
442 R300_S_FRONT_ZFAIL_OP_SHIFT);
443
444 dsa->stencil_ref_mask =
445 (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) |
446 (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT);
447
448 if (state->stencil[1].enabled) {
449 dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK;
450 dsa->z_stencil_control |=
451 (r300_translate_depth_stencil_function(state->stencil[1].func) <<
452 R300_S_BACK_FUNC_SHIFT) |
453 (r300_translate_stencil_op(state->stencil[1].fail_op) <<
454 R300_S_BACK_SFAIL_OP_SHIFT) |
455 (r300_translate_stencil_op(state->stencil[1].zpass_op) <<
456 R300_S_BACK_ZPASS_OP_SHIFT) |
457 (r300_translate_stencil_op(state->stencil[1].zfail_op) <<
458 R300_S_BACK_ZFAIL_OP_SHIFT);
459
460 if (caps->is_r500)
461 {
462 dsa->z_buffer_control |= R500_STENCIL_REFMASK_FRONT_BACK;
463 dsa->stencil_ref_bf =
464 (state->stencil[1].valuemask <<
465 R300_STENCILMASK_SHIFT) |
466 (state->stencil[1].writemask <<
467 R300_STENCILWRITEMASK_SHIFT);
468 }
469 }
470 }
471
472 /* Alpha test setup. */
473 if (state->alpha.enabled) {
474 dsa->alpha_function =
475 r300_translate_alpha_function(state->alpha.func) |
476 R300_FG_ALPHA_FUNC_ENABLE;
477
478 /* We could use 10bit alpha ref but who needs that? */
479 dsa->alpha_function |= float_to_ubyte(state->alpha.ref_value);
480
481 if (caps->is_r500)
482 dsa->alpha_function |= R500_FG_ALPHA_FUNC_8BIT;
483 }
484
485 return (void*)dsa;
486 }
487
488 /* Bind DSA state. */
489 static void r300_bind_dsa_state(struct pipe_context* pipe,
490 void* state)
491 {
492 struct r300_context* r300 = r300_context(pipe);
493
494 UPDATE_STATE(state, r300->dsa_state);
495 }
496
497 /* Free DSA state. */
498 static void r300_delete_dsa_state(struct pipe_context* pipe,
499 void* state)
500 {
501 FREE(state);
502 }
503
504 static void r300_set_stencil_ref(struct pipe_context* pipe,
505 const struct pipe_stencil_ref* sr)
506 {
507 struct r300_context* r300 = r300_context(pipe);
508 r300->stencil_ref = *sr;
509 r300->dsa_state.dirty = TRUE;
510 }
511
512 /* This switcheroo is needed just because of goddamned MACRO_SWITCH. */
513 static void r300_fb_update_tiling_flags(struct r300_context *r300,
514 const struct pipe_framebuffer_state *old_state,
515 const struct pipe_framebuffer_state *new_state)
516 {
517 struct r300_texture *tex;
518 unsigned i, j, level;
519
520 /* Reset tiling flags for old surfaces to default values. */
521 for (i = 0; i < old_state->nr_cbufs; i++) {
522 for (j = 0; j < new_state->nr_cbufs; j++) {
523 if (old_state->cbufs[i]->texture == new_state->cbufs[j]->texture) {
524 break;
525 }
526 }
527 /* If not binding the surface again... */
528 if (j != new_state->nr_cbufs) {
529 continue;
530 }
531
532 tex = (struct r300_texture*)old_state->cbufs[i]->texture;
533
534 if (tex) {
535 r300->rws->buffer_set_tiling(r300->rws, tex->buffer,
536 tex->pitch[0],
537 tex->microtile,
538 tex->macrotile);
539 }
540 }
541 if (old_state->zsbuf &&
542 (!new_state->zsbuf ||
543 old_state->zsbuf->texture != new_state->zsbuf->texture)) {
544 tex = (struct r300_texture*)old_state->zsbuf->texture;
545
546 if (tex) {
547 r300->rws->buffer_set_tiling(r300->rws, tex->buffer,
548 tex->pitch[0],
549 tex->microtile,
550 tex->macrotile);
551 }
552 }
553
554 /* Set tiling flags for new surfaces. */
555 for (i = 0; i < new_state->nr_cbufs; i++) {
556 tex = (struct r300_texture*)new_state->cbufs[i]->texture;
557 level = new_state->cbufs[i]->level;
558
559 r300->rws->buffer_set_tiling(r300->rws, tex->buffer,
560 tex->pitch[level],
561 tex->microtile,
562 tex->mip_macrotile[level]);
563 }
564 if (new_state->zsbuf) {
565 tex = (struct r300_texture*)new_state->zsbuf->texture;
566 level = new_state->zsbuf->level;
567
568 r300->rws->buffer_set_tiling(r300->rws, tex->buffer,
569 tex->pitch[level],
570 tex->microtile,
571 tex->mip_macrotile[level]);
572 }
573 }
574
575 static void
576 r300_set_framebuffer_state(struct pipe_context* pipe,
577 const struct pipe_framebuffer_state* state)
578 {
579 struct r300_context* r300 = r300_context(pipe);
580 struct r300_screen* r300screen = r300_screen(pipe->screen);
581 struct pipe_framebuffer_state *old_state = r300->fb_state.state;
582 unsigned max_width, max_height;
583 uint32_t zbuffer_bpp = 0;
584
585 if (state->nr_cbufs > 4) {
586 fprintf(stderr, "r300: Implementation error: Too many MRTs in %s, "
587 "refusing to bind framebuffer state!\n", __FUNCTION__);
588 return;
589 }
590
591 if (r300screen->caps->is_r500) {
592 max_width = max_height = 4096;
593 } else if (r300screen->caps->is_r400) {
594 max_width = max_height = 4021;
595 } else {
596 max_width = max_height = 2560;
597 }
598
599 if (state->width > max_width || state->height > max_height) {
600 fprintf(stderr, "r300: Implementation error: Render targets are too "
601 "big in %s, refusing to bind framebuffer state!\n", __FUNCTION__);
602 return;
603 }
604
605 if (r300->draw) {
606 draw_flush(r300->draw);
607 }
608
609 r300->fb_state.dirty = TRUE;
610
611 /* If nr_cbufs is changed from zero to non-zero or vice versa... */
612 if (!!old_state->nr_cbufs != !!state->nr_cbufs) {
613 r300->blend_state.dirty = TRUE;
614 }
615 /* If zsbuf is set from NULL to non-NULL or vice versa.. */
616 if (!!old_state->zsbuf != !!state->zsbuf) {
617 r300->dsa_state.dirty = TRUE;
618 }
619 if (!r300->scissor_enabled) {
620 r300->scissor_state.dirty = TRUE;
621 }
622
623 r300_fb_update_tiling_flags(r300, r300->fb_state.state, state);
624
625 memcpy(r300->fb_state.state, state, sizeof(struct pipe_framebuffer_state));
626
627 r300->fb_state.size = (10 * state->nr_cbufs) + (2 * (4 - state->nr_cbufs)) +
628 (state->zsbuf ? 10 : 0) + 8;
629
630 /* Polygon offset depends on the zbuffer bit depth. */
631 if (state->zsbuf && r300->polygon_offset_enabled) {
632 switch (util_format_get_blocksize(state->zsbuf->texture->format)) {
633 case 2:
634 zbuffer_bpp = 16;
635 break;
636 case 4:
637 zbuffer_bpp = 24;
638 break;
639 }
640
641 if (r300->zbuffer_bpp != zbuffer_bpp) {
642 r300->zbuffer_bpp = zbuffer_bpp;
643 r300->rs_state.dirty = TRUE;
644 }
645 }
646 }
647
648 /* Create fragment shader state. */
649 static void* r300_create_fs_state(struct pipe_context* pipe,
650 const struct pipe_shader_state* shader)
651 {
652 struct r300_fragment_shader* fs = NULL;
653
654 fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader);
655
656 /* Copy state directly into shader. */
657 fs->state = *shader;
658 fs->state.tokens = tgsi_dup_tokens(shader->tokens);
659
660 tgsi_scan_shader(shader->tokens, &fs->info);
661 r300_shader_read_fs_inputs(&fs->info, &fs->inputs);
662
663 return (void*)fs;
664 }
665
666 /* Bind fragment shader state. */
667 static void r300_bind_fs_state(struct pipe_context* pipe, void* shader)
668 {
669 struct r300_context* r300 = r300_context(pipe);
670 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
671
672 if (fs == NULL) {
673 r300->fs = NULL;
674 return;
675 }
676
677 r300->fs = fs;
678 r300_pick_fragment_shader(r300);
679
680 r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */
681
682 if (r300->vs_state.state && r300_vertex_shader_setup_wpos(r300)) {
683 r300->vap_output_state.dirty = TRUE;
684 }
685
686 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER | R300_NEW_FRAGMENT_SHADER_CONSTANTS;
687 }
688
689 /* Delete fragment shader state. */
690 static void r300_delete_fs_state(struct pipe_context* pipe, void* shader)
691 {
692 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
693 struct r300_fragment_shader_code *tmp, *ptr = fs->first;
694
695 while (ptr) {
696 tmp = ptr;
697 ptr = ptr->next;
698 rc_constants_destroy(&tmp->code.constants);
699 FREE(tmp);
700 }
701 FREE((void*)fs->state.tokens);
702 FREE(shader);
703 }
704
705 static void r300_set_polygon_stipple(struct pipe_context* pipe,
706 const struct pipe_poly_stipple* state)
707 {
708 /* XXX no idea how to set this up, but not terribly important */
709 }
710
711 /* Create a new rasterizer state based on the CSO rasterizer state.
712 *
713 * This is a very large chunk of state, and covers most of the graphics
714 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks.
715 *
716 * In a not entirely unironic sidenote, this state has nearly nothing to do
717 * with the actual block on the Radeon called the rasterizer (RS). */
718 static void* r300_create_rs_state(struct pipe_context* pipe,
719 const struct pipe_rasterizer_state* state)
720 {
721 struct r300_screen* r300screen = r300_screen(pipe->screen);
722 struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state);
723
724 /* Copy rasterizer state for Draw. */
725 rs->rs = *state;
726
727 #ifdef PIPE_ARCH_LITTLE_ENDIAN
728 rs->vap_control_status = R300_VC_NO_SWAP;
729 #else
730 rs->vap_control_status = R300_VC_32BIT_SWAP;
731 #endif
732
733 /* If no TCL engine is present, turn off the HW TCL. */
734 if (!r300screen->caps->has_tcl) {
735 rs->vap_control_status |= R300_VAP_TCL_BYPASS;
736 }
737
738 rs->point_size = pack_float_16_6x(state->point_size) |
739 (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT);
740
741 rs->line_control = pack_float_16_6x(state->line_width) |
742 R300_GA_LINE_CNTL_END_TYPE_COMP;
743
744 /* Enable polygon mode */
745 if (state->fill_cw != PIPE_POLYGON_MODE_FILL ||
746 state->fill_ccw != PIPE_POLYGON_MODE_FILL) {
747 rs->polygon_mode = R300_GA_POLY_MODE_DUAL;
748 }
749
750 /* Radeons don't think in "CW/CCW", they think in "front/back". */
751 if (state->front_winding == PIPE_WINDING_CW) {
752 rs->cull_mode = R300_FRONT_FACE_CW;
753
754 /* Polygon offset */
755 if (state->offset_cw) {
756 rs->polygon_offset_enable |= R300_FRONT_ENABLE;
757 }
758 if (state->offset_ccw) {
759 rs->polygon_offset_enable |= R300_BACK_ENABLE;
760 }
761
762 /* Polygon mode */
763 if (rs->polygon_mode) {
764 rs->polygon_mode |=
765 r300_translate_polygon_mode_front(state->fill_cw);
766 rs->polygon_mode |=
767 r300_translate_polygon_mode_back(state->fill_ccw);
768 }
769 } else {
770 rs->cull_mode = R300_FRONT_FACE_CCW;
771
772 /* Polygon offset */
773 if (state->offset_ccw) {
774 rs->polygon_offset_enable |= R300_FRONT_ENABLE;
775 }
776 if (state->offset_cw) {
777 rs->polygon_offset_enable |= R300_BACK_ENABLE;
778 }
779
780 /* Polygon mode */
781 if (rs->polygon_mode) {
782 rs->polygon_mode |=
783 r300_translate_polygon_mode_front(state->fill_ccw);
784 rs->polygon_mode |=
785 r300_translate_polygon_mode_back(state->fill_cw);
786 }
787 }
788 if (state->front_winding & state->cull_mode) {
789 rs->cull_mode |= R300_CULL_FRONT;
790 }
791 if (~(state->front_winding) & state->cull_mode) {
792 rs->cull_mode |= R300_CULL_BACK;
793 }
794
795 if (rs->polygon_offset_enable) {
796 rs->depth_offset = state->offset_units;
797 rs->depth_scale = state->offset_scale;
798 }
799
800 if (state->line_stipple_enable) {
801 rs->line_stipple_config =
802 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE |
803 (fui((float)state->line_stipple_factor) &
804 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK);
805 /* XXX this might need to be scaled up */
806 rs->line_stipple_value = state->line_stipple_pattern;
807 }
808
809 if (state->flatshade) {
810 rs->color_control = R300_SHADE_MODEL_FLAT;
811 } else {
812 rs->color_control = R300_SHADE_MODEL_SMOOTH;
813 }
814
815 return (void*)rs;
816 }
817
818 /* Bind rasterizer state. */
819 static void r300_bind_rs_state(struct pipe_context* pipe, void* state)
820 {
821 struct r300_context* r300 = r300_context(pipe);
822 struct r300_rs_state* rs = (struct r300_rs_state*)state;
823 boolean scissor_was_enabled = r300->scissor_enabled;
824
825 if (r300->draw) {
826 draw_flush(r300->draw);
827 draw_set_rasterizer_state(r300->draw, &rs->rs);
828 }
829
830 if (rs) {
831 r300->polygon_offset_enabled = rs->rs.offset_cw || rs->rs.offset_ccw;
832 r300->scissor_enabled = rs->rs.scissor;
833 } else {
834 r300->polygon_offset_enabled = FALSE;
835 r300->scissor_enabled = FALSE;
836 }
837
838 UPDATE_STATE(state, r300->rs_state);
839 r300->rs_state.size = 17 + (r300->polygon_offset_enabled ? 5 : 0);
840
841 if (scissor_was_enabled != r300->scissor_enabled) {
842 r300->scissor_state.dirty = TRUE;
843 }
844 }
845
846 /* Free rasterizer state. */
847 static void r300_delete_rs_state(struct pipe_context* pipe, void* state)
848 {
849 FREE(state);
850 }
851
852 static void*
853 r300_create_sampler_state(struct pipe_context* pipe,
854 const struct pipe_sampler_state* state)
855 {
856 struct r300_context* r300 = r300_context(pipe);
857 struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state);
858 boolean is_r500 = r300_screen(pipe->screen)->caps->is_r500;
859 int lod_bias;
860 union util_color uc;
861
862 sampler->state = *state;
863
864 sampler->filter0 |=
865 (r300_translate_wrap(state->wrap_s) << R300_TX_WRAP_S_SHIFT) |
866 (r300_translate_wrap(state->wrap_t) << R300_TX_WRAP_T_SHIFT) |
867 (r300_translate_wrap(state->wrap_r) << R300_TX_WRAP_R_SHIFT);
868
869 sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter,
870 state->mag_img_filter,
871 state->min_mip_filter,
872 state->max_anisotropy > 0);
873
874 sampler->filter0 |= r300_anisotropy(state->max_anisotropy);
875
876 /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */
877 /* We must pass these to the merge function to clamp them properly. */
878 sampler->min_lod = MAX2((unsigned)state->min_lod, 0);
879 sampler->max_lod = MAX2((unsigned)ceilf(state->max_lod), 0);
880
881 lod_bias = CLAMP((int)(state->lod_bias * 32), -(1 << 9), (1 << 9) - 1);
882
883 sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT;
884
885 /* This is very high quality anisotropic filtering for R5xx.
886 * It's good for benchmarking the performance of texturing but
887 * in practice we don't want to slow down the driver because it's
888 * a pretty good performance killer. Feel free to play with it. */
889 if (DBG_ON(r300, DBG_ANISOHQ) && is_r500) {
890 sampler->filter1 |= r500_anisotropy(state->max_anisotropy);
891 }
892
893 util_pack_color(state->border_color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc);
894 sampler->border_color = uc.ui;
895
896 /* R500-specific fixups and optimizations */
897 if (r300_screen(r300->context.screen)->caps->is_r500) {
898 sampler->filter1 |= R500_BORDER_FIX;
899 }
900
901 return (void*)sampler;
902 }
903
904 static void r300_bind_sampler_states(struct pipe_context* pipe,
905 unsigned count,
906 void** states)
907 {
908 struct r300_context* r300 = r300_context(pipe);
909 struct r300_textures_state* state =
910 (struct r300_textures_state*)r300->textures_state.state;
911
912 if (count > 8) {
913 return;
914 }
915
916 memcpy(state->sampler_states, states, sizeof(void*) * count);
917 state->sampler_count = count;
918
919 r300->textures_state.dirty = TRUE;
920
921 /* Pick a fragment shader based on the texture compare state. */
922 if (r300->fs && count) {
923 if (r300_pick_fragment_shader(r300)) {
924 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER |
925 R300_NEW_FRAGMENT_SHADER_CONSTANTS;
926 }
927 }
928 }
929
930 static void r300_lacks_vertex_textures(struct pipe_context* pipe,
931 unsigned count,
932 void** states)
933 {
934 }
935
936 static void r300_delete_sampler_state(struct pipe_context* pipe, void* state)
937 {
938 FREE(state);
939 }
940
941 static void r300_set_fragment_sampler_views(struct pipe_context* pipe,
942 unsigned count,
943 struct pipe_sampler_view** views)
944 {
945 struct r300_context* r300 = r300_context(pipe);
946 struct r300_textures_state* state =
947 (struct r300_textures_state*)r300->textures_state.state;
948 struct r300_texture *texture;
949 unsigned i;
950 boolean is_r500 = r300_screen(r300->context.screen)->caps->is_r500;
951 boolean dirty_tex = FALSE;
952
953 /* XXX magic num */
954 if (count > 8) {
955 return;
956 }
957
958 for (i = 0; i < count; i++) {
959 if (state->fragment_sampler_views[i] != views[i]) {
960 pipe_sampler_view_reference(&state->fragment_sampler_views[i],
961 views[i]);
962
963 if (!views[i]) {
964 continue;
965 }
966
967 /* A new sampler view (= texture)... */
968 dirty_tex = TRUE;
969
970 /* R300-specific - set the texrect factor in the fragment shader */
971 texture = (struct r300_texture *)views[i]->texture;
972 if (!is_r500 && texture->is_npot) {
973 /* XXX It would be nice to re-emit just 1 constant,
974 * XXX not all of them */
975 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS;
976 }
977 }
978 }
979
980 for (i = count; i < 8; i++) {
981 if (state->fragment_sampler_views[i]) {
982 pipe_sampler_view_reference(&state->fragment_sampler_views[i],
983 NULL);
984 }
985 }
986
987 state->texture_count = count;
988
989 r300->textures_state.dirty = TRUE;
990
991 if (dirty_tex) {
992 r300->texture_cache_inval.dirty = TRUE;
993 }
994 }
995
996 static struct pipe_sampler_view *
997 r300_create_sampler_view(struct pipe_context *pipe,
998 struct pipe_texture *texture,
999 const struct pipe_sampler_view *templ)
1000 {
1001 struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view);
1002
1003 if (view) {
1004 *view = *templ;
1005 view->reference.count = 1;
1006 view->texture = NULL;
1007 pipe_texture_reference(&view->texture, texture);
1008 view->context = pipe;
1009 }
1010
1011 return view;
1012 }
1013
1014 static void
1015 r300_sampler_view_destroy(struct pipe_context *pipe,
1016 struct pipe_sampler_view *view)
1017 {
1018 pipe_texture_reference(&view->texture, NULL);
1019 FREE(view);
1020 }
1021
1022 static void r300_set_scissor_state(struct pipe_context* pipe,
1023 const struct pipe_scissor_state* state)
1024 {
1025 struct r300_context* r300 = r300_context(pipe);
1026
1027 memcpy(r300->scissor_state.state, state,
1028 sizeof(struct pipe_scissor_state));
1029
1030 if (r300->scissor_enabled) {
1031 r300->scissor_state.dirty = TRUE;
1032 }
1033 }
1034
1035 static void r300_set_viewport_state(struct pipe_context* pipe,
1036 const struct pipe_viewport_state* state)
1037 {
1038 struct r300_context* r300 = r300_context(pipe);
1039 struct r300_viewport_state* viewport =
1040 (struct r300_viewport_state*)r300->viewport_state.state;
1041
1042 r300->viewport = *state;
1043
1044 /* Do the transform in HW. */
1045 viewport->vte_control = R300_VTX_W0_FMT;
1046
1047 if (state->scale[0] != 1.0f) {
1048 viewport->xscale = state->scale[0];
1049 viewport->vte_control |= R300_VPORT_X_SCALE_ENA;
1050 }
1051 if (state->scale[1] != 1.0f) {
1052 viewport->yscale = state->scale[1];
1053 viewport->vte_control |= R300_VPORT_Y_SCALE_ENA;
1054 }
1055 if (state->scale[2] != 1.0f) {
1056 viewport->zscale = state->scale[2];
1057 viewport->vte_control |= R300_VPORT_Z_SCALE_ENA;
1058 }
1059 if (state->translate[0] != 0.0f) {
1060 viewport->xoffset = state->translate[0];
1061 viewport->vte_control |= R300_VPORT_X_OFFSET_ENA;
1062 }
1063 if (state->translate[1] != 0.0f) {
1064 viewport->yoffset = state->translate[1];
1065 viewport->vte_control |= R300_VPORT_Y_OFFSET_ENA;
1066 }
1067 if (state->translate[2] != 0.0f) {
1068 viewport->zoffset = state->translate[2];
1069 viewport->vte_control |= R300_VPORT_Z_OFFSET_ENA;
1070 }
1071
1072 r300->viewport_state.dirty = TRUE;
1073 if (r300->fs && r300->fs->inputs.wpos != ATTR_UNUSED) {
1074 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS;
1075 }
1076 }
1077
1078 static void r300_set_vertex_buffers(struct pipe_context* pipe,
1079 unsigned count,
1080 const struct pipe_vertex_buffer* buffers)
1081 {
1082 struct r300_context* r300 = r300_context(pipe);
1083 struct pipe_vertex_buffer *vbo;
1084 unsigned i, max_index = (1 << 24) - 1;
1085 boolean any_user_buffer = FALSE;
1086
1087 if (count == r300->vertex_buffer_count &&
1088 memcmp(r300->vertex_buffer, buffers,
1089 sizeof(struct pipe_vertex_buffer) * count) == 0) {
1090 return;
1091 }
1092
1093 /* Check if the stride is aligned to the size of DWORD. */
1094 for (i = 0; i < count; i++) {
1095 if (buffers[i].buffer) {
1096 if (buffers[i].stride % 4 != 0) {
1097 // XXX Shouldn't we align the buffer?
1098 fprintf(stderr, "r300_set_vertex_buffers: "
1099 "Unaligned buffer stride %i isn't supported.\n",
1100 buffers[i].stride);
1101 assert(0);
1102 abort();
1103 }
1104 }
1105 }
1106
1107 for (i = 0; i < count; i++) {
1108 /* Why, yes, I AM casting away constness. How did you know? */
1109 vbo = (struct pipe_vertex_buffer*)&buffers[i];
1110
1111 /* Reference our buffer. */
1112 pipe_buffer_reference(&r300->vertex_buffer[i].buffer, vbo->buffer);
1113
1114 /* Skip NULL buffers */
1115 if (!buffers[i].buffer) {
1116 continue;
1117 }
1118
1119 if (r300_buffer_is_user_buffer(vbo->buffer)) {
1120 any_user_buffer = TRUE;
1121 }
1122
1123 if (vbo->max_index == ~0) {
1124 /* Bogus value from broken state tracker; hax it. */
1125 vbo->max_index =
1126 (vbo->buffer->size - vbo->buffer_offset) / vbo->stride;
1127 }
1128
1129 max_index = MIN2(vbo->max_index, max_index);
1130 }
1131
1132 for (; i < r300->vertex_buffer_count; i++) {
1133 /* Dereference any old buffers. */
1134 pipe_buffer_reference(&r300->vertex_buffer[i].buffer, NULL);
1135 }
1136
1137 memcpy(r300->vertex_buffer, buffers,
1138 sizeof(struct pipe_vertex_buffer) * count);
1139
1140 r300->vertex_buffer_count = count;
1141 r300->vertex_buffer_max_index = max_index;
1142 r300->any_user_vbs = any_user_buffer;
1143
1144 if (r300->draw) {
1145 draw_flush(r300->draw);
1146 draw_set_vertex_buffers(r300->draw, count, buffers);
1147 }
1148 }
1149
1150 /* Update the PSC tables. */
1151 static void r300_vertex_psc(struct r300_vertex_element_state *velems)
1152 {
1153 struct r300_vertex_stream_state *vstream = &velems->vertex_stream;
1154 uint16_t type, swizzle;
1155 enum pipe_format format;
1156 unsigned i;
1157
1158 assert(velems->count <= 16);
1159
1160 /* Vertex shaders have no semantics on their inputs,
1161 * so PSC should just route stuff based on the vertex elements,
1162 * and not on attrib information. */
1163 for (i = 0; i < velems->count; i++) {
1164 format = velems->velem[i].src_format;
1165
1166 type = r300_translate_vertex_data_type(format) |
1167 (i << R300_DST_VEC_LOC_SHIFT);
1168 swizzle = r300_translate_vertex_data_swizzle(format);
1169
1170 if (i & 1) {
1171 vstream->vap_prog_stream_cntl[i >> 1] |= type << 16;
1172 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16;
1173 } else {
1174 vstream->vap_prog_stream_cntl[i >> 1] |= type;
1175 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle;
1176 }
1177 }
1178
1179 /* Set the last vector in the PSC. */
1180 if (i) {
1181 i -= 1;
1182 }
1183 vstream->vap_prog_stream_cntl[i >> 1] |=
1184 (R300_LAST_VEC << (i & 1 ? 16 : 0));
1185
1186 vstream->count = (i >> 1) + 1;
1187 }
1188
1189 static void* r300_create_vertex_elements_state(struct pipe_context* pipe,
1190 unsigned count,
1191 const struct pipe_vertex_element* attribs)
1192 {
1193 struct r300_screen* r300screen = r300_screen(pipe->screen);
1194 struct r300_vertex_element_state *velems;
1195 unsigned i, size;
1196
1197 assert(count <= PIPE_MAX_ATTRIBS);
1198 velems = CALLOC_STRUCT(r300_vertex_element_state);
1199 if (velems != NULL) {
1200 velems->count = count;
1201 memcpy(velems->velem, attribs, sizeof(struct pipe_vertex_element) * count);
1202
1203 if (r300screen->caps->has_tcl) {
1204 /* Check if the format is aligned to the size of DWORD. */
1205 for (i = 0; i < count; i++) {
1206 size = util_format_get_blocksize(attribs[i].src_format);
1207
1208 if (size % 4 != 0) {
1209 /* XXX Shouldn't we align the format? */
1210 fprintf(stderr, "r300_create_vertex_elements_state: "
1211 "Unaligned format %s:%i isn't supported\n",
1212 util_format_name(attribs[i].src_format), size);
1213 assert(0);
1214 abort();
1215 }
1216 }
1217
1218 r300_vertex_psc(velems);
1219 }
1220 }
1221 return velems;
1222 }
1223
1224 static void r300_bind_vertex_elements_state(struct pipe_context *pipe,
1225 void *state)
1226 {
1227 struct r300_context *r300 = r300_context(pipe);
1228 struct r300_vertex_element_state *velems = state;
1229
1230 if (velems == NULL) {
1231 return;
1232 }
1233
1234 r300->velems = velems;
1235
1236 if (r300->draw) {
1237 draw_flush(r300->draw);
1238 draw_set_vertex_elements(r300->draw, velems->count, velems->velem);
1239 }
1240
1241 UPDATE_STATE(&velems->vertex_stream, r300->vertex_stream_state);
1242 r300->vertex_stream_state.size = (1 + velems->vertex_stream.count) * 2;
1243 }
1244
1245 static void r300_delete_vertex_elements_state(struct pipe_context *pipe, void *state)
1246 {
1247 FREE(state);
1248 }
1249
1250 static void* r300_create_vs_state(struct pipe_context* pipe,
1251 const struct pipe_shader_state* shader)
1252 {
1253 struct r300_context* r300 = r300_context(pipe);
1254
1255 struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader);
1256 r300_vertex_shader_common_init(vs, shader);
1257
1258 if (r300_screen(pipe->screen)->caps->has_tcl) {
1259 r300_translate_vertex_shader(r300, vs);
1260 } else {
1261 vs->draw_vs = draw_create_vertex_shader(r300->draw, shader);
1262 }
1263
1264 return vs;
1265 }
1266
1267 static void r300_bind_vs_state(struct pipe_context* pipe, void* shader)
1268 {
1269 struct r300_context* r300 = r300_context(pipe);
1270 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
1271
1272 if (vs == NULL) {
1273 r300->vs_state.state = NULL;
1274 return;
1275 }
1276 if (vs == r300->vs_state.state) {
1277 return;
1278 }
1279 r300->vs_state.state = vs;
1280
1281 // VS output mapping for HWTCL or stream mapping for SWTCL to the RS block
1282 if (r300->fs) {
1283 r300_vertex_shader_setup_wpos(r300);
1284 }
1285 memcpy(r300->vap_output_state.state, &vs->vap_out,
1286 sizeof(struct r300_vap_output_state));
1287 r300->vap_output_state.dirty = TRUE;
1288
1289 /* The majority of the RS block bits is dependent on the vertex shader. */
1290 r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */
1291
1292 if (r300_screen(pipe->screen)->caps->has_tcl) {
1293 r300->vs_state.dirty = TRUE;
1294 r300->vs_state.size = vs->code.length + 9;
1295
1296 r300->pvs_flush.dirty = TRUE;
1297
1298 r300->dirty_state |= R300_NEW_VERTEX_SHADER_CONSTANTS;
1299 } else {
1300 draw_flush(r300->draw);
1301 draw_bind_vertex_shader(r300->draw,
1302 (struct draw_vertex_shader*)vs->draw_vs);
1303 }
1304 }
1305
1306 static void r300_delete_vs_state(struct pipe_context* pipe, void* shader)
1307 {
1308 struct r300_context* r300 = r300_context(pipe);
1309 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
1310
1311 if (r300_screen(pipe->screen)->caps->has_tcl) {
1312 rc_constants_destroy(&vs->code.constants);
1313 } else {
1314 draw_delete_vertex_shader(r300->draw,
1315 (struct draw_vertex_shader*)vs->draw_vs);
1316 }
1317
1318 FREE((void*)vs->state.tokens);
1319 FREE(shader);
1320 }
1321
1322 static void r300_set_constant_buffer(struct pipe_context *pipe,
1323 uint shader, uint index,
1324 struct pipe_buffer *buf)
1325 {
1326 struct r300_context* r300 = r300_context(pipe);
1327 struct r300_screen *r300screen = r300_screen(pipe->screen);
1328 void *mapped;
1329 int max_size = 0;
1330
1331 if (buf == NULL || buf->size == 0 ||
1332 (mapped = pipe_buffer_map(pipe->screen, buf, PIPE_BUFFER_USAGE_CPU_READ)) == NULL)
1333 {
1334 r300->shader_constants[shader].count = 0;
1335 return;
1336 }
1337
1338 assert((buf->size % 4 * sizeof(float)) == 0);
1339
1340 /* Check the size of the constant buffer. */
1341 switch (shader) {
1342 case PIPE_SHADER_VERTEX:
1343 max_size = 256;
1344 break;
1345 case PIPE_SHADER_FRAGMENT:
1346 if (r300screen->caps->is_r500) {
1347 max_size = 256;
1348 /* XXX Implement emission of r400's extended constant buffer. */
1349 /*} else if (r300screen->caps->is_r400) {
1350 max_size = 64;*/
1351 } else {
1352 max_size = 32;
1353 }
1354 break;
1355 default:
1356 assert(0);
1357 }
1358
1359 /* XXX Subtract immediates and RC_STATE_* variables. */
1360 if (buf->size > (sizeof(float) * 4 * max_size)) {
1361 fprintf(stderr, "r300: Max size of the constant buffer is "
1362 "%i*4 floats.\n", max_size);
1363 abort();
1364 }
1365
1366 memcpy(r300->shader_constants[shader].constants, mapped, buf->size);
1367 r300->shader_constants[shader].count = buf->size / (4 * sizeof(float));
1368 pipe_buffer_unmap(pipe->screen, buf);
1369
1370 if (shader == PIPE_SHADER_VERTEX) {
1371 if (r300screen->caps->has_tcl) {
1372 r300->dirty_state |= R300_NEW_VERTEX_SHADER_CONSTANTS;
1373 r300->pvs_flush.dirty = TRUE;
1374 } else if (r300->draw) {
1375 draw_set_mapped_constant_buffer(r300->draw, PIPE_SHADER_VERTEX,
1376 0, r300->shader_constants[PIPE_SHADER_VERTEX].constants,
1377 buf->size);
1378 }
1379 } else if (shader == PIPE_SHADER_FRAGMENT) {
1380 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS;
1381 }
1382 }
1383
1384 void r300_init_state_functions(struct r300_context* r300)
1385 {
1386 r300->context.create_blend_state = r300_create_blend_state;
1387 r300->context.bind_blend_state = r300_bind_blend_state;
1388 r300->context.delete_blend_state = r300_delete_blend_state;
1389
1390 r300->context.set_blend_color = r300_set_blend_color;
1391
1392 r300->context.set_clip_state = r300_set_clip_state;
1393
1394 r300->context.set_constant_buffer = r300_set_constant_buffer;
1395
1396 r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state;
1397 r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state;
1398 r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state;
1399
1400 r300->context.set_stencil_ref = r300_set_stencil_ref;
1401
1402 r300->context.set_framebuffer_state = r300_set_framebuffer_state;
1403
1404 r300->context.create_fs_state = r300_create_fs_state;
1405 r300->context.bind_fs_state = r300_bind_fs_state;
1406 r300->context.delete_fs_state = r300_delete_fs_state;
1407
1408 r300->context.set_polygon_stipple = r300_set_polygon_stipple;
1409
1410 r300->context.create_rasterizer_state = r300_create_rs_state;
1411 r300->context.bind_rasterizer_state = r300_bind_rs_state;
1412 r300->context.delete_rasterizer_state = r300_delete_rs_state;
1413
1414 r300->context.create_sampler_state = r300_create_sampler_state;
1415 r300->context.bind_fragment_sampler_states = r300_bind_sampler_states;
1416 r300->context.bind_vertex_sampler_states = r300_lacks_vertex_textures;
1417 r300->context.delete_sampler_state = r300_delete_sampler_state;
1418
1419 r300->context.set_fragment_sampler_views = r300_set_fragment_sampler_views;
1420 r300->context.create_sampler_view = r300_create_sampler_view;
1421 r300->context.sampler_view_destroy = r300_sampler_view_destroy;
1422
1423 r300->context.set_scissor_state = r300_set_scissor_state;
1424
1425 r300->context.set_viewport_state = r300_set_viewport_state;
1426
1427 r300->context.set_vertex_buffers = r300_set_vertex_buffers;
1428
1429 r300->context.create_vertex_elements_state = r300_create_vertex_elements_state;
1430 r300->context.bind_vertex_elements_state = r300_bind_vertex_elements_state;
1431 r300->context.delete_vertex_elements_state = r300_delete_vertex_elements_state;
1432
1433 r300->context.create_vs_state = r300_create_vs_state;
1434 r300->context.bind_vs_state = r300_bind_vs_state;
1435 r300->context.delete_vs_state = r300_delete_vs_state;
1436 }