r300g: split the vertex buffer alignment validation
[mesa.git] / src / gallium / drivers / r300 / r300_state.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2009 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "draw/draw_context.h"
25
26 #include "util/u_math.h"
27 #include "util/u_memory.h"
28 #include "util/u_pack_color.h"
29
30 #include "tgsi/tgsi_parse.h"
31
32 #include "pipe/p_config.h"
33
34 #include "r300_context.h"
35 #include "r300_reg.h"
36 #include "r300_screen.h"
37 #include "r300_screen_buffer.h"
38 #include "r300_state_inlines.h"
39 #include "r300_fs.h"
40 #include "r300_vs.h"
41
42 #include "radeon_winsys.h"
43
44 /* r300_state: Functions used to intialize state context by translating
45 * Gallium state objects into semi-native r300 state objects. */
46
47 #define UPDATE_STATE(cso, atom) \
48 if (cso != atom.state) { \
49 atom.state = cso; \
50 atom.dirty = TRUE; \
51 }
52
53 static boolean blend_discard_if_src_alpha_0(unsigned srcRGB, unsigned srcA,
54 unsigned dstRGB, unsigned dstA)
55 {
56 /* If the blend equation is ADD or REVERSE_SUBTRACT,
57 * SRC_ALPHA == 0, and the following state is set, the colorbuffer
58 * will not be changed.
59 * Notice that the dst factors are the src factors inverted. */
60 return (srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
61 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
62 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
63 (srcA == PIPE_BLENDFACTOR_SRC_COLOR ||
64 srcA == PIPE_BLENDFACTOR_SRC_ALPHA ||
65 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
66 srcA == PIPE_BLENDFACTOR_ZERO) &&
67 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
68 dstRGB == PIPE_BLENDFACTOR_ONE) &&
69 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
70 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
71 dstA == PIPE_BLENDFACTOR_ONE);
72 }
73
74 static boolean blend_discard_if_src_alpha_1(unsigned srcRGB, unsigned srcA,
75 unsigned dstRGB, unsigned dstA)
76 {
77 /* If the blend equation is ADD or REVERSE_SUBTRACT,
78 * SRC_ALPHA == 1, and the following state is set, the colorbuffer
79 * will not be changed.
80 * Notice that the dst factors are the src factors inverted. */
81 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
82 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
83 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
84 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
85 srcA == PIPE_BLENDFACTOR_ZERO) &&
86 (dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
87 dstRGB == PIPE_BLENDFACTOR_ONE) &&
88 (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
89 dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
90 dstA == PIPE_BLENDFACTOR_ONE);
91 }
92
93 static boolean blend_discard_if_src_color_0(unsigned srcRGB, unsigned srcA,
94 unsigned dstRGB, unsigned dstA)
95 {
96 /* If the blend equation is ADD or REVERSE_SUBTRACT,
97 * SRC_COLOR == (0,0,0), and the following state is set, the colorbuffer
98 * will not be changed.
99 * Notice that the dst factors are the src factors inverted. */
100 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
101 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
102 (srcA == PIPE_BLENDFACTOR_ZERO) &&
103 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
104 dstRGB == PIPE_BLENDFACTOR_ONE) &&
105 (dstA == PIPE_BLENDFACTOR_ONE);
106 }
107
108 static boolean blend_discard_if_src_color_1(unsigned srcRGB, unsigned srcA,
109 unsigned dstRGB, unsigned dstA)
110 {
111 /* If the blend equation is ADD or REVERSE_SUBTRACT,
112 * SRC_COLOR == (1,1,1), and the following state is set, the colorbuffer
113 * will not be changed.
114 * Notice that the dst factors are the src factors inverted. */
115 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
116 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
117 (srcA == PIPE_BLENDFACTOR_ZERO) &&
118 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
119 dstRGB == PIPE_BLENDFACTOR_ONE) &&
120 (dstA == PIPE_BLENDFACTOR_ONE);
121 }
122
123 static boolean blend_discard_if_src_alpha_color_0(unsigned srcRGB, unsigned srcA,
124 unsigned dstRGB, unsigned dstA)
125 {
126 /* If the blend equation is ADD or REVERSE_SUBTRACT,
127 * SRC_ALPHA_COLOR == (0,0,0,0), and the following state is set,
128 * the colorbuffer will not be changed.
129 * Notice that the dst factors are the src factors inverted. */
130 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
131 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
132 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
133 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
134 (srcA == PIPE_BLENDFACTOR_SRC_COLOR ||
135 srcA == PIPE_BLENDFACTOR_SRC_ALPHA ||
136 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
137 srcA == PIPE_BLENDFACTOR_ZERO) &&
138 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
139 dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
140 dstRGB == PIPE_BLENDFACTOR_ONE) &&
141 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
142 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
143 dstA == PIPE_BLENDFACTOR_ONE);
144 }
145
146 static boolean blend_discard_if_src_alpha_color_1(unsigned srcRGB, unsigned srcA,
147 unsigned dstRGB, unsigned dstA)
148 {
149 /* If the blend equation is ADD or REVERSE_SUBTRACT,
150 * SRC_ALPHA_COLOR == (1,1,1,1), and the following state is set,
151 * the colorbuffer will not be changed.
152 * Notice that the dst factors are the src factors inverted. */
153 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
154 srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
155 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
156 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
157 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
158 srcA == PIPE_BLENDFACTOR_ZERO) &&
159 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
160 dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
161 dstRGB == PIPE_BLENDFACTOR_ONE) &&
162 (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
163 dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
164 dstA == PIPE_BLENDFACTOR_ONE);
165 }
166
167 static unsigned bgra_cmask(unsigned mask)
168 {
169 /* Gallium uses RGBA color ordering while R300 expects BGRA. */
170
171 return ((mask & PIPE_MASK_R) << 2) |
172 ((mask & PIPE_MASK_B) >> 2) |
173 (mask & (PIPE_MASK_G | PIPE_MASK_A));
174 }
175
176 /* Create a new blend state based on the CSO blend state.
177 *
178 * This encompasses alpha blending, logic/raster ops, and blend dithering. */
179 static void* r300_create_blend_state(struct pipe_context* pipe,
180 const struct pipe_blend_state* state)
181 {
182 struct r300_screen* r300screen = r300_screen(pipe->screen);
183 struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state);
184
185 if (state->rt[0].blend_enable)
186 {
187 unsigned eqRGB = state->rt[0].rgb_func;
188 unsigned srcRGB = state->rt[0].rgb_src_factor;
189 unsigned dstRGB = state->rt[0].rgb_dst_factor;
190
191 unsigned eqA = state->rt[0].alpha_func;
192 unsigned srcA = state->rt[0].alpha_src_factor;
193 unsigned dstA = state->rt[0].alpha_dst_factor;
194
195 /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha,
196 * this is just the crappy D3D naming */
197 blend->blend_control = R300_ALPHA_BLEND_ENABLE |
198 r300_translate_blend_function(eqRGB) |
199 ( r300_translate_blend_factor(srcRGB) << R300_SRC_BLEND_SHIFT) |
200 ( r300_translate_blend_factor(dstRGB) << R300_DST_BLEND_SHIFT);
201
202 /* Optimization: some operations do not require the destination color.
203 *
204 * When SRC_ALPHA_SATURATE is used, colorbuffer reads must be enabled,
205 * otherwise blending gives incorrect results. It seems to be
206 * a hardware bug. */
207 if (eqRGB == PIPE_BLEND_MIN || eqA == PIPE_BLEND_MIN ||
208 eqRGB == PIPE_BLEND_MAX || eqA == PIPE_BLEND_MAX ||
209 dstRGB != PIPE_BLENDFACTOR_ZERO ||
210 dstA != PIPE_BLENDFACTOR_ZERO ||
211 srcRGB == PIPE_BLENDFACTOR_DST_COLOR ||
212 srcRGB == PIPE_BLENDFACTOR_DST_ALPHA ||
213 srcRGB == PIPE_BLENDFACTOR_INV_DST_COLOR ||
214 srcRGB == PIPE_BLENDFACTOR_INV_DST_ALPHA ||
215 srcA == PIPE_BLENDFACTOR_DST_COLOR ||
216 srcA == PIPE_BLENDFACTOR_DST_ALPHA ||
217 srcA == PIPE_BLENDFACTOR_INV_DST_COLOR ||
218 srcA == PIPE_BLENDFACTOR_INV_DST_ALPHA ||
219 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE) {
220 /* Enable reading from the colorbuffer. */
221 blend->blend_control |= R300_READ_ENABLE;
222
223 if (r300_screen(r300_context(pipe)->context.screen)->caps->is_r500) {
224 /* Optimization: Depending on incoming pixels, we can
225 * conditionally disable the reading in hardware... */
226 if (eqRGB != PIPE_BLEND_MIN && eqA != PIPE_BLEND_MIN &&
227 eqRGB != PIPE_BLEND_MAX && eqA != PIPE_BLEND_MAX) {
228 /* Disable reading if SRC_ALPHA == 0. */
229 if ((dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
230 dstRGB == PIPE_BLENDFACTOR_ZERO) &&
231 (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
232 dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
233 dstA == PIPE_BLENDFACTOR_ZERO)) {
234 blend->blend_control |= R500_SRC_ALPHA_0_NO_READ;
235 }
236
237 /* Disable reading if SRC_ALPHA == 1. */
238 if ((dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
239 dstRGB == PIPE_BLENDFACTOR_ZERO) &&
240 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
241 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
242 dstA == PIPE_BLENDFACTOR_ZERO)) {
243 blend->blend_control |= R500_SRC_ALPHA_1_NO_READ;
244 }
245 }
246 }
247 }
248
249 /* Optimization: discard pixels which don't change the colorbuffer.
250 *
251 * The code below is non-trivial and some math is involved.
252 *
253 * Discarding pixels must be disabled when FP16 AA is enabled.
254 * This is a hardware bug. Also, this implementation wouldn't work
255 * with FP blending enabled and equation clamping disabled.
256 *
257 * Equations other than ADD are rarely used and therefore won't be
258 * optimized. */
259 if ((eqRGB == PIPE_BLEND_ADD || eqRGB == PIPE_BLEND_REVERSE_SUBTRACT) &&
260 (eqA == PIPE_BLEND_ADD || eqA == PIPE_BLEND_REVERSE_SUBTRACT)) {
261 /* ADD: X+Y
262 * REVERSE_SUBTRACT: Y-X
263 *
264 * The idea is:
265 * If X = src*srcFactor = 0 and Y = dst*dstFactor = 1,
266 * then CB will not be changed.
267 *
268 * Given the srcFactor and dstFactor variables, we can derive
269 * what src and dst should be equal to and discard appropriate
270 * pixels.
271 */
272 if (blend_discard_if_src_alpha_0(srcRGB, srcA, dstRGB, dstA)) {
273 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0;
274 } else if (blend_discard_if_src_alpha_1(srcRGB, srcA,
275 dstRGB, dstA)) {
276 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1;
277 } else if (blend_discard_if_src_color_0(srcRGB, srcA,
278 dstRGB, dstA)) {
279 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_0;
280 } else if (blend_discard_if_src_color_1(srcRGB, srcA,
281 dstRGB, dstA)) {
282 blend->blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_1;
283 } else if (blend_discard_if_src_alpha_color_0(srcRGB, srcA,
284 dstRGB, dstA)) {
285 blend->blend_control |=
286 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_0;
287 } else if (blend_discard_if_src_alpha_color_1(srcRGB, srcA,
288 dstRGB, dstA)) {
289 blend->blend_control |=
290 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1;
291 }
292 }
293
294 /* separate alpha */
295 if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) {
296 blend->blend_control |= R300_SEPARATE_ALPHA_ENABLE;
297 blend->alpha_blend_control =
298 r300_translate_blend_function(eqA) |
299 (r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) |
300 (r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT);
301 }
302 }
303
304 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */
305 if (state->logicop_enable) {
306 blend->rop = R300_RB3D_ROPCNTL_ROP_ENABLE |
307 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT;
308 }
309
310 /* Color channel masks for all MRTs. */
311 blend->color_channel_mask = bgra_cmask(state->rt[0].colormask);
312 if (r300screen->caps->is_r500 && state->independent_blend_enable) {
313 if (state->rt[1].blend_enable) {
314 blend->color_channel_mask |= bgra_cmask(state->rt[1].colormask) << 4;
315 }
316 if (state->rt[2].blend_enable) {
317 blend->color_channel_mask |= bgra_cmask(state->rt[2].colormask) << 8;
318 }
319 if (state->rt[3].blend_enable) {
320 blend->color_channel_mask |= bgra_cmask(state->rt[3].colormask) << 12;
321 }
322 }
323
324 if (state->dither) {
325 blend->dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
326 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT;
327 }
328
329 return (void*)blend;
330 }
331
332 /* Bind blend state. */
333 static void r300_bind_blend_state(struct pipe_context* pipe,
334 void* state)
335 {
336 struct r300_context* r300 = r300_context(pipe);
337
338 UPDATE_STATE(state, r300->blend_state);
339 }
340
341 /* Free blend state. */
342 static void r300_delete_blend_state(struct pipe_context* pipe,
343 void* state)
344 {
345 FREE(state);
346 }
347
348 /* Convert float to 10bit integer */
349 static unsigned float_to_fixed10(float f)
350 {
351 return CLAMP((unsigned)(f * 1023.9f), 0, 1023);
352 }
353
354 /* Set blend color.
355 * Setup both R300 and R500 registers, figure out later which one to write. */
356 static void r300_set_blend_color(struct pipe_context* pipe,
357 const struct pipe_blend_color* color)
358 {
359 struct r300_context* r300 = r300_context(pipe);
360 struct r300_screen* r300screen = r300_screen(pipe->screen);
361 struct r300_blend_color_state* state =
362 (struct r300_blend_color_state*)r300->blend_color_state.state;
363 union util_color uc;
364
365 util_pack_color(color->color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc);
366 state->blend_color = uc.ui;
367
368 /* XXX if FP16 blending is enabled, we should use the FP16 format */
369 state->blend_color_red_alpha =
370 float_to_fixed10(color->color[0]) |
371 (float_to_fixed10(color->color[3]) << 16);
372 state->blend_color_green_blue =
373 float_to_fixed10(color->color[2]) |
374 (float_to_fixed10(color->color[1]) << 16);
375
376 r300->blend_color_state.size = r300screen->caps->is_r500 ? 3 : 2;
377 r300->blend_color_state.dirty = TRUE;
378 }
379
380 static void r300_set_clip_state(struct pipe_context* pipe,
381 const struct pipe_clip_state* state)
382 {
383 struct r300_context* r300 = r300_context(pipe);
384
385 r300->clip = *state;
386
387 if (r300_screen(pipe->screen)->caps->has_tcl) {
388 memcpy(r300->clip_state.state, state, sizeof(struct pipe_clip_state));
389 r300->clip_state.size = 29;
390 } else {
391 draw_flush(r300->draw);
392 draw_set_clip_state(r300->draw, state);
393 r300->clip_state.size = 2;
394 }
395
396 r300->clip_state.dirty = TRUE;
397 }
398
399 /* Create a new depth, stencil, and alpha state based on the CSO dsa state.
400 *
401 * This contains the depth buffer, stencil buffer, alpha test, and such.
402 * On the Radeon, depth and stencil buffer setup are intertwined, which is
403 * the reason for some of the strange-looking assignments across registers. */
404 static void*
405 r300_create_dsa_state(struct pipe_context* pipe,
406 const struct pipe_depth_stencil_alpha_state* state)
407 {
408 struct r300_capabilities *caps =
409 r300_screen(r300_context(pipe)->context.screen)->caps;
410 struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state);
411
412 /* Depth test setup. */
413 if (state->depth.enabled) {
414 dsa->z_buffer_control |= R300_Z_ENABLE;
415
416 if (state->depth.writemask) {
417 dsa->z_buffer_control |= R300_Z_WRITE_ENABLE;
418 }
419
420 dsa->z_stencil_control |=
421 (r300_translate_depth_stencil_function(state->depth.func) <<
422 R300_Z_FUNC_SHIFT);
423 }
424
425 /* Stencil buffer setup. */
426 if (state->stencil[0].enabled) {
427 dsa->z_buffer_control |= R300_STENCIL_ENABLE;
428 dsa->z_stencil_control |=
429 (r300_translate_depth_stencil_function(state->stencil[0].func) <<
430 R300_S_FRONT_FUNC_SHIFT) |
431 (r300_translate_stencil_op(state->stencil[0].fail_op) <<
432 R300_S_FRONT_SFAIL_OP_SHIFT) |
433 (r300_translate_stencil_op(state->stencil[0].zpass_op) <<
434 R300_S_FRONT_ZPASS_OP_SHIFT) |
435 (r300_translate_stencil_op(state->stencil[0].zfail_op) <<
436 R300_S_FRONT_ZFAIL_OP_SHIFT);
437
438 dsa->stencil_ref_mask =
439 (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) |
440 (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT);
441
442 if (state->stencil[1].enabled) {
443 dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK;
444 dsa->z_stencil_control |=
445 (r300_translate_depth_stencil_function(state->stencil[1].func) <<
446 R300_S_BACK_FUNC_SHIFT) |
447 (r300_translate_stencil_op(state->stencil[1].fail_op) <<
448 R300_S_BACK_SFAIL_OP_SHIFT) |
449 (r300_translate_stencil_op(state->stencil[1].zpass_op) <<
450 R300_S_BACK_ZPASS_OP_SHIFT) |
451 (r300_translate_stencil_op(state->stencil[1].zfail_op) <<
452 R300_S_BACK_ZFAIL_OP_SHIFT);
453
454 if (caps->is_r500)
455 {
456 dsa->z_buffer_control |= R500_STENCIL_REFMASK_FRONT_BACK;
457 dsa->stencil_ref_bf =
458 (state->stencil[1].valuemask <<
459 R300_STENCILMASK_SHIFT) |
460 (state->stencil[1].writemask <<
461 R300_STENCILWRITEMASK_SHIFT);
462 }
463 }
464 }
465
466 /* Alpha test setup. */
467 if (state->alpha.enabled) {
468 dsa->alpha_function =
469 r300_translate_alpha_function(state->alpha.func) |
470 R300_FG_ALPHA_FUNC_ENABLE;
471
472 /* We could use 10bit alpha ref but who needs that? */
473 dsa->alpha_function |= float_to_ubyte(state->alpha.ref_value);
474
475 if (caps->is_r500)
476 dsa->alpha_function |= R500_FG_ALPHA_FUNC_8BIT;
477 }
478
479 return (void*)dsa;
480 }
481
482 /* Bind DSA state. */
483 static void r300_bind_dsa_state(struct pipe_context* pipe,
484 void* state)
485 {
486 struct r300_context* r300 = r300_context(pipe);
487
488 UPDATE_STATE(state, r300->dsa_state);
489 }
490
491 /* Free DSA state. */
492 static void r300_delete_dsa_state(struct pipe_context* pipe,
493 void* state)
494 {
495 FREE(state);
496 }
497
498 static void r300_set_stencil_ref(struct pipe_context* pipe,
499 const struct pipe_stencil_ref* sr)
500 {
501 struct r300_context* r300 = r300_context(pipe);
502 r300->stencil_ref = *sr;
503 r300->dsa_state.dirty = TRUE;
504 }
505
506 /* This switcheroo is needed just because of goddamned MACRO_SWITCH. */
507 static void r300_fb_update_tiling_flags(struct r300_context *r300,
508 const struct pipe_framebuffer_state *old_state,
509 const struct pipe_framebuffer_state *new_state)
510 {
511 struct r300_texture *tex;
512 unsigned i, j, level;
513
514 /* Reset tiling flags for old surfaces to default values. */
515 for (i = 0; i < old_state->nr_cbufs; i++) {
516 for (j = 0; j < new_state->nr_cbufs; j++) {
517 if (old_state->cbufs[i]->texture == new_state->cbufs[j]->texture) {
518 break;
519 }
520 }
521 /* If not binding the surface again... */
522 if (j != new_state->nr_cbufs) {
523 continue;
524 }
525
526 tex = (struct r300_texture*)old_state->cbufs[i]->texture;
527
528 if (tex) {
529 r300->rws->buffer_set_tiling(r300->rws, tex->buffer,
530 tex->pitch[0],
531 tex->microtile != 0,
532 tex->macrotile != 0);
533 }
534 }
535 if (old_state->zsbuf &&
536 (!new_state->zsbuf ||
537 old_state->zsbuf->texture != new_state->zsbuf->texture)) {
538 tex = (struct r300_texture*)old_state->zsbuf->texture;
539
540 if (tex) {
541 r300->rws->buffer_set_tiling(r300->rws, tex->buffer,
542 tex->pitch[0],
543 tex->microtile != 0,
544 tex->macrotile != 0);
545 }
546 }
547
548 /* Set tiling flags for new surfaces. */
549 for (i = 0; i < new_state->nr_cbufs; i++) {
550 tex = (struct r300_texture*)new_state->cbufs[i]->texture;
551 level = new_state->cbufs[i]->level;
552
553 r300->rws->buffer_set_tiling(r300->rws, tex->buffer,
554 tex->pitch[level],
555 tex->microtile != 0,
556 tex->mip_macrotile[level] != 0);
557 }
558 if (new_state->zsbuf) {
559 tex = (struct r300_texture*)new_state->zsbuf->texture;
560 level = new_state->zsbuf->level;
561
562 r300->rws->buffer_set_tiling(r300->rws, tex->buffer,
563 tex->pitch[level],
564 tex->microtile != 0,
565 tex->mip_macrotile[level] != 0);
566 }
567 }
568
569 static void
570 r300_set_framebuffer_state(struct pipe_context* pipe,
571 const struct pipe_framebuffer_state* state)
572 {
573 struct r300_context* r300 = r300_context(pipe);
574 struct r300_screen* r300screen = r300_screen(pipe->screen);
575 struct pipe_framebuffer_state *old_state = r300->fb_state.state;
576 unsigned max_width, max_height;
577 uint32_t zbuffer_bpp = 0;
578
579
580 if (state->nr_cbufs > 4) {
581 debug_printf("r300: Implementation error: Too many MRTs in %s, "
582 "refusing to bind framebuffer state!\n", __FUNCTION__);
583 return;
584 }
585
586 if (r300screen->caps->is_r500) {
587 max_width = max_height = 4096;
588 } else if (r300screen->caps->is_r400) {
589 max_width = max_height = 4021;
590 } else {
591 max_width = max_height = 2560;
592 }
593
594 if (state->width > max_width || state->height > max_height) {
595 debug_printf("r300: Implementation error: Render targets are too "
596 "big in %s, refusing to bind framebuffer state!\n", __FUNCTION__);
597 return;
598 }
599
600 if (r300->draw) {
601 draw_flush(r300->draw);
602 }
603
604 r300->fb_state.dirty = TRUE;
605
606 /* If nr_cbufs is changed from zero to non-zero or vice versa... */
607 if (!!old_state->nr_cbufs != !!state->nr_cbufs) {
608 r300->blend_state.dirty = TRUE;
609 }
610 /* If zsbuf is set from NULL to non-NULL or vice versa.. */
611 if (!!old_state->zsbuf != !!state->zsbuf) {
612 r300->dsa_state.dirty = TRUE;
613 }
614 if (!r300->scissor_enabled) {
615 r300->scissor_state.dirty = TRUE;
616 }
617
618 r300_fb_update_tiling_flags(r300, r300->fb_state.state, state);
619
620 memcpy(r300->fb_state.state, state, sizeof(struct pipe_framebuffer_state));
621
622 r300->fb_state.size = (10 * state->nr_cbufs) + (2 * (4 - state->nr_cbufs)) +
623 (state->zsbuf ? 10 : 0) + 8;
624
625 /* Polygon offset depends on the zbuffer bit depth. */
626 if (state->zsbuf && r300->polygon_offset_enabled) {
627 switch (util_format_get_blocksize(state->zsbuf->texture->format)) {
628 case 2:
629 zbuffer_bpp = 16;
630 break;
631 case 4:
632 zbuffer_bpp = 24;
633 break;
634 }
635
636 if (r300->zbuffer_bpp != zbuffer_bpp) {
637 r300->zbuffer_bpp = zbuffer_bpp;
638 r300->rs_state.dirty = TRUE;
639 }
640 }
641 }
642
643 /* Create fragment shader state. */
644 static void* r300_create_fs_state(struct pipe_context* pipe,
645 const struct pipe_shader_state* shader)
646 {
647 struct r300_fragment_shader* fs = NULL;
648
649 fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader);
650
651 /* Copy state directly into shader. */
652 fs->state = *shader;
653 fs->state.tokens = tgsi_dup_tokens(shader->tokens);
654
655 tgsi_scan_shader(shader->tokens, &fs->info);
656 r300_shader_read_fs_inputs(&fs->info, &fs->inputs);
657
658 return (void*)fs;
659 }
660
661 /* Bind fragment shader state. */
662 static void r300_bind_fs_state(struct pipe_context* pipe, void* shader)
663 {
664 struct r300_context* r300 = r300_context(pipe);
665 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
666
667 if (fs == NULL) {
668 r300->fs = NULL;
669 return;
670 }
671
672 r300->fs = fs;
673 r300_pick_fragment_shader(r300);
674
675 r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */
676
677 if (r300->vs_state.state && r300_vertex_shader_setup_wpos(r300)) {
678 r300->vap_output_state.dirty = TRUE;
679 }
680
681 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER | R300_NEW_FRAGMENT_SHADER_CONSTANTS;
682 }
683
684 /* Delete fragment shader state. */
685 static void r300_delete_fs_state(struct pipe_context* pipe, void* shader)
686 {
687 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
688 struct r300_fragment_shader_code *tmp, *ptr = fs->first;
689
690 while (ptr) {
691 tmp = ptr;
692 ptr = ptr->next;
693 rc_constants_destroy(&tmp->code.constants);
694 FREE(tmp);
695 }
696 FREE((void*)fs->state.tokens);
697 FREE(shader);
698 }
699
700 static void r300_set_polygon_stipple(struct pipe_context* pipe,
701 const struct pipe_poly_stipple* state)
702 {
703 /* XXX no idea how to set this up, but not terribly important */
704 }
705
706 /* Create a new rasterizer state based on the CSO rasterizer state.
707 *
708 * This is a very large chunk of state, and covers most of the graphics
709 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks.
710 *
711 * In a not entirely unironic sidenote, this state has nearly nothing to do
712 * with the actual block on the Radeon called the rasterizer (RS). */
713 static void* r300_create_rs_state(struct pipe_context* pipe,
714 const struct pipe_rasterizer_state* state)
715 {
716 struct r300_screen* r300screen = r300_screen(pipe->screen);
717 struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state);
718 unsigned coord_index;
719
720 /* Copy rasterizer state for Draw. */
721 rs->rs = *state;
722
723 #ifdef PIPE_ARCH_LITTLE_ENDIAN
724 rs->vap_control_status = R300_VC_NO_SWAP;
725 #else
726 rs->vap_control_status = R300_VC_32BIT_SWAP;
727 #endif
728
729 /* If no TCL engine is present, turn off the HW TCL. */
730 if (!r300screen->caps->has_tcl) {
731 rs->vap_control_status |= R300_VAP_TCL_BYPASS;
732 }
733
734 rs->point_size = pack_float_16_6x(state->point_size) |
735 (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT);
736
737 rs->line_control = pack_float_16_6x(state->line_width) |
738 R300_GA_LINE_CNTL_END_TYPE_COMP;
739
740 /* Enable polygon mode */
741 if (state->fill_cw != PIPE_POLYGON_MODE_FILL ||
742 state->fill_ccw != PIPE_POLYGON_MODE_FILL) {
743 rs->polygon_mode = R300_GA_POLY_MODE_DUAL;
744 }
745
746 /* Radeons don't think in "CW/CCW", they think in "front/back". */
747 if (state->front_winding == PIPE_WINDING_CW) {
748 rs->cull_mode = R300_FRONT_FACE_CW;
749
750 /* Polygon offset */
751 if (state->offset_cw) {
752 rs->polygon_offset_enable |= R300_FRONT_ENABLE;
753 }
754 if (state->offset_ccw) {
755 rs->polygon_offset_enable |= R300_BACK_ENABLE;
756 }
757
758 /* Polygon mode */
759 if (rs->polygon_mode) {
760 rs->polygon_mode |=
761 r300_translate_polygon_mode_front(state->fill_cw);
762 rs->polygon_mode |=
763 r300_translate_polygon_mode_back(state->fill_ccw);
764 }
765 } else {
766 rs->cull_mode = R300_FRONT_FACE_CCW;
767
768 /* Polygon offset */
769 if (state->offset_ccw) {
770 rs->polygon_offset_enable |= R300_FRONT_ENABLE;
771 }
772 if (state->offset_cw) {
773 rs->polygon_offset_enable |= R300_BACK_ENABLE;
774 }
775
776 /* Polygon mode */
777 if (rs->polygon_mode) {
778 rs->polygon_mode |=
779 r300_translate_polygon_mode_front(state->fill_ccw);
780 rs->polygon_mode |=
781 r300_translate_polygon_mode_back(state->fill_cw);
782 }
783 }
784 if (state->front_winding & state->cull_mode) {
785 rs->cull_mode |= R300_CULL_FRONT;
786 }
787 if (~(state->front_winding) & state->cull_mode) {
788 rs->cull_mode |= R300_CULL_BACK;
789 }
790
791 if (rs->polygon_offset_enable) {
792 rs->depth_offset = state->offset_units;
793 rs->depth_scale = state->offset_scale;
794 }
795
796 if (state->line_stipple_enable) {
797 rs->line_stipple_config =
798 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE |
799 (fui((float)state->line_stipple_factor) &
800 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK);
801 /* XXX this might need to be scaled up */
802 rs->line_stipple_value = state->line_stipple_pattern;
803 }
804
805 if (state->flatshade) {
806 rs->color_control = R300_SHADE_MODEL_FLAT;
807 } else {
808 rs->color_control = R300_SHADE_MODEL_SMOOTH;
809 }
810
811 /* Point sprites */
812 if (state->sprite_coord_enable) {
813 coord_index = ffs(state->sprite_coord_enable)-1;
814
815 SCREEN_DBG(r300screen, DBG_DRAW,
816 "r300: point sprite: shader coord=%d\n", coord_index);
817
818 rs->stuffing_enable =
819 R300_GB_POINT_STUFF_ENABLE |
820 R300_GB_TEX_ST << (R300_GB_TEX0_SOURCE_SHIFT + (coord_index*2));
821
822 rs->point_texcoord_left = 0.0f;
823 rs->point_texcoord_right = 1.0f;
824
825 switch (state->sprite_coord_mode) {
826 case PIPE_SPRITE_COORD_UPPER_LEFT:
827 rs->point_texcoord_top = 0.0f;
828 rs->point_texcoord_bottom = 1.0f;
829 break;
830 case PIPE_SPRITE_COORD_LOWER_LEFT:
831 rs->point_texcoord_top = 1.0f;
832 rs->point_texcoord_bottom = 0.0f;
833 break;
834 }
835 }
836
837 return (void*)rs;
838 }
839
840 /* Bind rasterizer state. */
841 static void r300_bind_rs_state(struct pipe_context* pipe, void* state)
842 {
843 struct r300_context* r300 = r300_context(pipe);
844 struct r300_rs_state* rs = (struct r300_rs_state*)state;
845 boolean scissor_was_enabled = r300->scissor_enabled;
846 int last_sprite_coord_index = r300->sprite_coord_index;
847
848 if (r300->draw) {
849 draw_flush(r300->draw);
850 draw_set_rasterizer_state(r300->draw, &rs->rs);
851 }
852
853 if (rs) {
854 r300->polygon_offset_enabled = rs->rs.offset_cw || rs->rs.offset_ccw;
855 r300->scissor_enabled = rs->rs.scissor;
856 r300->sprite_coord_index = ffs(rs->rs.sprite_coord_enable)-1;
857 } else {
858 r300->polygon_offset_enabled = FALSE;
859 r300->scissor_enabled = FALSE;
860 r300->sprite_coord_index = -1;
861 }
862
863 UPDATE_STATE(state, r300->rs_state);
864 r300->rs_state.size = 24 + (r300->polygon_offset_enabled ? 5 : 0);
865
866 if (scissor_was_enabled != r300->scissor_enabled) {
867 r300->scissor_state.dirty = TRUE;
868 }
869 if (last_sprite_coord_index != r300->sprite_coord_index) {
870 r300->rs_block_state.dirty = TRUE;
871 }
872 }
873
874 /* Free rasterizer state. */
875 static void r300_delete_rs_state(struct pipe_context* pipe, void* state)
876 {
877 FREE(state);
878 }
879
880 static void*
881 r300_create_sampler_state(struct pipe_context* pipe,
882 const struct pipe_sampler_state* state)
883 {
884 struct r300_context* r300 = r300_context(pipe);
885 struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state);
886 boolean is_r500 = r300_screen(pipe->screen)->caps->is_r500;
887 int lod_bias;
888 union util_color uc;
889
890 sampler->state = *state;
891
892 sampler->filter0 |=
893 (r300_translate_wrap(state->wrap_s) << R300_TX_WRAP_S_SHIFT) |
894 (r300_translate_wrap(state->wrap_t) << R300_TX_WRAP_T_SHIFT) |
895 (r300_translate_wrap(state->wrap_r) << R300_TX_WRAP_R_SHIFT);
896
897 sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter,
898 state->mag_img_filter,
899 state->min_mip_filter,
900 state->max_anisotropy > 0);
901
902 sampler->filter0 |= r300_anisotropy(state->max_anisotropy);
903
904 /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */
905 /* We must pass these to the merge function to clamp them properly. */
906 sampler->min_lod = MAX2((unsigned)state->min_lod, 0);
907 sampler->max_lod = MAX2((unsigned)ceilf(state->max_lod), 0);
908
909 lod_bias = CLAMP((int)(state->lod_bias * 32), -(1 << 9), (1 << 9) - 1);
910
911 sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT;
912
913 /* This is very high quality anisotropic filtering for R5xx.
914 * It's good for benchmarking the performance of texturing but
915 * in practice we don't want to slow down the driver because it's
916 * a pretty good performance killer. Feel free to play with it. */
917 if (DBG_ON(r300, DBG_ANISOHQ) && is_r500) {
918 sampler->filter1 |= r500_anisotropy(state->max_anisotropy);
919 }
920
921 util_pack_color(state->border_color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc);
922 sampler->border_color = uc.ui;
923
924 /* R500-specific fixups and optimizations */
925 if (r300_screen(r300->context.screen)->caps->is_r500) {
926 sampler->filter1 |= R500_BORDER_FIX;
927 }
928
929 return (void*)sampler;
930 }
931
932 static void r300_bind_sampler_states(struct pipe_context* pipe,
933 unsigned count,
934 void** states)
935 {
936 struct r300_context* r300 = r300_context(pipe);
937 struct r300_textures_state* state =
938 (struct r300_textures_state*)r300->textures_state.state;
939
940 if (count > 8) {
941 return;
942 }
943
944 memcpy(state->sampler_states, states, sizeof(void*) * count);
945 state->sampler_count = count;
946
947 r300->textures_state.dirty = TRUE;
948
949 /* Pick a fragment shader based on the texture compare state. */
950 if (r300->fs && count) {
951 if (r300_pick_fragment_shader(r300)) {
952 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER |
953 R300_NEW_FRAGMENT_SHADER_CONSTANTS;
954 }
955 }
956 }
957
958 static void r300_lacks_vertex_textures(struct pipe_context* pipe,
959 unsigned count,
960 void** states)
961 {
962 }
963
964 static void r300_delete_sampler_state(struct pipe_context* pipe, void* state)
965 {
966 FREE(state);
967 }
968
969 static void r300_set_fragment_sampler_views(struct pipe_context* pipe,
970 unsigned count,
971 struct pipe_sampler_view** views)
972 {
973 struct r300_context* r300 = r300_context(pipe);
974 struct r300_textures_state* state =
975 (struct r300_textures_state*)r300->textures_state.state;
976 struct r300_texture *texture;
977 unsigned i;
978 boolean is_r500 = r300_screen(r300->context.screen)->caps->is_r500;
979 boolean dirty_tex = FALSE;
980
981 /* XXX magic num */
982 if (count > 8) {
983 return;
984 }
985
986 for (i = 0; i < count; i++) {
987 if (state->fragment_sampler_views[i] != views[i]) {
988 pipe_sampler_view_reference(&state->fragment_sampler_views[i],
989 views[i]);
990
991 if (!views[i]) {
992 continue;
993 }
994
995 /* A new sampler view (= texture)... */
996 dirty_tex = TRUE;
997
998 /* R300-specific - set the texrect factor in the fragment shader */
999 texture = (struct r300_texture *)views[i]->texture;
1000 if (!is_r500 && texture->is_npot) {
1001 /* XXX It would be nice to re-emit just 1 constant,
1002 * XXX not all of them */
1003 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS;
1004 }
1005 }
1006 }
1007
1008 for (i = count; i < 8; i++) {
1009 if (state->fragment_sampler_views[i]) {
1010 pipe_sampler_view_reference(&state->fragment_sampler_views[i],
1011 NULL);
1012 }
1013 }
1014
1015 state->texture_count = count;
1016
1017 r300->textures_state.dirty = TRUE;
1018
1019 if (dirty_tex) {
1020 r300->texture_cache_inval.dirty = TRUE;
1021 }
1022 }
1023
1024 static struct pipe_sampler_view *
1025 r300_create_sampler_view(struct pipe_context *pipe,
1026 struct pipe_texture *texture,
1027 const struct pipe_sampler_view *templ)
1028 {
1029 struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view);
1030
1031 if (view) {
1032 *view = *templ;
1033 view->reference.count = 1;
1034 view->texture = NULL;
1035 pipe_texture_reference(&view->texture, texture);
1036 view->context = pipe;
1037 }
1038
1039 return view;
1040 }
1041
1042 static void
1043 r300_sampler_view_destroy(struct pipe_context *pipe,
1044 struct pipe_sampler_view *view)
1045 {
1046 pipe_texture_reference(&view->texture, NULL);
1047 FREE(view);
1048 }
1049
1050 static void r300_set_scissor_state(struct pipe_context* pipe,
1051 const struct pipe_scissor_state* state)
1052 {
1053 struct r300_context* r300 = r300_context(pipe);
1054
1055 memcpy(r300->scissor_state.state, state,
1056 sizeof(struct pipe_scissor_state));
1057
1058 if (r300->scissor_enabled) {
1059 r300->scissor_state.dirty = TRUE;
1060 }
1061 }
1062
1063 static void r300_set_viewport_state(struct pipe_context* pipe,
1064 const struct pipe_viewport_state* state)
1065 {
1066 struct r300_context* r300 = r300_context(pipe);
1067 struct r300_viewport_state* viewport =
1068 (struct r300_viewport_state*)r300->viewport_state.state;
1069
1070 r300->viewport = *state;
1071
1072 /* Do the transform in HW. */
1073 viewport->vte_control = R300_VTX_W0_FMT;
1074
1075 if (state->scale[0] != 1.0f) {
1076 viewport->xscale = state->scale[0];
1077 viewport->vte_control |= R300_VPORT_X_SCALE_ENA;
1078 }
1079 if (state->scale[1] != 1.0f) {
1080 viewport->yscale = state->scale[1];
1081 viewport->vte_control |= R300_VPORT_Y_SCALE_ENA;
1082 }
1083 if (state->scale[2] != 1.0f) {
1084 viewport->zscale = state->scale[2];
1085 viewport->vte_control |= R300_VPORT_Z_SCALE_ENA;
1086 }
1087 if (state->translate[0] != 0.0f) {
1088 viewport->xoffset = state->translate[0];
1089 viewport->vte_control |= R300_VPORT_X_OFFSET_ENA;
1090 }
1091 if (state->translate[1] != 0.0f) {
1092 viewport->yoffset = state->translate[1];
1093 viewport->vte_control |= R300_VPORT_Y_OFFSET_ENA;
1094 }
1095 if (state->translate[2] != 0.0f) {
1096 viewport->zoffset = state->translate[2];
1097 viewport->vte_control |= R300_VPORT_Z_OFFSET_ENA;
1098 }
1099
1100 r300->viewport_state.dirty = TRUE;
1101 if (r300->fs && r300->fs->inputs.wpos != ATTR_UNUSED) {
1102 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS;
1103 }
1104 }
1105
1106 static void r300_set_vertex_buffers(struct pipe_context* pipe,
1107 unsigned count,
1108 const struct pipe_vertex_buffer* buffers)
1109 {
1110 struct r300_context* r300 = r300_context(pipe);
1111 struct pipe_vertex_buffer *vbo;
1112 unsigned i, max_index = (1 << 24) - 1;
1113 boolean any_user_buffer = FALSE;
1114
1115 if (count == r300->vertex_buffer_count &&
1116 memcmp(r300->vertex_buffer, buffers,
1117 sizeof(struct pipe_vertex_buffer) * count) == 0) {
1118 return;
1119 }
1120
1121 /* Check if the stride is aligned to the size of DWORD. */
1122 for (i = 0; i < count; i++) {
1123 if (buffers[i].buffer) {
1124 if (buffers[i].stride % 4 != 0) {
1125 // XXX Shouldn't we align the buffer?
1126 fprintf(stderr, "r300_set_vertex_buffers: "
1127 "Unaligned buffer stride %i isn't supported.\n",
1128 buffers[i].stride);
1129 assert(0);
1130 abort();
1131 }
1132 }
1133 }
1134
1135 for (i = 0; i < count; i++) {
1136 /* Why, yes, I AM casting away constness. How did you know? */
1137 vbo = (struct pipe_vertex_buffer*)&buffers[i];
1138
1139 /* Reference our buffer. */
1140 pipe_buffer_reference(&r300->vertex_buffer[i].buffer, vbo->buffer);
1141
1142 /* Skip NULL buffers */
1143 if (!buffers[i].buffer) {
1144 continue;
1145 }
1146
1147 if (r300_buffer_is_user_buffer(vbo->buffer)) {
1148 any_user_buffer = TRUE;
1149 }
1150
1151 if (vbo->max_index == ~0) {
1152 /* Bogus value from broken state tracker; hax it. */
1153 vbo->max_index =
1154 (vbo->buffer->size - vbo->buffer_offset) / vbo->stride;
1155 }
1156
1157 max_index = MIN2(vbo->max_index, max_index);
1158 }
1159
1160 for (; i < r300->vertex_buffer_count; i++) {
1161 /* Dereference any old buffers. */
1162 pipe_buffer_reference(&r300->vertex_buffer[i].buffer, NULL);
1163 }
1164
1165 memcpy(r300->vertex_buffer, buffers,
1166 sizeof(struct pipe_vertex_buffer) * count);
1167
1168 r300->vertex_buffer_count = count;
1169 r300->vertex_buffer_max_index = max_index;
1170 r300->any_user_vbs = any_user_buffer;
1171
1172 if (r300->draw) {
1173 draw_flush(r300->draw);
1174 draw_set_vertex_buffers(r300->draw, count, buffers);
1175 }
1176 }
1177
1178 static void r300_draw_emit_attrib(struct r300_context* r300,
1179 enum attrib_emit emit,
1180 enum interp_mode interp,
1181 int index)
1182 {
1183 struct r300_vertex_shader* vs = r300->vs_state.state;
1184 struct tgsi_shader_info* info = &vs->info;
1185 int output;
1186
1187 output = draw_find_shader_output(r300->draw,
1188 info->output_semantic_name[index],
1189 info->output_semantic_index[index]);
1190 draw_emit_vertex_attr(&r300->vertex_info, emit, interp, output);
1191 }
1192
1193 static void r300_draw_emit_all_attribs(struct r300_context* r300)
1194 {
1195 struct r300_vertex_shader* vs = r300->vs_state.state;
1196 struct r300_shader_semantics* vs_outputs = &vs->outputs;
1197 int i, gen_count;
1198
1199 /* Position. */
1200 if (vs_outputs->pos != ATTR_UNUSED) {
1201 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE,
1202 vs_outputs->pos);
1203 } else {
1204 assert(0);
1205 }
1206
1207 /* Point size. */
1208 if (vs_outputs->psize != ATTR_UNUSED) {
1209 r300_draw_emit_attrib(r300, EMIT_1F_PSIZE, INTERP_POS,
1210 vs_outputs->psize);
1211 }
1212
1213 /* Colors. */
1214 for (i = 0; i < ATTR_COLOR_COUNT; i++) {
1215 if (vs_outputs->color[i] != ATTR_UNUSED) {
1216 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_LINEAR,
1217 vs_outputs->color[i]);
1218 }
1219 }
1220
1221 /* XXX Back-face colors. */
1222
1223 /* Texture coordinates. */
1224 gen_count = 0;
1225 for (i = 0; i < ATTR_GENERIC_COUNT; i++) {
1226 if (vs_outputs->generic[i] != ATTR_UNUSED) {
1227 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE,
1228 vs_outputs->generic[i]);
1229 gen_count++;
1230 }
1231 }
1232
1233 /* Fog coordinates. */
1234 if (vs_outputs->fog != ATTR_UNUSED) {
1235 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE,
1236 vs_outputs->fog);
1237 gen_count++;
1238 }
1239
1240 /* XXX magic */
1241 assert(gen_count <= 8);
1242 }
1243
1244 /* Update the PSC tables. */
1245 static void r300_vertex_psc(struct r300_vertex_element_state *velems)
1246 {
1247 struct r300_vertex_stream_state *vstream = &velems->vertex_stream;
1248 uint16_t type, swizzle;
1249 enum pipe_format format;
1250 unsigned i;
1251
1252 assert(velems->count <= 16);
1253
1254 /* Vertex shaders have no semantics on their inputs,
1255 * so PSC should just route stuff based on the vertex elements,
1256 * and not on attrib information. */
1257 for (i = 0; i < velems->count; i++) {
1258 format = velems->velem[i].src_format;
1259
1260 type = r300_translate_vertex_data_type(format) |
1261 (i << R300_DST_VEC_LOC_SHIFT);
1262 swizzle = r300_translate_vertex_data_swizzle(format);
1263
1264 if (i & 1) {
1265 vstream->vap_prog_stream_cntl[i >> 1] |= type << 16;
1266 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16;
1267 } else {
1268 vstream->vap_prog_stream_cntl[i >> 1] |= type;
1269 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle;
1270 }
1271 }
1272
1273 /* Set the last vector in the PSC. */
1274 if (i) {
1275 i -= 1;
1276 }
1277 vstream->vap_prog_stream_cntl[i >> 1] |=
1278 (R300_LAST_VEC << (i & 1 ? 16 : 0));
1279
1280 vstream->count = (i >> 1) + 1;
1281 }
1282
1283 /* Update the PSC tables for SW TCL, using Draw. */
1284 static void r300_swtcl_vertex_psc(struct r300_context *r300,
1285 struct r300_vertex_element_state *velems)
1286 {
1287 struct r300_vertex_stream_state *vstream = &velems->vertex_stream;
1288 struct r300_vertex_shader* vs = r300->vs_state.state;
1289 struct vertex_info* vinfo = &r300->vertex_info;
1290 uint16_t type, swizzle;
1291 enum pipe_format format;
1292 unsigned i, attrib_count;
1293 int* vs_output_tab = vs->stream_loc_notcl;
1294
1295 /* For each Draw attribute, route it to the fragment shader according
1296 * to the vs_output_tab. */
1297 attrib_count = vinfo->num_attribs;
1298 DBG(r300, DBG_DRAW, "r300: attrib count: %d\n", attrib_count);
1299 for (i = 0; i < attrib_count; i++) {
1300 DBG(r300, DBG_DRAW, "r300: attrib: offset %d, interp %d, size %d,"
1301 " vs_output_tab %d\n", vinfo->attrib[i].src_index,
1302 vinfo->attrib[i].interp_mode, vinfo->attrib[i].emit,
1303 vs_output_tab[i]);
1304 }
1305
1306 for (i = 0; i < attrib_count; i++) {
1307 /* Make sure we have a proper destination for our attribute. */
1308 assert(vs_output_tab[i] != -1);
1309
1310 format = draw_translate_vinfo_format(vinfo->attrib[i].emit);
1311
1312 /* Obtain the type of data in this attribute. */
1313 type = r300_translate_vertex_data_type(format) |
1314 vs_output_tab[i] << R300_DST_VEC_LOC_SHIFT;
1315
1316 /* Obtain the swizzle for this attribute. Note that the default
1317 * swizzle in the hardware is not XYZW! */
1318 swizzle = r300_translate_vertex_data_swizzle(format);
1319
1320 /* Add the attribute to the PSC table. */
1321 if (i & 1) {
1322 vstream->vap_prog_stream_cntl[i >> 1] |= type << 16;
1323 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16;
1324 } else {
1325 vstream->vap_prog_stream_cntl[i >> 1] |= type;
1326 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle;
1327 }
1328 }
1329
1330 /* Set the last vector in the PSC. */
1331 if (i) {
1332 i -= 1;
1333 }
1334 vstream->vap_prog_stream_cntl[i >> 1] |=
1335 (R300_LAST_VEC << (i & 1 ? 16 : 0));
1336
1337 vstream->count = (i >> 1) + 1;
1338 }
1339
1340 static void* r300_create_vertex_elements_state(struct pipe_context* pipe,
1341 unsigned count,
1342 const struct pipe_vertex_element* attribs)
1343 {
1344 struct r300_context *r300 = r300_context(pipe);
1345 struct r300_screen* r300screen = r300_screen(pipe->screen);
1346 struct r300_vertex_element_state *velems;
1347 unsigned i, size;
1348
1349 assert(count <= PIPE_MAX_ATTRIBS);
1350 velems = CALLOC_STRUCT(r300_vertex_element_state);
1351 if (velems != NULL) {
1352 velems->count = count;
1353 memcpy(velems->velem, attribs, sizeof(struct pipe_vertex_element) * count);
1354
1355 if (r300screen->caps->has_tcl) {
1356 /* Check if the format is aligned to the size of DWORD. */
1357 for (i = 0; i < count; i++) {
1358 size = util_format_get_blocksize(attribs[i].src_format);
1359
1360 if (size % 4 != 0) {
1361 /* XXX Shouldn't we align the format? */
1362 fprintf(stderr, "r300_create_vertex_elements_state: "
1363 "Unaligned format %s:%i isn't supported\n",
1364 util_format_name(attribs[i].src_format), size);
1365 assert(0);
1366 abort();
1367 }
1368 }
1369
1370 r300_vertex_psc(velems);
1371 } else {
1372 memset(&r300->vertex_info, 0, sizeof(struct vertex_info));
1373 r300_draw_emit_all_attribs(r300);
1374 draw_compute_vertex_size(&r300->vertex_info);
1375 r300_swtcl_vertex_psc(r300, velems);
1376 }
1377 }
1378 return velems;
1379 }
1380
1381 static void r300_bind_vertex_elements_state(struct pipe_context *pipe,
1382 void *state)
1383 {
1384 struct r300_context *r300 = r300_context(pipe);
1385 struct r300_vertex_element_state *velems = state;
1386
1387 if (velems == NULL) {
1388 return;
1389 }
1390
1391 r300->velems = velems;
1392
1393 if (r300->draw) {
1394 draw_flush(r300->draw);
1395 draw_set_vertex_elements(r300->draw, velems->count, velems->velem);
1396 }
1397
1398 UPDATE_STATE(&velems->vertex_stream, r300->vertex_stream_state);
1399 r300->vertex_stream_state.size = (1 + velems->vertex_stream.count) * 2;
1400 }
1401
1402 static void r300_delete_vertex_elements_state(struct pipe_context *pipe, void *state)
1403 {
1404 FREE(state);
1405 }
1406
1407 static void* r300_create_vs_state(struct pipe_context* pipe,
1408 const struct pipe_shader_state* shader)
1409 {
1410 struct r300_context* r300 = r300_context(pipe);
1411
1412 struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader);
1413 r300_vertex_shader_common_init(vs, shader);
1414
1415 if (r300_screen(pipe->screen)->caps->has_tcl) {
1416 r300_translate_vertex_shader(r300, vs);
1417 } else {
1418 vs->draw_vs = draw_create_vertex_shader(r300->draw, shader);
1419 }
1420
1421 return vs;
1422 }
1423
1424 static void r300_bind_vs_state(struct pipe_context* pipe, void* shader)
1425 {
1426 struct r300_context* r300 = r300_context(pipe);
1427 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
1428
1429 if (vs == NULL) {
1430 r300->vs_state.state = NULL;
1431 return;
1432 }
1433 if (vs == r300->vs_state.state) {
1434 return;
1435 }
1436 r300->vs_state.state = vs;
1437
1438 // VS output mapping for HWTCL or stream mapping for SWTCL to the RS block
1439 if (r300->fs) {
1440 r300_vertex_shader_setup_wpos(r300);
1441 }
1442 memcpy(r300->vap_output_state.state, &vs->vap_out,
1443 sizeof(struct r300_vap_output_state));
1444 r300->vap_output_state.dirty = TRUE;
1445
1446 /* The majority of the RS block bits is dependent on the vertex shader. */
1447 r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */
1448
1449 if (r300_screen(pipe->screen)->caps->has_tcl) {
1450 r300->vs_state.dirty = TRUE;
1451 r300->vs_state.size = vs->code.length + 9;
1452
1453 r300->pvs_flush.dirty = TRUE;
1454
1455 r300->dirty_state |= R300_NEW_VERTEX_SHADER_CONSTANTS;
1456 } else {
1457 draw_flush(r300->draw);
1458 draw_bind_vertex_shader(r300->draw,
1459 (struct draw_vertex_shader*)vs->draw_vs);
1460 }
1461 }
1462
1463 static void r300_delete_vs_state(struct pipe_context* pipe, void* shader)
1464 {
1465 struct r300_context* r300 = r300_context(pipe);
1466 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
1467
1468 if (r300_screen(pipe->screen)->caps->has_tcl) {
1469 rc_constants_destroy(&vs->code.constants);
1470 } else {
1471 draw_delete_vertex_shader(r300->draw,
1472 (struct draw_vertex_shader*)vs->draw_vs);
1473 }
1474
1475 FREE((void*)vs->state.tokens);
1476 FREE(shader);
1477 }
1478
1479 static void r300_set_constant_buffer(struct pipe_context *pipe,
1480 uint shader, uint index,
1481 struct pipe_buffer *buf)
1482 {
1483 struct r300_context* r300 = r300_context(pipe);
1484 struct r300_screen *r300screen = r300_screen(pipe->screen);
1485 void *mapped;
1486 int max_size = 0;
1487
1488 if (buf == NULL || buf->size == 0 ||
1489 (mapped = pipe_buffer_map(pipe->screen, buf, PIPE_BUFFER_USAGE_CPU_READ)) == NULL)
1490 {
1491 r300->shader_constants[shader].count = 0;
1492 return;
1493 }
1494
1495 assert((buf->size % 4 * sizeof(float)) == 0);
1496
1497 /* Check the size of the constant buffer. */
1498 switch (shader) {
1499 case PIPE_SHADER_VERTEX:
1500 max_size = 256;
1501 break;
1502 case PIPE_SHADER_FRAGMENT:
1503 if (r300screen->caps->is_r500) {
1504 max_size = 256;
1505 /* XXX Implement emission of r400's extended constant buffer. */
1506 /*} else if (r300screen->caps->is_r400) {
1507 max_size = 64;*/
1508 } else {
1509 max_size = 32;
1510 }
1511 break;
1512 default:
1513 assert(0);
1514 }
1515
1516 /* XXX Subtract immediates and RC_STATE_* variables. */
1517 if (buf->size > (sizeof(float) * 4 * max_size)) {
1518 debug_printf("r300: Max size of the constant buffer is "
1519 "%i*4 floats.\n", max_size);
1520 abort();
1521 }
1522
1523 memcpy(r300->shader_constants[shader].constants, mapped, buf->size);
1524 r300->shader_constants[shader].count = buf->size / (4 * sizeof(float));
1525 pipe_buffer_unmap(pipe->screen, buf);
1526
1527 if (shader == PIPE_SHADER_VERTEX) {
1528 if (r300screen->caps->has_tcl) {
1529 r300->dirty_state |= R300_NEW_VERTEX_SHADER_CONSTANTS;
1530 r300->pvs_flush.dirty = TRUE;
1531 }
1532 }
1533 else if (shader == PIPE_SHADER_FRAGMENT)
1534 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS;
1535 }
1536
1537 void r300_init_state_functions(struct r300_context* r300)
1538 {
1539 r300->context.create_blend_state = r300_create_blend_state;
1540 r300->context.bind_blend_state = r300_bind_blend_state;
1541 r300->context.delete_blend_state = r300_delete_blend_state;
1542
1543 r300->context.set_blend_color = r300_set_blend_color;
1544
1545 r300->context.set_clip_state = r300_set_clip_state;
1546
1547 r300->context.set_constant_buffer = r300_set_constant_buffer;
1548
1549 r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state;
1550 r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state;
1551 r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state;
1552
1553 r300->context.set_stencil_ref = r300_set_stencil_ref;
1554
1555 r300->context.set_framebuffer_state = r300_set_framebuffer_state;
1556
1557 r300->context.create_fs_state = r300_create_fs_state;
1558 r300->context.bind_fs_state = r300_bind_fs_state;
1559 r300->context.delete_fs_state = r300_delete_fs_state;
1560
1561 r300->context.set_polygon_stipple = r300_set_polygon_stipple;
1562
1563 r300->context.create_rasterizer_state = r300_create_rs_state;
1564 r300->context.bind_rasterizer_state = r300_bind_rs_state;
1565 r300->context.delete_rasterizer_state = r300_delete_rs_state;
1566
1567 r300->context.create_sampler_state = r300_create_sampler_state;
1568 r300->context.bind_fragment_sampler_states = r300_bind_sampler_states;
1569 r300->context.bind_vertex_sampler_states = r300_lacks_vertex_textures;
1570 r300->context.delete_sampler_state = r300_delete_sampler_state;
1571
1572 r300->context.set_fragment_sampler_views = r300_set_fragment_sampler_views;
1573 r300->context.create_sampler_view = r300_create_sampler_view;
1574 r300->context.sampler_view_destroy = r300_sampler_view_destroy;
1575
1576 r300->context.set_scissor_state = r300_set_scissor_state;
1577
1578 r300->context.set_viewport_state = r300_set_viewport_state;
1579
1580 r300->context.set_vertex_buffers = r300_set_vertex_buffers;
1581
1582 r300->context.create_vertex_elements_state = r300_create_vertex_elements_state;
1583 r300->context.bind_vertex_elements_state = r300_bind_vertex_elements_state;
1584 r300->context.delete_vertex_elements_state = r300_delete_vertex_elements_state;
1585
1586 r300->context.create_vs_state = r300_create_vs_state;
1587 r300->context.bind_vs_state = r300_bind_vs_state;
1588 r300->context.delete_vs_state = r300_delete_vs_state;
1589 }