src/gallium/drivers/r300/r300_state_derived.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2009 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 #include "draw/draw_context.h"
  25
  26 #include "util/u_math.h"
  27 #include "util/u_memory.h"
  28
  29 #include "r300_context.h"
  30 #include "r300_fs.h"
  31 #include "r300_screen.h"
  32 #include "r300_shader_semantics.h"
  33 #include "r300_state_derived.h"
  34 #include "r300_state_inlines.h"
  35 #include "r300_vs.h"
  36
  37 /* r300_state_derived: Various bits of state which are dependent upon
  38  * currently bound CSO data. */
  39
  40 static void r300_draw_emit_attrib(struct r300_context* r300,
  41                                   enum attrib_emit emit,
  42                                   enum interp_mode interp,
  43                                   int index)
  44 {
  45     struct r300_vertex_shader* vs = r300->vs_state.state;
  46     struct tgsi_shader_info* info = &vs->info;
  47     int output;
  48
  49     output = draw_find_shader_output(r300->draw,
  50                                      info->output_semantic_name[index],
  51                                      info->output_semantic_index[index]);
  52     draw_emit_vertex_attr(&r300->vertex_info, emit, interp, output);
  53 }
  54
  55 static void r300_draw_emit_all_attribs(struct r300_context* r300)
  56 {
  57     struct r300_vertex_shader* vs = r300->vs_state.state;
  58     struct r300_shader_semantics* vs_outputs = &vs->outputs;
  59     int i, gen_count;
  60
  61     /* Position. */
  62     if (vs_outputs->pos != ATTR_UNUSED) {
  63         r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE,
  64                               vs_outputs->pos);
  65     } else {
  66         assert(0);
  67     }
  68
  69     /* Point size. */
  70     if (vs_outputs->psize != ATTR_UNUSED) {
  71         r300_draw_emit_attrib(r300, EMIT_1F_PSIZE, INTERP_POS,
  72                               vs_outputs->psize);
  73     }
  74
  75     /* Colors. */
  76     for (i = 0; i < ATTR_COLOR_COUNT; i++) {
  77         if (vs_outputs->color[i] != ATTR_UNUSED) {
  78             r300_draw_emit_attrib(r300, EMIT_4F, INTERP_LINEAR,
  79                                   vs_outputs->color[i]);
  80         }
  81     }
  82
  83     /* XXX Back-face colors. */
  84
  85     /* Texture coordinates. */
  86     gen_count = 0;
  87     for (i = 0; i < ATTR_GENERIC_COUNT; i++) {
  88         if (vs_outputs->generic[i] != ATTR_UNUSED) {
  89             r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE,
  90                                   vs_outputs->generic[i]);
  91             gen_count++;
  92         }
  93     }
  94
  95     /* Fog coordinates. */
  96     if (vs_outputs->fog != ATTR_UNUSED) {
  97         r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE,
  98                               vs_outputs->fog);
  99         gen_count++;
 100     }
 101
 102     /* XXX magic */
 103     assert(gen_count <= 8);
 104 }
 105
 106 /* Update the PSC tables. */
 107 /* XXX move this function into r300_state.c after TCL-bypass gets removed
 108  * XXX because this one is dependent only on vertex elements. */
 109 static void r300_vertex_psc(struct r300_context* r300)
 110 {
 111     struct r300_vertex_shader* vs = r300->vs_state.state;
 112     struct r300_vertex_stream_state *vformat =
 113         (struct r300_vertex_stream_state*)r300->vertex_stream_state.state;
 114     uint16_t type, swizzle;
 115     enum pipe_format format;
 116     unsigned i;
 117     int identity[16] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15};
 118     int* stream_tab;
 119
 120     memset(vformat, 0, sizeof(struct r300_vertex_stream_state));
 121
 122     stream_tab = identity;
 123
 124     /* Vertex shaders have no semantics on their inputs,
 125      * so PSC should just route stuff based on the vertex elements,
 126      * and not on attrib information. */
 127     DBG(r300, DBG_DRAW, "r300: vs expects %d attribs, routing %d elements"
 128             " in psc\n",
 129             vs->info.num_inputs,
 130             r300->vertex_element_count);
 131
 132     for (i = 0; i < r300->vertex_element_count; i++) {
 133         format = r300->vertex_element[i].src_format;
 134
 135         type = r300_translate_vertex_data_type(format) |
 136             (stream_tab[i] << R300_DST_VEC_LOC_SHIFT);
 137         swizzle = r300_translate_vertex_data_swizzle(format);
 138
 139         if (i & 1) {
 140             vformat->vap_prog_stream_cntl[i >> 1] |= type << 16;
 141             vformat->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16;
 142         } else {
 143             vformat->vap_prog_stream_cntl[i >> 1] |= type;
 144             vformat->vap_prog_stream_cntl_ext[i >> 1] |= swizzle;
 145         }
 146     }
 147
 148     assert(i <= 15);
 149
 150     /* Set the last vector in the PSC. */
 151     if (i) {
 152         i -= 1;
 153     }
 154     vformat->vap_prog_stream_cntl[i >> 1] |=
 155         (R300_LAST_VEC << (i & 1 ? 16 : 0));
 156
 157     vformat->count = (i >> 1) + 1;
 158     r300->vertex_stream_state.size = (1 + vformat->count) * 2;
 159 }
 160
 161 /* Update the PSC tables for SW TCL, using Draw. */
 162 static void r300_swtcl_vertex_psc(struct r300_context* r300)
 163 {
 164     struct r300_vertex_shader* vs = r300->vs_state.state;
 165     struct r300_vertex_stream_state *vformat =
 166         (struct r300_vertex_stream_state*)r300->vertex_stream_state.state;
 167     struct vertex_info* vinfo = &r300->vertex_info;
 168     uint16_t type, swizzle;
 169     enum pipe_format format;
 170     unsigned i, attrib_count;
 171     int* vs_output_tab = vs->stream_loc_notcl;
 172
 173     memset(vformat, 0, sizeof(struct r300_vertex_stream_state));
 174
 175     /* For each Draw attribute, route it to the fragment shader according
 176      * to the vs_output_tab. */
 177     attrib_count = vinfo->num_attribs;
 178     DBG(r300, DBG_DRAW, "r300: attrib count: %d\n", attrib_count);
 179     for (i = 0; i < attrib_count; i++) {
 180         DBG(r300, DBG_DRAW, "r300: attrib: offset %d, interp %d, size %d,"
 181                " vs_output_tab %d\n", vinfo->attrib[i].src_index,
 182                vinfo->attrib[i].interp_mode, vinfo->attrib[i].emit,
 183                vs_output_tab[i]);
 184     }
 185
 186     for (i = 0; i < attrib_count; i++) {
 187         /* Make sure we have a proper destination for our attribute. */
 188         assert(vs_output_tab[i] != -1);
 189
 190         format = draw_translate_vinfo_format(vinfo->attrib[i].emit);
 191
 192         /* Obtain the type of data in this attribute. */
 193         type = r300_translate_vertex_data_type(format) |
 194             vs_output_tab[i] << R300_DST_VEC_LOC_SHIFT;
 195
 196         /* Obtain the swizzle for this attribute. Note that the default
 197          * swizzle in the hardware is not XYZW! */
 198         swizzle = r300_translate_vertex_data_swizzle(format);
 199
 200         /* Add the attribute to the PSC table. */
 201         if (i & 1) {
 202             vformat->vap_prog_stream_cntl[i >> 1] |= type << 16;
 203             vformat->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16;
 204         } else {
 205             vformat->vap_prog_stream_cntl[i >> 1] |= type;
 206             vformat->vap_prog_stream_cntl_ext[i >> 1] |= swizzle;
 207         }
 208     }
 209
 210     /* Set the last vector in the PSC. */
 211     if (i) {
 212         i -= 1;
 213     }
 214     vformat->vap_prog_stream_cntl[i >> 1] |=
 215         (R300_LAST_VEC << (i & 1 ? 16 : 0));
 216
 217     vformat->count = (i >> 1) + 1;
 218     r300->vertex_stream_state.size = (1 + vformat->count) * 2;
 219 }
 220
 221 static void r300_rs_col(struct r300_rs_block* rs, int id, int ptr,
 222                         boolean swizzle_0001)
 223 {
 224     rs->ip[id] |= R300_RS_COL_PTR(ptr);
 225     if (swizzle_0001) {
 226         rs->ip[id] |= R300_RS_COL_FMT(R300_RS_COL_FMT_0001);
 227     } else {
 228         rs->ip[id] |= R300_RS_COL_FMT(R300_RS_COL_FMT_RGBA);
 229     }
 230     rs->inst[id] |= R300_RS_INST_COL_ID(id);
 231 }
 232
 233 static void r300_rs_col_write(struct r300_rs_block* rs, int id, int fp_offset)
 234 {
 235     rs->inst[id] |= R300_RS_INST_COL_CN_WRITE |
 236                     R300_RS_INST_COL_ADDR(fp_offset);
 237 }
 238
 239 static void r300_rs_tex(struct r300_rs_block* rs, int id, int ptr,
 240                         boolean swizzle_X001)
 241 {
 242     if (swizzle_X001) {
 243         rs->ip[id] |= R300_RS_TEX_PTR(ptr*4) |
 244                       R300_RS_SEL_S(R300_RS_SEL_C0) |
 245                       R300_RS_SEL_T(R300_RS_SEL_K0) |
 246                       R300_RS_SEL_R(R300_RS_SEL_K0) |
 247                       R300_RS_SEL_Q(R300_RS_SEL_K1);
 248     } else {
 249         rs->ip[id] |= R300_RS_TEX_PTR(ptr*4) |
 250                       R300_RS_SEL_S(R300_RS_SEL_C0) |
 251                       R300_RS_SEL_T(R300_RS_SEL_C1) |
 252                       R300_RS_SEL_R(R300_RS_SEL_C2) |
 253                       R300_RS_SEL_Q(R300_RS_SEL_C3);
 254     }
 255     rs->inst[id] |= R300_RS_INST_TEX_ID(id);
 256 }
 257
 258 static void r300_rs_tex_write(struct r300_rs_block* rs, int id, int fp_offset)
 259 {
 260     rs->inst[id] |= R300_RS_INST_TEX_CN_WRITE |
 261                     R300_RS_INST_TEX_ADDR(fp_offset);
 262 }
 263
 264 static void r500_rs_col(struct r300_rs_block* rs, int id, int ptr,
 265                         boolean swizzle_0001)
 266 {
 267     rs->ip[id] |= R500_RS_COL_PTR(ptr);
 268     if (swizzle_0001) {
 269         rs->ip[id] |= R500_RS_COL_FMT(R300_RS_COL_FMT_0001);
 270     } else {
 271         rs->ip[id] |= R500_RS_COL_FMT(R300_RS_COL_FMT_RGBA);
 272     }
 273     rs->inst[id] |= R500_RS_INST_COL_ID(id);
 274 }
 275
 276 static void r500_rs_col_write(struct r300_rs_block* rs, int id, int fp_offset)
 277 {
 278     rs->inst[id] |= R500_RS_INST_COL_CN_WRITE |
 279                     R500_RS_INST_COL_ADDR(fp_offset);
 280 }
 281
 282 static void r500_rs_tex(struct r300_rs_block* rs, int id, int ptr,
 283                         boolean swizzle_X001)
 284 {
 285     int rs_tex_comp = ptr*4;
 286
 287     if (swizzle_X001) {
 288         rs->ip[id] |= R500_RS_SEL_S(rs_tex_comp) |
 289                       R500_RS_SEL_T(R500_RS_IP_PTR_K0) |
 290                       R500_RS_SEL_R(R500_RS_IP_PTR_K0) |
 291                       R500_RS_SEL_Q(R500_RS_IP_PTR_K1);
 292     } else {
 293         rs->ip[id] |= R500_RS_SEL_S(rs_tex_comp) |
 294                       R500_RS_SEL_T(rs_tex_comp + 1) |
 295                       R500_RS_SEL_R(rs_tex_comp + 2) |
 296                       R500_RS_SEL_Q(rs_tex_comp + 3);
 297     }
 298     rs->inst[id] |= R500_RS_INST_TEX_ID(id);
 299 }
 300
 301 static void r500_rs_tex_write(struct r300_rs_block* rs, int id, int fp_offset)
 302 {
 303     rs->inst[id] |= R500_RS_INST_TEX_CN_WRITE |
 304                     R500_RS_INST_TEX_ADDR(fp_offset);
 305 }
 306
 307 /* Set up the RS block.
 308  *
 309  * This is the part of the chipset that actually does the rasterization
 310  * of vertices into fragments. This is also the part of the chipset that
 311  * locks up if any part of it is even slightly wrong. */
 312 static void r300_update_rs_block(struct r300_context* r300,
 313                                  struct r300_shader_semantics* vs_outputs,
 314                                  struct r300_shader_semantics* fs_inputs)
 315 {
 316     struct r300_rs_block rs = { { 0 } };
 317     int i, col_count = 0, tex_count = 0, fp_offset = 0, count;
 318     void (*rX00_rs_col)(struct r300_rs_block*, int, int, boolean);
 319     void (*rX00_rs_col_write)(struct r300_rs_block*, int, int);
 320     void (*rX00_rs_tex)(struct r300_rs_block*, int, int, boolean);
 321     void (*rX00_rs_tex_write)(struct r300_rs_block*, int, int);
 322     boolean any_bcolor_used = vs_outputs->bcolor[0] != ATTR_UNUSED ||
 323                               vs_outputs->bcolor[1] != ATTR_UNUSED;
 324
 325     if (r300_screen(r300->context.screen)->caps->is_r500) {
 326         rX00_rs_col       = r500_rs_col;
 327         rX00_rs_col_write = r500_rs_col_write;
 328         rX00_rs_tex       = r500_rs_tex;
 329         rX00_rs_tex_write = r500_rs_tex_write;
 330     } else {
 331         rX00_rs_col       = r300_rs_col;
 332         rX00_rs_col_write = r300_rs_col_write;
 333         rX00_rs_tex       = r300_rs_tex;
 334         rX00_rs_tex_write = r300_rs_tex_write;
 335     }
 336
 337     /* Rasterize colors. */
 338     for (i = 0; i < ATTR_COLOR_COUNT; i++) {
 339         if (vs_outputs->color[i] != ATTR_UNUSED || any_bcolor_used ||
 340             vs_outputs->color[1] != ATTR_UNUSED) {
 341             /* Always rasterize if it's written by the VS,
 342              * otherwise it locks up. */
 343             rX00_rs_col(&rs, col_count, i, FALSE);
 344
 345             /* Write it to the FS input register if it's used by the FS. */
 346             if (fs_inputs->color[i] != ATTR_UNUSED) {
 347                 rX00_rs_col_write(&rs, col_count, fp_offset);
 348                 fp_offset++;
 349             }
 350             col_count++;
 351         } else {
 352             /* Skip the FS input register, leave it uninitialized. */
 353             /* If we try to set it to (0,0,0,1), it will lock up. */
 354             if (fs_inputs->color[i] != ATTR_UNUSED) {
 355                 fp_offset++;
 356             }
 357         }
 358     }
 359
 360     /* Rasterize texture coordinates. */
 361     for (i = 0; i < ATTR_GENERIC_COUNT; i++) {
 362         if (vs_outputs->generic[i] != ATTR_UNUSED) {
 363             /* Always rasterize if it's written by the VS,
 364              * otherwise it locks up. */
 365             rX00_rs_tex(&rs, tex_count, tex_count, FALSE);
 366
 367             /* Write it to the FS input register if it's used by the FS. */
 368             if (fs_inputs->generic[i] != ATTR_UNUSED) {
 369                 rX00_rs_tex_write(&rs, tex_count, fp_offset);
 370                 fp_offset++;
 371             }
 372             tex_count++;
 373         } else {
 374             /* Skip the FS input register, leave it uninitialized. */
 375             /* If we try to set it to (0,0,0,1), it will lock up. */
 376             if (fs_inputs->generic[i] != ATTR_UNUSED) {
 377                 fp_offset++;
 378             }
 379         }
 380     }
 381
 382     /* Rasterize fog coordinates. */
 383     if (vs_outputs->fog != ATTR_UNUSED) {
 384         /* Always rasterize if it's written by the VS,
 385          * otherwise it locks up. */
 386         rX00_rs_tex(&rs, tex_count, tex_count, TRUE);
 387
 388         /* Write it to the FS input register if it's used by the FS. */
 389         if (fs_inputs->fog != ATTR_UNUSED) {
 390             rX00_rs_tex_write(&rs, tex_count, fp_offset);
 391             fp_offset++;
 392         }
 393         tex_count++;
 394     } else {
 395         /* Skip the FS input register, leave it uninitialized. */
 396         /* If we try to set it to (0,0,0,1), it will lock up. */
 397         if (fs_inputs->fog != ATTR_UNUSED) {
 398             fp_offset++;
 399         }
 400     }
 401
 402     /* Rasterize WPOS. */
 403     /* If the FS doesn't need it, it's not written by the VS. */
 404     if (fs_inputs->wpos != ATTR_UNUSED) {
 405         rX00_rs_tex(&rs, tex_count, tex_count, FALSE);
 406         rX00_rs_tex_write(&rs, tex_count, fp_offset);
 407
 408         fp_offset++;
 409         tex_count++;
 410     }
 411
 412     /* Rasterize at least one color, or bad things happen. */
 413     if (col_count == 0 && tex_count == 0) {
 414         rX00_rs_col(&rs, 0, 0, TRUE);
 415         col_count++;
 416     }
 417
 418     rs.count = (tex_count*4) | (col_count << R300_IC_COUNT_SHIFT) |
 419         R300_HIRES_EN;
 420
 421     count = MAX3(col_count, tex_count, 1);
 422     rs.inst_count = count - 1;
 423
 424     /* Now, after all that, see if we actually need to update the state. */
 425     if (memcmp(r300->rs_block_state.state, &rs, sizeof(struct r300_rs_block))) {
 426         memcpy(r300->rs_block_state.state, &rs, sizeof(struct r300_rs_block));
 427         r300->rs_block_state.size = 5 + count*2;
 428     }
 429 }
 430
 431 /* Update the shader-dependant states. */
 432 static void r300_update_derived_shader_state(struct r300_context* r300)
 433 {
 434     struct r300_vertex_shader* vs = r300->vs_state.state;
 435     struct r300_screen* r300screen = r300_screen(r300->context.screen);
 436     struct r300_vap_output_state *vap_out =
 437         (struct r300_vap_output_state*)r300->vap_output_state.state;
 438
 439     /* XXX Mmm, delicious hax */
 440     memset(&r300->vertex_info, 0, sizeof(struct vertex_info));
 441     memcpy(vap_out, vs->hwfmt, sizeof(uint)*4);
 442
 443     r300_update_rs_block(r300, &vs->outputs, &r300->fs->inputs);
 444
 445     if (r300screen->caps->has_tcl) {
 446         r300_vertex_psc(r300);
 447     } else {
 448         r300_draw_emit_all_attribs(r300);
 449         draw_compute_vertex_size(&r300->vertex_info);
 450         r300_swtcl_vertex_psc(r300);
 451     }
 452 }
 453
 454 static boolean r300_dsa_writes_depth_stencil(struct r300_dsa_state* dsa)
 455 {
 456     /* We are interested only in the cases when a new depth or stencil value
 457      * can be written and changed. */
 458
 459     /* We might optionally check for [Z func: never] and inspect the stencil
 460      * state in a similar fashion, but it's not terribly important. */
 461     return (dsa->z_buffer_control & R300_Z_WRITE_ENABLE) ||
 462            (dsa->stencil_ref_mask & R300_STENCILWRITEMASK_MASK) ||
 463            ((dsa->z_buffer_control & R500_STENCIL_REFMASK_FRONT_BACK) &&
 464             (dsa->stencil_ref_bf & R300_STENCILWRITEMASK_MASK));
 465 }
 466
 467 static boolean r300_dsa_alpha_test_enabled(struct r300_dsa_state* dsa)
 468 {
 469     /* We are interested only in the cases when alpha testing can kill
 470      * a fragment. */
 471     uint32_t af = dsa->alpha_function;
 472
 473     return (af & R300_FG_ALPHA_FUNC_ENABLE) &&
 474            (af & R300_FG_ALPHA_FUNC_ALWAYS) != R300_FG_ALPHA_FUNC_ALWAYS;
 475 }
 476
 477 static void r300_update_ztop(struct r300_context* r300)
 478 {
 479     struct r300_ztop_state* ztop_state =
 480         (struct r300_ztop_state*)r300->ztop_state.state;
 481
 482     /* This is important enough that I felt it warranted a comment.
 483      *
 484      * According to the docs, these are the conditions where ZTOP must be
 485      * disabled:
 486      * 1) Alpha testing enabled
 487      * 2) Texture kill instructions in fragment shader
 488      * 3) Chroma key culling enabled
 489      * 4) W-buffering enabled
 490      *
 491      * The docs claim that for the first three cases, if no ZS writes happen,
 492      * then ZTOP can be used.
 493      *
 494      * (3) will never apply since we do not support chroma-keyed operations.
 495      * (4) will need to be re-examined (and this comment updated) if/when
 496      * Hyper-Z becomes supported.
 497      *
 498      * Additionally, the following conditions require disabled ZTOP:
 499      * 5) Depth writes in fragment shader
 500      * 6) Outstanding occlusion queries
 501      *
 502      * This register causes stalls all the way from SC to CB when changed,
 503      * but it is buffered on-chip so it does not hurt to write it if it has
 504      * not changed.
 505      *
 506      * ~C.
 507      */
 508
 509     /* ZS writes */
 510     if (r300_dsa_writes_depth_stencil(r300->dsa_state.state) &&
 511            (r300_dsa_alpha_test_enabled(r300->dsa_state.state) ||/* (1) */
 512             r300->fs->info.uses_kill)) {                         /* (2) */
 513         ztop_state->z_buffer_top = R300_ZTOP_DISABLE;
 514     } else if (r300_fragment_shader_writes_depth(r300->fs)) {    /* (5) */
 515         ztop_state->z_buffer_top = R300_ZTOP_DISABLE;
 516     } else if (r300->query_current) {                            /* (6) */
 517         ztop_state->z_buffer_top = R300_ZTOP_DISABLE;
 518     } else {
 519         ztop_state->z_buffer_top = R300_ZTOP_ENABLE;
 520     }
 521
 522     r300->ztop_state.dirty = TRUE;
 523 }
 524
 525 static void r300_merge_textures_and_samplers(struct r300_context* r300)
 526 {
 527     struct r300_textures_state *state =
 528         (struct r300_textures_state*)r300->textures_state.state;
 529     struct r300_texture_sampler_state *texstate;
 530     struct r300_sampler_state *sampler;
 531     struct r300_texture *tex;
 532     unsigned min_level, max_level, i, size;
 533     unsigned count = MIN2(state->texture_count, state->sampler_count);
 534
 535     state->tx_enable = 0;
 536     size = 2;
 537
 538     for (i = 0; i < count; i++) {
 539         if (state->textures[i] && state->sampler_states[i]) {
 540             state->tx_enable |= 1 << i;
 541
 542             tex = state->textures[i];
 543             sampler = state->sampler_states[i];
 544
 545             texstate = &state->regs[i];
 546             memcpy(texstate->format, &tex->state, sizeof(uint32_t)*3);
 547             texstate->filter[0] = sampler->filter0;
 548             texstate->filter[1] = sampler->filter1;
 549             texstate->border_color = sampler->border_color;
 550             texstate->tile_config = R300_TXO_MACRO_TILE(tex->macrotile) |
 551                                     R300_TXO_MICRO_TILE(tex->microtile);
 552
 553             /* to emulate 1D textures through 2D ones correctly */
 554             if (tex->tex.target == PIPE_TEXTURE_1D) {
 555                 texstate->filter[0] &= ~R300_TX_WRAP_T_MASK;
 556                 texstate->filter[0] |= R300_TX_WRAP_T(R300_TX_CLAMP_TO_EDGE);
 557             }
 558
 559             if (tex->is_npot) {
 560                 /* NPOT textures don't support mip filter, unfortunately.
 561                  * This prevents incorrect rendering. */
 562                 texstate->filter[0] &= ~R300_TX_MIN_FILTER_MIP_MASK;
 563             } else {
 564                 /* determine min/max levels */
 565                 /* the MAX_MIP level is the largest (finest) one */
 566                 max_level = MIN2(sampler->max_lod, tex->tex.last_level);
 567                 min_level = MIN2(sampler->min_lod, max_level);
 568                 texstate->format[0] |= R300_TX_NUM_LEVELS(max_level);
 569                 texstate->filter[0] |= R300_TX_MAX_MIP_LEVEL(min_level);
 570             }
 571
 572             texstate->filter[0] |= i << 28;
 573
 574             size += 16;
 575             state->count = i+1;
 576         }
 577     }
 578
 579     r300->textures_state.size = size;
 580 }
 581
 582 void r300_update_derived_state(struct r300_context* r300)
 583 {
 584     if (r300->rs_block_state.dirty ||
 585         r300->vertex_stream_state.dirty || /* XXX put updating this state out of this file */
 586         r300->rs_state.dirty) {  /* XXX and remove this one (tcl_bypass dependency) */
 587         r300_update_derived_shader_state(r300);
 588     }
 589
 590     if (r300->textures_state.dirty) {
 591         r300_merge_textures_and_samplers(r300);
 592     }
 593
 594     r300_update_ztop(r300);
 595 }