r300g: implement hyper-z support. (v4)
[mesa.git] / src / gallium / drivers / r300 / r300_state_derived.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2009 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "draw/draw_context.h"
25
26 #include "util/u_math.h"
27 #include "util/u_memory.h"
28
29 #include "r300_context.h"
30 #include "r300_fs.h"
31 #include "r300_hyperz.h"
32 #include "r300_screen.h"
33 #include "r300_shader_semantics.h"
34 #include "r300_state_derived.h"
35 #include "r300_state_inlines.h"
36 #include "r300_texture.h"
37 #include "r300_vs.h"
38 #include "r300_winsys.h"
39
40 /* r300_state_derived: Various bits of state which are dependent upon
41 * currently bound CSO data. */
42
43 enum r300_rs_swizzle {
44 SWIZ_XYZW = 0,
45 SWIZ_X001,
46 SWIZ_XY01,
47 SWIZ_0001,
48 };
49
50 static void r300_draw_emit_attrib(struct r300_context* r300,
51 enum attrib_emit emit,
52 enum interp_mode interp,
53 int index)
54 {
55 struct r300_vertex_shader* vs = r300->vs_state.state;
56 struct tgsi_shader_info* info = &vs->info;
57 int output;
58
59 output = draw_find_shader_output(r300->draw,
60 info->output_semantic_name[index],
61 info->output_semantic_index[index]);
62 draw_emit_vertex_attr(&r300->vertex_info, emit, interp, output);
63 }
64
65 static void r300_draw_emit_all_attribs(struct r300_context* r300)
66 {
67 struct r300_vertex_shader* vs = r300->vs_state.state;
68 struct r300_shader_semantics* vs_outputs = &vs->outputs;
69 int i, gen_count;
70
71 /* Position. */
72 if (vs_outputs->pos != ATTR_UNUSED) {
73 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE,
74 vs_outputs->pos);
75 } else {
76 assert(0);
77 }
78
79 /* Point size. */
80 if (vs_outputs->psize != ATTR_UNUSED) {
81 r300_draw_emit_attrib(r300, EMIT_1F_PSIZE, INTERP_POS,
82 vs_outputs->psize);
83 }
84
85 /* Colors. */
86 for (i = 0; i < ATTR_COLOR_COUNT; i++) {
87 if (vs_outputs->color[i] != ATTR_UNUSED) {
88 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_LINEAR,
89 vs_outputs->color[i]);
90 }
91 }
92
93 /* Back-face colors. */
94 for (i = 0; i < ATTR_COLOR_COUNT; i++) {
95 if (vs_outputs->bcolor[i] != ATTR_UNUSED) {
96 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_LINEAR,
97 vs_outputs->bcolor[i]);
98 }
99 }
100
101 /* Texture coordinates. */
102 /* Only 8 generic vertex attributes can be used. If there are more,
103 * they won't be rasterized. */
104 gen_count = 0;
105 for (i = 0; i < ATTR_GENERIC_COUNT && gen_count < 8; i++) {
106 if (vs_outputs->generic[i] != ATTR_UNUSED &&
107 !(r300->sprite_coord_enable & (1 << i))) {
108 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE,
109 vs_outputs->generic[i]);
110 gen_count++;
111 }
112 }
113
114 /* Fog coordinates. */
115 if (gen_count < 8 && vs_outputs->fog != ATTR_UNUSED) {
116 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE,
117 vs_outputs->fog);
118 gen_count++;
119 }
120
121 /* WPOS. */
122 if (r300_fs(r300)->shader->inputs.wpos != ATTR_UNUSED && gen_count < 8) {
123 DBG(r300, DBG_SWTCL, "draw_emit_attrib: WPOS, index: %i\n",
124 vs_outputs->wpos);
125 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE,
126 vs_outputs->wpos);
127 }
128 }
129
130 /* Update the PSC tables for SW TCL, using Draw. */
131 static void r300_swtcl_vertex_psc(struct r300_context *r300)
132 {
133 struct r300_vertex_stream_state *vstream = r300->vertex_stream_state.state;
134 struct vertex_info *vinfo = &r300->vertex_info;
135 uint16_t type, swizzle;
136 enum pipe_format format;
137 unsigned i, attrib_count;
138 int* vs_output_tab = r300->stream_loc_notcl;
139
140 memset(vstream, 0, sizeof(struct r300_vertex_stream_state));
141
142 /* For each Draw attribute, route it to the fragment shader according
143 * to the vs_output_tab. */
144 attrib_count = vinfo->num_attribs;
145 DBG(r300, DBG_SWTCL, "r300: attrib count: %d\n", attrib_count);
146 for (i = 0; i < attrib_count; i++) {
147 if (vs_output_tab[i] == -1) {
148 assert(0);
149 abort();
150 }
151
152 format = draw_translate_vinfo_format(vinfo->attrib[i].emit);
153
154 DBG(r300, DBG_SWTCL,
155 "r300: swtcl_vertex_psc [%i] <- %s\n",
156 vs_output_tab[i], util_format_short_name(format));
157
158 /* Obtain the type of data in this attribute. */
159 type = r300_translate_vertex_data_type(format);
160 if (type == R300_INVALID_FORMAT) {
161 fprintf(stderr, "r300: Bad vertex format %s.\n",
162 util_format_short_name(format));
163 assert(0);
164 abort();
165 }
166
167 type |= vs_output_tab[i] << R300_DST_VEC_LOC_SHIFT;
168
169 /* Obtain the swizzle for this attribute. Note that the default
170 * swizzle in the hardware is not XYZW! */
171 swizzle = r300_translate_vertex_data_swizzle(format);
172
173 /* Add the attribute to the PSC table. */
174 if (i & 1) {
175 vstream->vap_prog_stream_cntl[i >> 1] |= type << 16;
176 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16;
177 } else {
178 vstream->vap_prog_stream_cntl[i >> 1] |= type;
179 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle;
180 }
181 }
182
183 /* Set the last vector in the PSC. */
184 if (i) {
185 i -= 1;
186 }
187 vstream->vap_prog_stream_cntl[i >> 1] |=
188 (R300_LAST_VEC << (i & 1 ? 16 : 0));
189
190 vstream->count = (i >> 1) + 1;
191 r300->vertex_stream_state.dirty = TRUE;
192 r300->vertex_stream_state.size = (1 + vstream->count) * 2;
193 }
194
195 static void r300_rs_col(struct r300_rs_block* rs, int id, int ptr,
196 enum r300_rs_swizzle swiz)
197 {
198 rs->ip[id] |= R300_RS_COL_PTR(ptr);
199 if (swiz == SWIZ_0001) {
200 rs->ip[id] |= R300_RS_COL_FMT(R300_RS_COL_FMT_0001);
201 } else {
202 rs->ip[id] |= R300_RS_COL_FMT(R300_RS_COL_FMT_RGBA);
203 }
204 rs->inst[id] |= R300_RS_INST_COL_ID(id);
205 }
206
207 static void r300_rs_col_write(struct r300_rs_block* rs, int id, int fp_offset)
208 {
209 rs->inst[id] |= R300_RS_INST_COL_CN_WRITE |
210 R300_RS_INST_COL_ADDR(fp_offset);
211 }
212
213 static void r300_rs_tex(struct r300_rs_block* rs, int id, int ptr,
214 enum r300_rs_swizzle swiz)
215 {
216 if (swiz == SWIZ_X001) {
217 rs->ip[id] |= R300_RS_TEX_PTR(ptr) |
218 R300_RS_SEL_S(R300_RS_SEL_C0) |
219 R300_RS_SEL_T(R300_RS_SEL_K0) |
220 R300_RS_SEL_R(R300_RS_SEL_K0) |
221 R300_RS_SEL_Q(R300_RS_SEL_K1);
222 } else if (swiz == SWIZ_XY01) {
223 rs->ip[id] |= R300_RS_TEX_PTR(ptr) |
224 R300_RS_SEL_S(R300_RS_SEL_C0) |
225 R300_RS_SEL_T(R300_RS_SEL_C1) |
226 R300_RS_SEL_R(R300_RS_SEL_K0) |
227 R300_RS_SEL_Q(R300_RS_SEL_K1);
228 } else {
229 rs->ip[id] |= R300_RS_TEX_PTR(ptr) |
230 R300_RS_SEL_S(R300_RS_SEL_C0) |
231 R300_RS_SEL_T(R300_RS_SEL_C1) |
232 R300_RS_SEL_R(R300_RS_SEL_C2) |
233 R300_RS_SEL_Q(R300_RS_SEL_C3);
234 }
235 rs->inst[id] |= R300_RS_INST_TEX_ID(id);
236 }
237
238 static void r300_rs_tex_write(struct r300_rs_block* rs, int id, int fp_offset)
239 {
240 rs->inst[id] |= R300_RS_INST_TEX_CN_WRITE |
241 R300_RS_INST_TEX_ADDR(fp_offset);
242 }
243
244 static void r500_rs_col(struct r300_rs_block* rs, int id, int ptr,
245 enum r300_rs_swizzle swiz)
246 {
247 rs->ip[id] |= R500_RS_COL_PTR(ptr);
248 if (swiz == SWIZ_0001) {
249 rs->ip[id] |= R500_RS_COL_FMT(R300_RS_COL_FMT_0001);
250 } else {
251 rs->ip[id] |= R500_RS_COL_FMT(R300_RS_COL_FMT_RGBA);
252 }
253 rs->inst[id] |= R500_RS_INST_COL_ID(id);
254 }
255
256 static void r500_rs_col_write(struct r300_rs_block* rs, int id, int fp_offset)
257 {
258 rs->inst[id] |= R500_RS_INST_COL_CN_WRITE |
259 R500_RS_INST_COL_ADDR(fp_offset);
260 }
261
262 static void r500_rs_tex(struct r300_rs_block* rs, int id, int ptr,
263 enum r300_rs_swizzle swiz)
264 {
265 if (swiz == SWIZ_X001) {
266 rs->ip[id] |= R500_RS_SEL_S(ptr) |
267 R500_RS_SEL_T(R500_RS_IP_PTR_K0) |
268 R500_RS_SEL_R(R500_RS_IP_PTR_K0) |
269 R500_RS_SEL_Q(R500_RS_IP_PTR_K1);
270 } else if (swiz == SWIZ_XY01) {
271 rs->ip[id] |= R500_RS_SEL_S(ptr) |
272 R500_RS_SEL_T(ptr + 1) |
273 R500_RS_SEL_R(R500_RS_IP_PTR_K0) |
274 R500_RS_SEL_Q(R500_RS_IP_PTR_K1);
275 } else {
276 rs->ip[id] |= R500_RS_SEL_S(ptr) |
277 R500_RS_SEL_T(ptr + 1) |
278 R500_RS_SEL_R(ptr + 2) |
279 R500_RS_SEL_Q(ptr + 3);
280 }
281 rs->inst[id] |= R500_RS_INST_TEX_ID(id);
282 }
283
284 static void r500_rs_tex_write(struct r300_rs_block* rs, int id, int fp_offset)
285 {
286 rs->inst[id] |= R500_RS_INST_TEX_CN_WRITE |
287 R500_RS_INST_TEX_ADDR(fp_offset);
288 }
289
290 /* Set up the RS block.
291 *
292 * This is the part of the chipset that is responsible for linking vertex
293 * and fragment shaders and stuffed texture coordinates.
294 *
295 * The rasterizer reads data from VAP, which produces vertex shader outputs,
296 * and GA, which produces stuffed texture coordinates. VAP outputs have
297 * precedence over GA. All outputs must be rasterized otherwise it locks up.
298 * If there are more outputs rasterized than is set in VAP/GA, it locks up
299 * too. The funky part is that this info has been pretty much obtained by trial
300 * and error. */
301 static void r300_update_rs_block(struct r300_context *r300)
302 {
303 struct r300_vertex_shader *vs = r300->vs_state.state;
304 struct r300_shader_semantics *vs_outputs = &vs->outputs;
305 struct r300_shader_semantics *fs_inputs = &r300_fs(r300)->shader->inputs;
306 struct r300_rs_block rs = {0};
307 int i, col_count = 0, tex_count = 0, fp_offset = 0, count, loc = 0, tex_ptr = 0;
308 void (*rX00_rs_col)(struct r300_rs_block*, int, int, enum r300_rs_swizzle);
309 void (*rX00_rs_col_write)(struct r300_rs_block*, int, int);
310 void (*rX00_rs_tex)(struct r300_rs_block*, int, int, enum r300_rs_swizzle);
311 void (*rX00_rs_tex_write)(struct r300_rs_block*, int, int);
312 boolean any_bcolor_used = vs_outputs->bcolor[0] != ATTR_UNUSED ||
313 vs_outputs->bcolor[1] != ATTR_UNUSED;
314 int *stream_loc_notcl = r300->stream_loc_notcl;
315
316 if (r300->screen->caps.is_r500) {
317 rX00_rs_col = r500_rs_col;
318 rX00_rs_col_write = r500_rs_col_write;
319 rX00_rs_tex = r500_rs_tex;
320 rX00_rs_tex_write = r500_rs_tex_write;
321 } else {
322 rX00_rs_col = r300_rs_col;
323 rX00_rs_col_write = r300_rs_col_write;
324 rX00_rs_tex = r300_rs_tex;
325 rX00_rs_tex_write = r300_rs_tex_write;
326 }
327
328 /* The position is always present in VAP. */
329 rs.vap_vsm_vtx_assm |= R300_INPUT_CNTL_POS;
330 rs.vap_out_vtx_fmt[0] |= R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT;
331 stream_loc_notcl[loc++] = 0;
332
333 /* Set up the point size in VAP. */
334 if (vs_outputs->psize != ATTR_UNUSED) {
335 rs.vap_out_vtx_fmt[0] |= R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT;
336 stream_loc_notcl[loc++] = 1;
337 }
338
339 /* Set up and rasterize colors. */
340 for (i = 0; i < ATTR_COLOR_COUNT; i++) {
341 if (vs_outputs->color[i] != ATTR_UNUSED || any_bcolor_used ||
342 vs_outputs->color[1] != ATTR_UNUSED) {
343 /* Set up the color in VAP. */
344 rs.vap_vsm_vtx_assm |= R300_INPUT_CNTL_COLOR;
345 rs.vap_out_vtx_fmt[0] |=
346 R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT << i;
347 stream_loc_notcl[loc++] = 2 + i;
348
349 /* Rasterize it. */
350 rX00_rs_col(&rs, col_count, col_count, SWIZ_XYZW);
351
352 /* Write it to the FS input register if it's needed by the FS. */
353 if (fs_inputs->color[i] != ATTR_UNUSED) {
354 rX00_rs_col_write(&rs, col_count, fp_offset);
355 fp_offset++;
356
357 DBG(r300, DBG_RS,
358 "r300: Rasterized color %i written to FS.\n", i);
359 } else {
360 DBG(r300, DBG_RS, "r300: Rasterized color %i unused.\n", i);
361 }
362 col_count++;
363 } else {
364 /* Skip the FS input register, leave it uninitialized. */
365 /* If we try to set it to (0,0,0,1), it will lock up. */
366 if (fs_inputs->color[i] != ATTR_UNUSED) {
367 fp_offset++;
368
369 DBG(r300, DBG_RS, "r300: FS input color %i unassigned%s.\n",
370 i);
371 }
372 }
373 }
374
375 /* Set up back-face colors. The rasterizer will do the color selection
376 * automatically. */
377 if (any_bcolor_used) {
378 if (r300->two_sided_color) {
379 /* Rasterize as back-face colors. */
380 for (i = 0; i < ATTR_COLOR_COUNT; i++) {
381 rs.vap_vsm_vtx_assm |= R300_INPUT_CNTL_COLOR;
382 rs.vap_out_vtx_fmt[0] |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT << (2+i);
383 stream_loc_notcl[loc++] = 4 + i;
384 }
385 } else {
386 /* Rasterize two fake texcoords to prevent from the two-sided color
387 * selection. */
388 /* XXX Consider recompiling the vertex shader to save 2 RS units. */
389 for (i = 0; i < 2; i++) {
390 rs.vap_vsm_vtx_assm |= (R300_INPUT_CNTL_TC0 << tex_count);
391 rs.vap_out_vtx_fmt[1] |= (4 << (3 * tex_count));
392 stream_loc_notcl[loc++] = 6 + tex_count;
393
394 /* Rasterize it. */
395 rX00_rs_tex(&rs, tex_count, tex_ptr, SWIZ_XYZW);
396 tex_count++;
397 tex_ptr += 4;
398 }
399 }
400 }
401
402 /* Rasterize texture coordinates. */
403 for (i = 0; i < ATTR_GENERIC_COUNT && tex_count < 8; i++) {
404 bool sprite_coord = !!(r300->sprite_coord_enable & (1 << i));
405
406 if (vs_outputs->generic[i] != ATTR_UNUSED || sprite_coord) {
407 if (!sprite_coord) {
408 /* Set up the texture coordinates in VAP. */
409 rs.vap_vsm_vtx_assm |= (R300_INPUT_CNTL_TC0 << tex_count);
410 rs.vap_out_vtx_fmt[1] |= (4 << (3 * tex_count));
411 stream_loc_notcl[loc++] = 6 + tex_count;
412 }
413
414 /* Rasterize it. */
415 rX00_rs_tex(&rs, tex_count, tex_ptr,
416 sprite_coord ? SWIZ_XY01 : SWIZ_XYZW);
417
418 /* Write it to the FS input register if it's needed by the FS. */
419 if (fs_inputs->generic[i] != ATTR_UNUSED) {
420 rX00_rs_tex_write(&rs, tex_count, fp_offset);
421 fp_offset++;
422
423 DBG(r300, DBG_RS,
424 "r300: Rasterized generic %i written to FS%s.\n",
425 i, sprite_coord ? " (sprite coord)" : "");
426 } else {
427 DBG(r300, DBG_RS,
428 "r300: Rasterized generic %i unused%s.\n",
429 i, sprite_coord ? " (sprite coord)" : "");
430 }
431 tex_count++;
432 tex_ptr += sprite_coord ? 2 : 4;
433 } else {
434 /* Skip the FS input register, leave it uninitialized. */
435 /* If we try to set it to (0,0,0,1), it will lock up. */
436 if (fs_inputs->generic[i] != ATTR_UNUSED) {
437 fp_offset++;
438
439 DBG(r300, DBG_RS, "r300: FS input generic %i unassigned%s.\n",
440 i, sprite_coord ? " (sprite coord)" : "");
441 }
442 }
443 }
444
445 /* Rasterize fog coordinates. */
446 if (vs_outputs->fog != ATTR_UNUSED && tex_count < 8) {
447 /* Set up the fog coordinates in VAP. */
448 rs.vap_vsm_vtx_assm |= (R300_INPUT_CNTL_TC0 << tex_count);
449 rs.vap_out_vtx_fmt[1] |= (4 << (3 * tex_count));
450 stream_loc_notcl[loc++] = 6 + tex_count;
451
452 /* Rasterize it. */
453 rX00_rs_tex(&rs, tex_count, tex_ptr, SWIZ_X001);
454
455 /* Write it to the FS input register if it's needed by the FS. */
456 if (fs_inputs->fog != ATTR_UNUSED) {
457 rX00_rs_tex_write(&rs, tex_count, fp_offset);
458 fp_offset++;
459
460 DBG(r300, DBG_RS, "r300: Rasterized fog written to FS.\n");
461 } else {
462 DBG(r300, DBG_RS, "r300: Rasterized fog unused.\n");
463 }
464 tex_count++;
465 tex_ptr += 4;
466 } else {
467 /* Skip the FS input register, leave it uninitialized. */
468 /* If we try to set it to (0,0,0,1), it will lock up. */
469 if (fs_inputs->fog != ATTR_UNUSED) {
470 fp_offset++;
471
472 DBG(r300, DBG_RS, "r300: FS input fog unassigned.\n");
473 }
474 }
475
476 /* Rasterize WPOS. */
477 /* Don't set it in VAP if the FS doesn't need it. */
478 if (fs_inputs->wpos != ATTR_UNUSED && tex_count < 8) {
479 /* Set up the WPOS coordinates in VAP. */
480 rs.vap_vsm_vtx_assm |= (R300_INPUT_CNTL_TC0 << tex_count);
481 rs.vap_out_vtx_fmt[1] |= (4 << (3 * tex_count));
482 stream_loc_notcl[loc++] = 6 + tex_count;
483
484 /* Rasterize it. */
485 rX00_rs_tex(&rs, tex_count, tex_ptr, SWIZ_XYZW);
486
487 /* Write it to the FS input register. */
488 rX00_rs_tex_write(&rs, tex_count, fp_offset);
489
490 DBG(r300, DBG_RS, "r300: Rasterized WPOS written to FS.\n");
491
492 fp_offset++;
493 tex_count++;
494 tex_ptr += 4;
495 }
496
497 /* Invalidate the rest of the no-TCL (GA) stream locations. */
498 for (; loc < 16;) {
499 stream_loc_notcl[loc++] = -1;
500 }
501
502 /* Rasterize at least one color, or bad things happen. */
503 if (col_count == 0 && tex_count == 0) {
504 rX00_rs_col(&rs, 0, 0, SWIZ_0001);
505 col_count++;
506
507 DBG(r300, DBG_RS, "r300: Rasterized color 0 to prevent lockups.\n");
508 }
509
510 DBG(r300, DBG_RS, "r300: --- Rasterizer status ---: colors: %i, "
511 "generics: %i.\n", col_count, tex_count);
512
513 rs.count = MIN2(tex_ptr, 32) | (col_count << R300_IC_COUNT_SHIFT) |
514 R300_HIRES_EN;
515
516 count = MAX3(col_count, tex_count, 1);
517 rs.inst_count = count - 1;
518
519 /* Now, after all that, see if we actually need to update the state. */
520 if (memcmp(r300->rs_block_state.state, &rs, sizeof(struct r300_rs_block))) {
521 memcpy(r300->rs_block_state.state, &rs, sizeof(struct r300_rs_block));
522 r300->rs_block_state.size = 11 + count*2;
523 }
524 }
525
526 static void r300_merge_textures_and_samplers(struct r300_context* r300)
527 {
528 struct r300_textures_state *state =
529 (struct r300_textures_state*)r300->textures_state.state;
530 struct r300_texture_sampler_state *texstate;
531 struct r300_sampler_state *sampler;
532 struct r300_sampler_view *view;
533 struct r300_texture *tex;
534 unsigned min_level, max_level, i, j, size;
535 unsigned count = MIN2(state->sampler_view_count,
536 state->sampler_state_count);
537
538 /* The KIL opcode fix, see below. */
539 if (!count && !r300->screen->caps.is_r500)
540 count = 1;
541
542 state->tx_enable = 0;
543 state->count = 0;
544 size = 2;
545
546 for (i = 0; i < count; i++) {
547 if (state->sampler_views[i] && state->sampler_states[i]) {
548 state->tx_enable |= 1 << i;
549
550 view = state->sampler_views[i];
551 tex = r300_texture(view->base.texture);
552 sampler = state->sampler_states[i];
553
554 texstate = &state->regs[i];
555 texstate->format = view->format;
556 texstate->filter0 = sampler->filter0;
557 texstate->filter1 = sampler->filter1;
558 texstate->border_color = sampler->border_color;
559
560 /* Assign a texture cache region. */
561 texstate->format.format1 |= view->texcache_region;
562
563 /* Depth textures are kinda special. */
564 if (util_format_is_depth_or_stencil(tex->desc.b.b.format)) {
565 unsigned char depth_swizzle[4];
566
567 if (!r300->screen->caps.is_r500 &&
568 util_format_get_blocksizebits(tex->desc.b.b.format) == 32) {
569 /* X24x8 is sampled as Y16X16 on r3xx-r4xx.
570 * The depth here is at the Y component. */
571 for (j = 0; j < 4; j++)
572 depth_swizzle[j] = UTIL_FORMAT_SWIZZLE_Y;
573 } else {
574 for (j = 0; j < 4; j++)
575 depth_swizzle[j] = UTIL_FORMAT_SWIZZLE_X;
576 }
577
578 /* If compare mode is disabled, sampler view swizzles
579 * are stored in the format.
580 * Otherwise, the swizzles must be applied after the compare
581 * mode in the fragment shader. */
582 if (sampler->state.compare_mode == PIPE_TEX_COMPARE_NONE) {
583 texstate->format.format1 |=
584 r300_get_swizzle_combined(depth_swizzle,
585 view->swizzle);
586 } else {
587 texstate->format.format1 |=
588 r300_get_swizzle_combined(depth_swizzle, 0);
589 }
590 }
591
592 /* to emulate 1D textures through 2D ones correctly */
593 if (tex->desc.b.b.target == PIPE_TEXTURE_1D) {
594 texstate->filter0 &= ~R300_TX_WRAP_T_MASK;
595 texstate->filter0 |= R300_TX_WRAP_T(R300_TX_CLAMP_TO_EDGE);
596 }
597
598 if (tex->desc.is_npot) {
599 /* NPOT textures don't support mip filter, unfortunately.
600 * This prevents incorrect rendering. */
601 texstate->filter0 &= ~R300_TX_MIN_FILTER_MIP_MASK;
602
603 /* Mask out the mirrored flag. */
604 if (texstate->filter0 & R300_TX_WRAP_S(R300_TX_MIRRORED)) {
605 texstate->filter0 &= ~R300_TX_WRAP_S(R300_TX_MIRRORED);
606 }
607 if (texstate->filter0 & R300_TX_WRAP_T(R300_TX_MIRRORED)) {
608 texstate->filter0 &= ~R300_TX_WRAP_T(R300_TX_MIRRORED);
609 }
610
611 /* Change repeat to clamp-to-edge.
612 * (the repeat bit has a value of 0, no masking needed). */
613 if ((texstate->filter0 & R300_TX_WRAP_S_MASK) ==
614 R300_TX_WRAP_S(R300_TX_REPEAT)) {
615 texstate->filter0 |= R300_TX_WRAP_S(R300_TX_CLAMP_TO_EDGE);
616 }
617 if ((texstate->filter0 & R300_TX_WRAP_T_MASK) ==
618 R300_TX_WRAP_T(R300_TX_REPEAT)) {
619 texstate->filter0 |= R300_TX_WRAP_T(R300_TX_CLAMP_TO_EDGE);
620 }
621 } else {
622 /* determine min/max levels */
623 /* the MAX_MIP level is the largest (finest) one */
624 max_level = MIN3(sampler->max_lod + view->base.first_level,
625 tex->desc.b.b.last_level, view->base.last_level);
626 min_level = MIN2(sampler->min_lod + view->base.first_level,
627 max_level);
628 texstate->format.format0 |= R300_TX_NUM_LEVELS(max_level);
629 texstate->filter0 |= R300_TX_MAX_MIP_LEVEL(min_level);
630 }
631
632 texstate->filter0 |= i << 28;
633
634 size += 16;
635 state->count = i+1;
636 } else {
637 /* For the KIL opcode to work on r3xx-r4xx, the texture unit
638 * assigned to this opcode (it's always the first one) must be
639 * enabled. Otherwise the opcode doesn't work.
640 *
641 * In order to not depend on the fragment shader, we just make
642 * the first unit enabled all the time. */
643 if (i == 0 && !r300->screen->caps.is_r500) {
644 pipe_sampler_view_reference(
645 (struct pipe_sampler_view**)&state->sampler_views[i],
646 &r300->texkill_sampler->base);
647
648 state->tx_enable |= 1 << i;
649
650 texstate = &state->regs[i];
651
652 /* Just set some valid state. */
653 texstate->format = r300->texkill_sampler->format;
654 texstate->filter0 =
655 r300_translate_tex_filters(PIPE_TEX_FILTER_NEAREST,
656 PIPE_TEX_FILTER_NEAREST,
657 PIPE_TEX_FILTER_NEAREST,
658 FALSE);
659 texstate->filter1 = 0;
660 texstate->border_color = 0;
661
662 texstate->filter0 |= i << 28;
663 size += 16;
664 state->count = i+1;
665 }
666 }
667 }
668
669 r300->textures_state.size = size;
670
671 /* Pick a fragment shader based on either the texture compare state
672 * or the uses_pitch flag. */
673 if (r300->fs.state && count) {
674 if (r300_pick_fragment_shader(r300)) {
675 r300_mark_fs_code_dirty(r300);
676 }
677 }
678 }
679
680 void r300_update_derived_state(struct r300_context* r300)
681 {
682 if (r300->textures_state.dirty) {
683 r300_merge_textures_and_samplers(r300);
684 }
685
686 if (r300->rs_block_state.dirty) {
687 r300_update_rs_block(r300);
688
689 if (r300->draw) {
690 memset(&r300->vertex_info, 0, sizeof(struct vertex_info));
691 r300_draw_emit_all_attribs(r300);
692 draw_compute_vertex_size(&r300->vertex_info);
693 r300_swtcl_vertex_psc(r300);
694 }
695 }
696
697 if (r300->rws->get_value(r300->rws, R300_CAN_HYPERZ))
698 r300_update_hyperz_state(r300);
699 }