2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
31 #include <util/u_double_list.h>
32 #include <pipe/p_compiler.h>
34 #define RADEON_CTX_MAX_PM4 (64 * 1024 / 4)
36 #define R600_ERR(fmt, args...) \
37 fprintf(stderr, "EE %s/%s:%d - "fmt, __FILE__, __func__, __LINE__, ##args)
101 enum radeon_family
r600_get_family(struct radeon
*rw
);
102 enum chip_class
r600_get_family_class(struct radeon
*radeon
);
106 struct radeon_ws_bo
*radeon_ws_bo(struct radeon
*radeon
,
107 unsigned size
, unsigned alignment
, unsigned usage
);
108 struct radeon_ws_bo
*radeon_ws_bo_handle(struct radeon
*radeon
,
110 void *radeon_ws_bo_map(struct radeon
*radeon
, struct radeon_ws_bo
*bo
, unsigned usage
, void *ctx
);
111 void radeon_ws_bo_unmap(struct radeon
*radeon
, struct radeon_ws_bo
*bo
);
112 void radeon_ws_bo_reference(struct radeon
*radeon
, struct radeon_ws_bo
**dst
,
113 struct radeon_ws_bo
*src
);
115 /* R600/R700 STATES */
116 #define R600_GROUP_MAX 16
117 #define R600_BLOCK_MAX_BO 32
118 #define R600_BLOCK_MAX_REG 128
121 R600_GROUP_CONFIG
= 0,
123 R600_GROUP_ALU_CONST
,
126 R600_GROUP_CTL_CONST
,
127 R600_GROUP_LOOP_CONST
,
128 R600_GROUP_BOOL_CONST
,
132 enum evergreen_group_id
{
133 EVERGREEN_GROUP_CONFIG
= 0,
134 EVERGREEN_GROUP_CONTEXT
,
135 EVERGREEN_GROUP_RESOURCE
,
136 EVERGREEN_GROUP_SAMPLER
,
137 EVERGREEN_GROUP_CTL_CONST
,
138 EVERGREEN_GROUP_LOOP_CONST
,
139 EVERGREEN_GROUP_BOOL_CONST
,
143 struct r600_pipe_reg
{
148 struct radeon_ws_bo
*bo
;
151 struct r600_pipe_state
{
154 struct r600_pipe_reg regs
[R600_BLOCK_MAX_REG
];
157 static inline void r600_pipe_state_add_reg(struct r600_pipe_state
*state
,
158 unsigned group_id
, u32 offset
,
160 struct radeon_ws_bo
*bo
)
162 state
->regs
[state
->nregs
].group_id
= group_id
;
163 state
->regs
[state
->nregs
].offset
= offset
;
164 state
->regs
[state
->nregs
].value
= value
;
165 state
->regs
[state
->nregs
].mask
= mask
;
166 state
->regs
[state
->nregs
].bo
= bo
;
168 assert(state
->nregs
< R600_BLOCK_MAX_REG
);
171 #define R600_BLOCK_STATUS_ENABLED (1 << 0)
172 #define R600_BLOCK_STATUS_DIRTY (1 << 1)
174 struct r600_block_reloc
{
175 struct radeon_ws_bo
*bo
;
177 unsigned bo_pm4_index
[R600_BLOCK_MAX_BO
];
180 struct r600_group_block
{
182 unsigned start_offset
;
183 unsigned pm4_ndwords
;
186 u32 pm4
[R600_BLOCK_MAX_REG
];
187 unsigned pm4_bo_index
[R600_BLOCK_MAX_REG
];
188 struct r600_block_reloc reloc
[R600_BLOCK_MAX_BO
];
192 unsigned start_offset
;
195 struct r600_group_block
*blocks
;
196 unsigned *offset_block_id
;
205 uint32_t read_domain
;
206 uint32_t write_domain
;
216 /* The kind of query. Currently only OQ is supported. */
218 /* How many results have been written, in dwords. It's incremented
219 * after end_query and flush. */
220 unsigned num_results
;
221 /* if we've flushed the query */
223 /* The buffer where query results are stored. */
224 struct radeon_ws_bo
*buffer
;
225 unsigned buffer_size
;
226 /* linked list of queries */
227 struct list_head list
;
230 #define R600_QUERY_STATE_STARTED (1 << 0)
231 #define R600_QUERY_STATE_ENDED (1 << 1)
232 #define R600_QUERY_STATE_SUSPENDED (1 << 2)
235 struct r600_context
{
236 struct radeon
*radeon
;
238 struct r600_group groups
[R600_GROUP_MAX
];
239 unsigned pm4_ndwords
;
240 unsigned pm4_cdwords
;
241 unsigned pm4_dirty_cdwords
;
242 unsigned ctx_pm4_ndwords
;
245 struct r600_reloc
*reloc
;
246 struct radeon_bo
**bo
;
248 struct list_head query_list
;
253 u32 vgt_num_instances
;
255 u32 vgt_draw_initiator
;
256 u32 indices_bo_offset
;
257 struct radeon_ws_bo
*indices
;
260 int r600_context_init(struct r600_context
*ctx
, struct radeon
*radeon
);
261 void r600_context_fini(struct r600_context
*ctx
);
262 void r600_context_pipe_state_set(struct r600_context
*ctx
, struct r600_pipe_state
*state
);
263 void r600_context_pipe_state_set_ps_resource(struct r600_context
*ctx
, struct r600_pipe_state
*state
, unsigned rid
);
264 void r600_context_pipe_state_set_vs_resource(struct r600_context
*ctx
, struct r600_pipe_state
*state
, unsigned rid
);
265 void r600_context_pipe_state_set_ps_sampler(struct r600_context
*ctx
, struct r600_pipe_state
*state
, unsigned id
);
266 void r600_context_pipe_state_set_vs_sampler(struct r600_context
*ctx
, struct r600_pipe_state
*state
, unsigned id
);
267 void r600_context_flush(struct r600_context
*ctx
);
268 void r600_context_dump_bof(struct r600_context
*ctx
, const char *file
);
269 void r600_context_draw(struct r600_context
*ctx
, const struct r600_draw
*draw
);
271 struct r600_query
*r600_context_query_create(struct r600_context
*ctx
, unsigned query_type
);
272 void r600_context_query_destroy(struct r600_context
*ctx
, struct r600_query
*query
);
273 boolean
r600_context_query_result(struct r600_context
*ctx
,
274 struct r600_query
*query
,
275 boolean wait
, void *vresult
);
276 void r600_query_begin(struct r600_context
*ctx
, struct r600_query
*query
);
277 void r600_query_end(struct r600_context
*ctx
, struct r600_query
*query
);
279 int evergreen_context_init(struct r600_context
*ctx
, struct radeon
*radeon
);
280 void evergreen_context_draw(struct r600_context
*ctx
, const struct r600_draw
*draw
);
281 void evergreen_ps_resource_set(struct r600_context
*ctx
, struct r600_pipe_state
*state
, unsigned rid
);
282 void evergreen_vs_resource_set(struct r600_context
*ctx
, struct r600_pipe_state
*state
, unsigned rid
);