src/gallium/drivers/r600/r600_screen.c

   1 /*
   2  * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Jerome Glisse
  25  *      Corbin Simpson
  26  */
  27 #include <stdio.h>
  28 #include "util/u_inlines.h"
  29 #include "util/u_format.h"
  30 #include "util/u_memory.h"
  31 #include "r600_screen.h"
  32 #include "r600_context.h"
  33 #include "r600_public.h"
  34 #include "r600_resource.h"
  35 #include "r600_state_inlines.h"
  36
  37 static const char* r600_get_vendor(struct pipe_screen* pscreen)
  38 {
  39         return "X.Org";
  40 }
  41
  42 static const char* r600_get_name(struct pipe_screen* pscreen)
  43 {
  44         struct r600_screen *screen = r600_screen(pscreen);
  45         enum radeon_family family = radeon_get_family(screen->rw);
  46
  47         if (family >= CHIP_R600 && family < CHIP_RV770)
  48                 return "R600 (HD2XXX,HD3XXX)";
  49         else
  50                 return "R700 (HD4XXX)";
  51 }
  52
  53 static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
  54 {
  55         switch (param) {
  56         /* Supported features (boolean caps). */
  57         case PIPE_CAP_NPOT_TEXTURES:
  58         case PIPE_CAP_TWO_SIDED_STENCIL:
  59         case PIPE_CAP_GLSL:
  60         case PIPE_CAP_DUAL_SOURCE_BLEND:
  61         case PIPE_CAP_ANISOTROPIC_FILTER:
  62         case PIPE_CAP_POINT_SPRITE:
  63         case PIPE_CAP_OCCLUSION_QUERY:
  64         case PIPE_CAP_TEXTURE_SHADOW_MAP:
  65         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
  66         case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
  67         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
  68         case PIPE_CAP_SM3:
  69         case PIPE_CAP_TEXTURE_SWIZZLE:
  70         case PIPE_CAP_INDEP_BLEND_ENABLE:
  71         case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
  72         case PIPE_CAP_DEPTH_CLAMP:
  73                 return 1;
  74
  75         /* Unsupported features (boolean caps). */
  76         case PIPE_CAP_TIMER_QUERY:
  77         case PIPE_CAP_TGSI_CONT_SUPPORTED:
  78         case PIPE_CAP_STREAM_OUTPUT:
  79         case PIPE_CAP_INDEP_BLEND_FUNC: /* FIXME allow this */
  80         case PIPE_CAP_GEOMETRY_SHADER4:
  81                 return 0;
  82
  83         /* Texturing. */
  84         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
  85         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
  86         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
  87                 return 14;
  88         case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
  89                 /* FIXME allow this once infrastructure is there */
  90                 return 0;
  91         case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
  92         case PIPE_CAP_MAX_COMBINED_SAMPLERS:
  93                 return 16;
  94
  95         /* Render targets. */
  96         case PIPE_CAP_MAX_RENDER_TARGETS:
  97                 /* FIXME some r6xx are buggy and can only do 4 */
  98                 return 8;
  99
 100         /* Fragment coordinate conventions. */
 101         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 102         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 103                 return 1;
 104         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 105         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 106                 return 0;
 107
 108         /* Shader limits. */
 109         case PIPE_CAP_MAX_VS_INSTRUCTIONS:
 110                 return 16384;  //max native instructions, not greater than max instructions
 111         case PIPE_CAP_MAX_VS_ALU_INSTRUCTIONS:
 112         case PIPE_CAP_MAX_VS_TEX_INSTRUCTIONS:
 113         case PIPE_CAP_MAX_VS_TEX_INDIRECTIONS:
 114                 return 16384;
 115         case PIPE_CAP_MAX_FS_INSTRUCTIONS:
 116                 return 16384; //max program native instructions
 117         case PIPE_CAP_MAX_FS_ALU_INSTRUCTIONS:
 118                 return 16384; //max program native ALU instructions
 119         case PIPE_CAP_MAX_FS_TEX_INSTRUCTIONS:
 120                 return 16384; //max program native texture instructions
 121         case PIPE_CAP_MAX_FS_TEX_INDIRECTIONS:
 122                 return 2048; //max program native texture indirections
 123         case PIPE_CAP_MAX_VS_CONTROL_FLOW_DEPTH:
 124         case PIPE_CAP_MAX_FS_CONTROL_FLOW_DEPTH:
 125                 return 8; /* FIXME */
 126         case PIPE_CAP_MAX_VS_INPUTS:
 127                 return 16; //max native attributes
 128         case PIPE_CAP_MAX_FS_INPUTS:
 129                 return 10; //max native attributes
 130         case PIPE_CAP_MAX_VS_TEMPS:
 131                 return 256; //max native temporaries
 132         case PIPE_CAP_MAX_FS_TEMPS:
 133                 return 256; //max native temporaries
 134         case PIPE_CAP_MAX_VS_ADDRS:
 135         case PIPE_CAP_MAX_FS_ADDRS:
 136                 return 1; //max native address registers/* FIXME Isn't this equal to TEMPS? */
 137         case PIPE_CAP_MAX_VS_CONSTS:
 138                 return 256; //max native parameters
 139         case PIPE_CAP_MAX_FS_CONSTS:
 140                 return 256; //max program native parameters
 141         case PIPE_CAP_MAX_CONST_BUFFERS:
 142                 return 1;
 143         case PIPE_CAP_MAX_CONST_BUFFER_SIZE: /* in bytes */
 144                 return 4096;
 145         case PIPE_CAP_MAX_PREDICATE_REGISTERS:
 146         case PIPE_CAP_MAX_VS_PREDS:
 147         case PIPE_CAP_MAX_FS_PREDS:
 148                 return 0; /* FIXME */
 149
 150         default:
 151                 R600_ERR("r600: unknown param %d\n", param);
 152                 return 0;
 153         }
 154 }
 155
 156 static float r600_get_paramf(struct pipe_screen* pscreen, enum pipe_cap param)
 157 {
 158         switch (param) {
 159         case PIPE_CAP_MAX_LINE_WIDTH:
 160         case PIPE_CAP_MAX_LINE_WIDTH_AA:
 161         case PIPE_CAP_MAX_POINT_WIDTH:
 162         case PIPE_CAP_MAX_POINT_WIDTH_AA:
 163                 return 8192.0f;
 164         case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
 165                 return 16.0f;
 166         case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
 167                 return 16.0f;
 168         default:
 169                 R600_ERR("r600: unsupported paramf %d\n", param);
 170                 return 0.0f;
 171         }
 172 }
 173
 174 static boolean r600_is_format_supported(struct pipe_screen* screen,
 175                                         enum pipe_format format,
 176                                         enum pipe_texture_target target,
 177                                         unsigned sample_count,
 178                                         unsigned usage,
 179                                         unsigned geom_flags)
 180 {
 181         unsigned retval = 0;
 182         if (target >= PIPE_MAX_TEXTURE_TYPES) {
 183                 R600_ERR("r600: unsupported texture type %d\n", target);
 184                 return FALSE;
 185         }
 186
 187         /* Multisample */
 188         if (sample_count > 1)
 189                 return FALSE;
 190
 191         if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 192             r600_is_sampler_format_supported(format)) {
 193                 retval |= PIPE_BIND_SAMPLER_VIEW;
 194         }
 195
 196         if ((usage & (PIPE_BIND_RENDER_TARGET |
 197                   PIPE_BIND_DISPLAY_TARGET |
 198                   PIPE_BIND_SCANOUT |
 199                   PIPE_BIND_SHARED)) &&
 200             r600_is_colorbuffer_format_supported(format)) {
 201                 retval |= usage &
 202                         (PIPE_BIND_RENDER_TARGET |
 203                          PIPE_BIND_DISPLAY_TARGET |
 204                          PIPE_BIND_SCANOUT |
 205                          PIPE_BIND_SHARED);
 206         }
 207
 208         if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
 209             r600_is_zs_format_supported(format)) {
 210                 retval |= PIPE_BIND_DEPTH_STENCIL;
 211         }
 212
 213         if ((usage & PIPE_BIND_VERTEX_BUFFER) &&
 214             r600_is_vertex_format_supported(format))
 215                 retval |= PIPE_BIND_VERTEX_BUFFER;
 216
 217         if (usage & PIPE_BIND_TRANSFER_READ)
 218                 retval |= PIPE_BIND_TRANSFER_READ;
 219         if (usage & PIPE_BIND_TRANSFER_WRITE)
 220                 retval |= PIPE_BIND_TRANSFER_WRITE;
 221
 222         return retval == usage;
 223 }
 224
 225 static void r600_destroy_screen(struct pipe_screen* pscreen)
 226 {
 227         struct r600_screen* rscreen = r600_screen(pscreen);
 228
 229         if (rscreen == NULL)
 230                 return;
 231         FREE(rscreen);
 232 }
 233
 234 struct pipe_screen *r600_screen_create(struct radeon *rw)
 235 {
 236         struct r600_screen* rscreen;
 237         enum radeon_family family = radeon_get_family(rw);
 238
 239         rscreen = CALLOC_STRUCT(r600_screen);
 240         if (rscreen == NULL) {
 241                 return NULL;
 242         }
 243
 244         /* don't enable mem constant for r600 yet */
 245         rscreen->use_mem_constant = FALSE;
 246
 247         switch (family) {
 248         case CHIP_R600:
 249         case CHIP_RV610:
 250         case CHIP_RV630:
 251         case CHIP_RV670:
 252         case CHIP_RV620:
 253         case CHIP_RV635:
 254         case CHIP_RS780:
 255         case CHIP_RS880:
 256                 rscreen->chip_class = R600;
 257                 break;
 258         case CHIP_RV770:
 259         case CHIP_RV730:
 260         case CHIP_RV710:
 261         case CHIP_RV740:
 262                 rscreen->chip_class = R700;
 263                 break;
 264         default:
 265                 FREE(rscreen);
 266                 return NULL;
 267         }
 268         rscreen->rw = rw;
 269         rscreen->screen.winsys = (struct pipe_winsys*)rw;
 270         rscreen->screen.destroy = r600_destroy_screen;
 271         rscreen->screen.get_name = r600_get_name;
 272         rscreen->screen.get_vendor = r600_get_vendor;
 273         rscreen->screen.get_param = r600_get_param;
 274         rscreen->screen.get_paramf = r600_get_paramf;
 275         rscreen->screen.is_format_supported = r600_is_format_supported;
 276         rscreen->screen.context_create = r600_create_context;
 277         r600_init_screen_texture_functions(&rscreen->screen);
 278         r600_init_screen_resource_functions(rscreen);
 279         return &rscreen->screen;
 280 }