r600g: drop width/height per level storage.
[mesa.git] / src / gallium / drivers / r600 / r600_texture.c
1 /*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Jerome Glisse
25 * Corbin Simpson
26 */
27 #include <errno.h>
28 #include <pipe/p_screen.h>
29 #include <util/u_format.h>
30 #include <util/u_math.h>
31 #include <util/u_inlines.h>
32 #include <util/u_memory.h>
33 #include "state_tracker/drm_driver.h"
34 #include "r600_pipe.h"
35 #include "r600_resource.h"
36 #include "r600_state_inlines.h"
37 #include "r600d.h"
38
39 extern struct u_resource_vtbl r600_texture_vtbl;
40
41 /* Copy from a tiled texture to a detiled one. */
42 static void r600_copy_from_tiled_texture(struct pipe_context *ctx, struct r600_transfer *rtransfer)
43 {
44 struct pipe_transfer *transfer = (struct pipe_transfer*)rtransfer;
45 struct pipe_resource *texture = transfer->resource;
46 struct pipe_subresource subdst;
47
48 subdst.face = 0;
49 subdst.level = 0;
50 ctx->resource_copy_region(ctx, rtransfer->linear_texture,
51 subdst, 0, 0, 0, texture, transfer->sr,
52 transfer->box.x, transfer->box.y, transfer->box.z,
53 transfer->box.width, transfer->box.height);
54 }
55
56 static unsigned long r600_texture_get_offset(struct r600_resource_texture *rtex,
57 unsigned level, unsigned zslice,
58 unsigned face)
59 {
60 unsigned long offset = rtex->offset[level];
61
62 switch (rtex->resource.base.b.target) {
63 case PIPE_TEXTURE_3D:
64 assert(face == 0);
65 return offset + zslice * rtex->layer_size[level];
66 case PIPE_TEXTURE_CUBE:
67 assert(zslice == 0);
68 return offset + face * rtex->layer_size[level];
69 default:
70 assert(zslice == 0 && face == 0);
71 return offset;
72 }
73 }
74
75 static void r600_setup_miptree(struct r600_resource_texture *rtex, enum chip_class chipc)
76 {
77 struct pipe_resource *ptex = &rtex->resource.base.b;
78 unsigned long w, h, pitch, size, layer_size, i, offset;
79
80 rtex->bpt = util_format_get_blocksize(ptex->format);
81 for (i = 0, offset = 0; i <= ptex->last_level; i++) {
82 w = u_minify(ptex->width0, i);
83 h = u_minify(ptex->height0, i);
84 h = util_next_power_of_two(h);
85 pitch = util_format_get_stride(ptex->format, align(w, 64));
86 if (chipc == EVERGREEN)
87 pitch = align(pitch, 512);
88 else
89 pitch = align(pitch, 256);
90 layer_size = pitch * h;
91 if (ptex->target == PIPE_TEXTURE_CUBE) {
92 if (chipc >= R700)
93 size = layer_size * 8;
94 else
95 size = layer_size * 6;
96 }
97 else
98 size = layer_size * u_minify(ptex->depth0, i);
99 rtex->offset[i] = offset;
100 rtex->layer_size[i] = layer_size;
101 rtex->pitch[i] = pitch;
102 offset += size;
103 }
104 rtex->size = offset;
105 }
106
107 struct pipe_resource *r600_texture_create(struct pipe_screen *screen,
108 const struct pipe_resource *templ)
109 {
110 struct r600_resource_texture *rtex;
111 struct r600_resource *resource;
112 struct radeon *radeon = (struct radeon *)screen->winsys;
113
114 rtex = CALLOC_STRUCT(r600_resource_texture);
115 if (!rtex) {
116 return NULL;
117 }
118 resource = &rtex->resource;
119 resource->base.b = *templ;
120 resource->base.vtbl = &r600_texture_vtbl;
121 pipe_reference_init(&resource->base.b.reference, 1);
122 resource->base.b.screen = screen;
123 r600_setup_miptree(rtex, r600_get_family_class(radeon));
124
125 /* FIXME alignment 4096 enought ? too much ? */
126 resource->domain = r600_domain_from_usage(resource->base.b.bind);
127 resource->size = rtex->size;
128 resource->bo = r600_bo(radeon, rtex->size, 4096, 0);
129 if (resource->bo == NULL) {
130 FREE(rtex);
131 return NULL;
132 }
133 return &resource->base.b;
134 }
135
136 static void r600_texture_destroy(struct pipe_screen *screen,
137 struct pipe_resource *ptex)
138 {
139 struct r600_resource_texture *rtex = (struct r600_resource_texture*)ptex;
140 struct r600_resource *resource = &rtex->resource;
141 struct radeon *radeon = (struct radeon *)screen->winsys;
142
143 if (rtex->flushed_depth_texture)
144 pipe_resource_reference((struct pipe_resource **)&rtex->flushed_depth_texture, NULL);
145
146 if (resource->bo) {
147 r600_bo_reference(radeon, &resource->bo, NULL);
148 }
149 FREE(rtex);
150 }
151
152 static struct pipe_surface *r600_get_tex_surface(struct pipe_screen *screen,
153 struct pipe_resource *texture,
154 unsigned face, unsigned level,
155 unsigned zslice, unsigned flags)
156 {
157 struct r600_resource_texture *rtex = (struct r600_resource_texture*)texture;
158 struct pipe_surface *surface = CALLOC_STRUCT(pipe_surface);
159 unsigned long offset;
160
161 if (surface == NULL)
162 return NULL;
163 offset = r600_texture_get_offset(rtex, level, zslice, face);
164 pipe_reference_init(&surface->reference, 1);
165 pipe_resource_reference(&surface->texture, texture);
166 surface->format = texture->format;
167 surface->width = u_minify(texture->width0, level);
168 surface->height = u_minify(texture->height0, level);
169 surface->offset = offset;
170 surface->usage = flags;
171 surface->zslice = zslice;
172 surface->texture = texture;
173 surface->face = face;
174 surface->level = level;
175 return surface;
176 }
177
178 static void r600_tex_surface_destroy(struct pipe_surface *surface)
179 {
180 pipe_resource_reference(&surface->texture, NULL);
181 FREE(surface);
182 }
183
184 struct pipe_resource *r600_texture_from_handle(struct pipe_screen *screen,
185 const struct pipe_resource *templ,
186 struct winsys_handle *whandle)
187 {
188 struct radeon *rw = (struct radeon*)screen->winsys;
189 struct r600_resource_texture *rtex;
190 struct r600_resource *resource;
191 struct r600_bo *bo = NULL;
192
193 /* Support only 2D textures without mipmaps */
194 if ((templ->target != PIPE_TEXTURE_2D && templ->target != PIPE_TEXTURE_RECT) ||
195 templ->depth0 != 1 || templ->last_level != 0)
196 return NULL;
197
198 rtex = CALLOC_STRUCT(r600_resource_texture);
199 if (rtex == NULL)
200 return NULL;
201
202 bo = r600_bo_handle(rw, whandle->handle);
203 if (bo == NULL) {
204 FREE(rtex);
205 return NULL;
206 }
207
208 resource = &rtex->resource;
209 resource->base.b = *templ;
210 resource->base.vtbl = &r600_texture_vtbl;
211 pipe_reference_init(&resource->base.b.reference, 1);
212 resource->base.b.screen = screen;
213 resource->bo = bo;
214 rtex->depth = 0;
215 rtex->pitch_override = whandle->stride;
216 rtex->bpt = util_format_get_blocksize(templ->format);
217 rtex->pitch[0] = whandle->stride;
218 rtex->offset[0] = 0;
219 rtex->size = align(rtex->pitch[0] * templ->height0, 64);
220
221 return &resource->base.b;
222 }
223
224 static unsigned int r600_texture_is_referenced(struct pipe_context *context,
225 struct pipe_resource *texture,
226 unsigned face, unsigned level)
227 {
228 /* FIXME */
229 return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE;
230 }
231
232 int (*r600_blit_uncompress_depth_ptr)(struct pipe_context *ctx, struct r600_resource_texture *texture);
233
234 int r600_texture_depth_flush(struct pipe_context *ctx,
235 struct pipe_resource *texture)
236 {
237 struct r600_resource_texture *rtex = (struct r600_resource_texture*)texture;
238 struct pipe_resource resource;
239
240 if (rtex->flushed_depth_texture)
241 goto out;
242
243 resource.target = PIPE_TEXTURE_2D;
244 resource.format = texture->format;
245 resource.width0 = texture->width0;
246 resource.height0 = texture->height0;
247 resource.depth0 = 0;
248 resource.last_level = 0;
249 resource.nr_samples = 0;
250 resource.usage = PIPE_USAGE_DYNAMIC;
251 resource.bind = 0;
252 resource.flags = 0;
253
254 resource.bind |= PIPE_BIND_RENDER_TARGET;
255
256 rtex->flushed_depth_texture = (struct r600_resource_texture *)ctx->screen->resource_create(ctx->screen, &resource);
257 if (rtex->flushed_depth_texture == NULL) {
258 R600_ERR("failed to create temporary texture to hold untiled copy\n");
259 return -ENOMEM;
260 }
261
262 out:
263 r600_blit_uncompress_depth_ptr(ctx, rtex);
264 return 0;
265 }
266
267 struct pipe_transfer* r600_texture_get_transfer(struct pipe_context *ctx,
268 struct pipe_resource *texture,
269 struct pipe_subresource sr,
270 unsigned usage,
271 const struct pipe_box *box)
272 {
273 struct r600_resource_texture *rtex = (struct r600_resource_texture*)texture;
274 struct pipe_resource resource;
275 struct r600_transfer *trans;
276 int r;
277
278 trans = CALLOC_STRUCT(r600_transfer);
279 if (trans == NULL)
280 return NULL;
281 pipe_resource_reference(&trans->transfer.resource, texture);
282 trans->transfer.sr = sr;
283 trans->transfer.usage = usage;
284 trans->transfer.box = *box;
285 trans->transfer.stride = rtex->pitch[sr.level];
286 trans->offset = r600_texture_get_offset(rtex, sr.level, box->z, sr.face);
287 if (rtex->depth) {
288 r = r600_texture_depth_flush(ctx, texture);
289 if (r < 0) {
290 R600_ERR("failed to create temporary texture to hold untiled copy\n");
291 pipe_resource_reference(&trans->transfer.resource, NULL);
292 FREE(trans);
293 return NULL;
294 }
295 } else if (rtex->tiled) {
296 resource.target = PIPE_TEXTURE_2D;
297 resource.format = texture->format;
298 resource.width0 = box->width;
299 resource.height0 = box->height;
300 resource.depth0 = 0;
301 resource.last_level = 0;
302 resource.nr_samples = 0;
303 resource.usage = PIPE_USAGE_DYNAMIC;
304 resource.bind = 0;
305 resource.flags = 0;
306 /* For texture reading, the temporary (detiled) texture is used as
307 * a render target when blitting from a tiled texture. */
308 if (usage & PIPE_TRANSFER_READ) {
309 resource.bind |= PIPE_BIND_RENDER_TARGET;
310 }
311 /* For texture writing, the temporary texture is used as a sampler
312 * when blitting into a tiled texture. */
313 if (usage & PIPE_TRANSFER_WRITE) {
314 resource.bind |= PIPE_BIND_SAMPLER_VIEW;
315 }
316 /* Create the temporary texture. */
317 trans->linear_texture = ctx->screen->resource_create(ctx->screen, &resource);
318 if (trans->linear_texture == NULL) {
319 R600_ERR("failed to create temporary texture to hold untiled copy\n");
320 pipe_resource_reference(&trans->transfer.resource, NULL);
321 FREE(trans);
322 return NULL;
323 }
324 if (usage & PIPE_TRANSFER_READ) {
325 /* We cannot map a tiled texture directly because the data is
326 * in a different order, therefore we do detiling using a blit. */
327 r600_copy_from_tiled_texture(ctx, trans);
328 /* Always referenced in the blit. */
329 ctx->flush(ctx, 0, NULL);
330 }
331 }
332 return &trans->transfer;
333 }
334
335 void r600_texture_transfer_destroy(struct pipe_context *ctx,
336 struct pipe_transfer *transfer)
337 {
338 struct r600_transfer *rtransfer = (struct r600_transfer*)transfer;
339 struct r600_resource_texture *rtex = (struct r600_resource_texture*)transfer->resource;
340
341 if (rtransfer->linear_texture) {
342 pipe_resource_reference(&rtransfer->linear_texture, NULL);
343 }
344 if (rtex->flushed_depth_texture) {
345 if (transfer->usage & PIPE_TRANSFER_WRITE) {
346 // TODO
347 }
348 pipe_resource_reference((struct pipe_resource **)&rtex->flushed_depth_texture, NULL);
349 }
350 pipe_resource_reference(&transfer->resource, NULL);
351 FREE(transfer);
352 }
353
354 void* r600_texture_transfer_map(struct pipe_context *ctx,
355 struct pipe_transfer* transfer)
356 {
357 struct r600_transfer *rtransfer = (struct r600_transfer*)transfer;
358 struct r600_bo *bo;
359 enum pipe_format format = transfer->resource->format;
360 struct radeon *radeon = (struct radeon *)ctx->screen->winsys;
361 unsigned long offset = 0;
362 char *map;
363
364 if (rtransfer->linear_texture) {
365 bo = ((struct r600_resource *)rtransfer->linear_texture)->bo;
366 } else {
367 struct r600_resource_texture *rtex = (struct r600_resource_texture*)transfer->resource;
368
369 if (rtex->flushed_depth_texture)
370 bo = ((struct r600_resource *)rtex->flushed_depth_texture)->bo;
371 else
372 bo = ((struct r600_resource *)transfer->resource)->bo;
373
374 offset = rtransfer->offset +
375 transfer->box.y / util_format_get_blockheight(format) * transfer->stride +
376 transfer->box.x / util_format_get_blockwidth(format) * util_format_get_blocksize(format);
377 }
378 map = r600_bo_map(radeon, bo, 0, ctx);
379 if (!map) {
380 return NULL;
381 }
382
383 return map + offset;
384 }
385
386 void r600_texture_transfer_unmap(struct pipe_context *ctx,
387 struct pipe_transfer* transfer)
388 {
389 struct r600_transfer *rtransfer = (struct r600_transfer*)transfer;
390 struct radeon *radeon = (struct radeon *)ctx->screen->winsys;
391 struct r600_bo *bo;
392
393 if (rtransfer->linear_texture) {
394 bo = ((struct r600_resource *)rtransfer->linear_texture)->bo;
395 } else {
396 struct r600_resource_texture *rtex = (struct r600_resource_texture*)transfer->resource;
397
398 if (rtex->flushed_depth_texture) {
399 bo = ((struct r600_resource *)rtex->flushed_depth_texture)->bo;
400 } else {
401 bo = ((struct r600_resource *)transfer->resource)->bo;
402 }
403 }
404 r600_bo_unmap(radeon, bo);
405 }
406
407 struct u_resource_vtbl r600_texture_vtbl =
408 {
409 u_default_resource_get_handle, /* get_handle */
410 r600_texture_destroy, /* resource_destroy */
411 r600_texture_is_referenced, /* is_resource_referenced */
412 r600_texture_get_transfer, /* get_transfer */
413 r600_texture_transfer_destroy, /* transfer_destroy */
414 r600_texture_transfer_map, /* transfer_map */
415 u_default_transfer_flush_region,/* transfer_flush_region */
416 r600_texture_transfer_unmap, /* transfer_unmap */
417 u_default_transfer_inline_write /* transfer_inline_write */
418 };
419
420 void r600_init_screen_texture_functions(struct pipe_screen *screen)
421 {
422 screen->get_tex_surface = r600_get_tex_surface;
423 screen->tex_surface_destroy = r600_tex_surface_destroy;
424 }
425
426 static unsigned r600_get_swizzle_combined(const unsigned char *swizzle_format,
427 const unsigned char *swizzle_view)
428 {
429 unsigned i;
430 unsigned char swizzle[4];
431 unsigned result = 0;
432 const uint32_t swizzle_shift[4] = {
433 16, 19, 22, 25,
434 };
435 const uint32_t swizzle_bit[4] = {
436 0, 1, 2, 3,
437 };
438
439 if (swizzle_view) {
440 /* Combine two sets of swizzles. */
441 for (i = 0; i < 4; i++) {
442 swizzle[i] = swizzle_view[i] <= UTIL_FORMAT_SWIZZLE_W ?
443 swizzle_format[swizzle_view[i]] : swizzle_view[i];
444 }
445 } else {
446 memcpy(swizzle, swizzle_format, 4);
447 }
448
449 /* Get swizzle. */
450 for (i = 0; i < 4; i++) {
451 switch (swizzle[i]) {
452 case UTIL_FORMAT_SWIZZLE_Y:
453 result |= swizzle_bit[1] << swizzle_shift[i];
454 break;
455 case UTIL_FORMAT_SWIZZLE_Z:
456 result |= swizzle_bit[2] << swizzle_shift[i];
457 break;
458 case UTIL_FORMAT_SWIZZLE_W:
459 result |= swizzle_bit[3] << swizzle_shift[i];
460 break;
461 case UTIL_FORMAT_SWIZZLE_0:
462 result |= V_038010_SQ_SEL_0 << swizzle_shift[i];
463 break;
464 case UTIL_FORMAT_SWIZZLE_1:
465 result |= V_038010_SQ_SEL_1 << swizzle_shift[i];
466 break;
467 default: /* UTIL_FORMAT_SWIZZLE_X */
468 result |= swizzle_bit[0] << swizzle_shift[i];
469 }
470 }
471 return result;
472 }
473
474 /* texture format translate */
475 uint32_t r600_translate_texformat(enum pipe_format format,
476 const unsigned char *swizzle_view,
477 uint32_t *word4_p, uint32_t *yuv_format_p)
478 {
479 uint32_t result = 0, word4 = 0, yuv_format = 0;
480 const struct util_format_description *desc;
481 boolean uniform = TRUE;
482 int i;
483 const uint32_t sign_bit[4] = {
484 S_038010_FORMAT_COMP_X(V_038010_SQ_FORMAT_COMP_SIGNED),
485 S_038010_FORMAT_COMP_Y(V_038010_SQ_FORMAT_COMP_SIGNED),
486 S_038010_FORMAT_COMP_Z(V_038010_SQ_FORMAT_COMP_SIGNED),
487 S_038010_FORMAT_COMP_W(V_038010_SQ_FORMAT_COMP_SIGNED)
488 };
489 desc = util_format_description(format);
490
491 word4 |= r600_get_swizzle_combined(desc->swizzle, swizzle_view);
492
493 /* Colorspace (return non-RGB formats directly). */
494 switch (desc->colorspace) {
495 /* Depth stencil formats */
496 case UTIL_FORMAT_COLORSPACE_ZS:
497 switch (format) {
498 case PIPE_FORMAT_Z16_UNORM:
499 result = V_0280A0_COLOR_16;
500 goto out_word4;
501 case PIPE_FORMAT_Z24X8_UNORM:
502 case PIPE_FORMAT_Z24_UNORM_S8_USCALED:
503 result = V_0280A0_COLOR_8_24;
504 goto out_word4;
505 case PIPE_FORMAT_X8Z24_UNORM:
506 case PIPE_FORMAT_S8_USCALED_Z24_UNORM:
507 result = V_0280A0_COLOR_24_8;
508 goto out_word4;
509 default:
510 goto out_unknown;
511 }
512
513 case UTIL_FORMAT_COLORSPACE_YUV:
514 yuv_format |= (1 << 30);
515 switch (format) {
516 case PIPE_FORMAT_UYVY:
517 case PIPE_FORMAT_YUYV:
518 default:
519 break;
520 }
521 goto out_unknown; /* TODO */
522
523 case UTIL_FORMAT_COLORSPACE_SRGB:
524 word4 |= S_038010_FORCE_DEGAMMA(1);
525 if (format == PIPE_FORMAT_L8A8_SRGB || format == PIPE_FORMAT_L8_SRGB)
526 goto out_unknown; /* fails for some reason - TODO */
527 break;
528
529 default:
530 break;
531 }
532
533 /* S3TC formats. TODO */
534 if (desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {
535 goto out_unknown;
536 }
537
538
539 for (i = 0; i < desc->nr_channels; i++) {
540 if (desc->channel[i].type == UTIL_FORMAT_TYPE_SIGNED) {
541 word4 |= sign_bit[i];
542 }
543 }
544
545 /* R8G8Bx_SNORM - TODO CxV8U8 */
546
547 /* RGTC - TODO */
548
549 /* See whether the components are of the same size. */
550 for (i = 1; i < desc->nr_channels; i++) {
551 uniform = uniform && desc->channel[0].size == desc->channel[i].size;
552 }
553
554 /* Non-uniform formats. */
555 if (!uniform) {
556 switch(desc->nr_channels) {
557 case 3:
558 if (desc->channel[0].size == 5 &&
559 desc->channel[1].size == 6 &&
560 desc->channel[2].size == 5) {
561 result = V_0280A0_COLOR_5_6_5;
562 goto out_word4;
563 }
564 goto out_unknown;
565 case 4:
566 if (desc->channel[0].size == 5 &&
567 desc->channel[1].size == 5 &&
568 desc->channel[2].size == 5 &&
569 desc->channel[3].size == 1) {
570 result = V_0280A0_COLOR_1_5_5_5;
571 goto out_word4;
572 }
573 if (desc->channel[0].size == 10 &&
574 desc->channel[1].size == 10 &&
575 desc->channel[2].size == 10 &&
576 desc->channel[3].size == 2) {
577 result = V_0280A0_COLOR_10_10_10_2;
578 goto out_word4;
579 }
580 goto out_unknown;
581 }
582 goto out_unknown;
583 }
584
585 /* Find the first non-VOID channel. */
586 for (i = 0; i < 4; i++) {
587 if (desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
588 break;
589 }
590 }
591
592 if (i == 4)
593 goto out_unknown;
594
595 /* uniform formats */
596 switch (desc->channel[i].type) {
597 case UTIL_FORMAT_TYPE_UNSIGNED:
598 case UTIL_FORMAT_TYPE_SIGNED:
599 if (!desc->channel[i].normalized &&
600 desc->colorspace != UTIL_FORMAT_COLORSPACE_SRGB) {
601 goto out_unknown;
602 }
603
604 switch (desc->channel[i].size) {
605 case 4:
606 switch (desc->nr_channels) {
607 case 2:
608 result = V_0280A0_COLOR_4_4;
609 goto out_word4;
610 case 4:
611 result = V_0280A0_COLOR_4_4_4_4;
612 goto out_word4;
613 }
614 goto out_unknown;
615 case 8:
616 switch (desc->nr_channels) {
617 case 1:
618 result = V_0280A0_COLOR_8;
619 goto out_word4;
620 case 2:
621 result = V_0280A0_COLOR_8_8;
622 goto out_word4;
623 case 4:
624 result = V_0280A0_COLOR_8_8_8_8;
625 goto out_word4;
626 }
627 goto out_unknown;
628 case 16:
629 switch (desc->nr_channels) {
630 case 1:
631 result = V_0280A0_COLOR_16;
632 goto out_word4;
633 case 2:
634 result = V_0280A0_COLOR_16_16;
635 goto out_word4;
636 case 4:
637 result = V_0280A0_COLOR_16_16_16_16;
638 goto out_word4;
639 }
640 }
641 goto out_unknown;
642
643 case UTIL_FORMAT_TYPE_FLOAT:
644 switch (desc->channel[i].size) {
645 case 16:
646 switch (desc->nr_channels) {
647 case 1:
648 result = V_0280A0_COLOR_16_FLOAT;
649 goto out_word4;
650 case 2:
651 result = V_0280A0_COLOR_16_16_FLOAT;
652 goto out_word4;
653 case 4:
654 result = V_0280A0_COLOR_16_16_16_16_FLOAT;
655 goto out_word4;
656 }
657 goto out_unknown;
658 case 32:
659 switch (desc->nr_channels) {
660 case 1:
661 result = V_0280A0_COLOR_32_FLOAT;
662 goto out_word4;
663 case 2:
664 result = V_0280A0_COLOR_32_32_FLOAT;
665 goto out_word4;
666 case 4:
667 result = V_0280A0_COLOR_32_32_32_32_FLOAT;
668 goto out_word4;
669 }
670 }
671
672 }
673 out_word4:
674 if (word4_p)
675 *word4_p = word4;
676 if (yuv_format_p)
677 *yuv_format_p = yuv_format;
678 return result;
679 out_unknown:
680 // R600_ERR("Unable to handle texformat %d %s\n", format, util_format_name(format));
681 return ~0;
682 }