2 * Copyright 2011 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * Authors: Tom Stellard <thomas.stellard@amd.com>
30 #include <llvm-c/Core.h>
31 #include "gallivm/lp_bld_init.h"
32 #include "gallivm/lp_bld_tgsi.h"
34 #define RADEON_LLVM_MAX_INPUTS 32 * 4
35 #define RADEON_LLVM_MAX_OUTPUTS 32 * 4
37 #define RADEON_LLVM_INITIAL_CF_DEPTH 4
39 #define RADEON_LLVM_MAX_SYSTEM_VALUES 4
41 struct radeon_llvm_branch
{
42 LLVMBasicBlockRef endif_block
;
43 LLVMBasicBlockRef if_block
;
44 LLVMBasicBlockRef else_block
;
48 struct radeon_llvm_loop
{
49 LLVMBasicBlockRef loop_block
;
50 LLVMBasicBlockRef endloop_block
;
53 struct radeon_llvm_context
{
54 struct lp_build_tgsi_soa_context soa
;
56 /*=== Front end configuration ===*/
58 /* Instructions that are not described by any of the TGSI opcodes. */
60 /** This function is responsible for initilizing the inputs array and will be
61 * called once for each input declared in the TGSI shader.
63 void (*load_input
)(struct radeon_llvm_context
*,
65 const struct tgsi_full_declaration
*decl
);
67 void (*load_system_value
)(struct radeon_llvm_context
*,
69 const struct tgsi_full_declaration
*decl
);
71 void (*declare_memory_region
)(struct radeon_llvm_context
*,
72 const struct tgsi_full_declaration
*decl
);
74 /** This array contains the input values for the shader. Typically these
75 * values will be in the form of a target intrinsic that will inform the
76 * backend how to load the actual inputs to the shader.
78 LLVMValueRef inputs
[RADEON_LLVM_MAX_INPUTS
];
79 LLVMValueRef outputs
[RADEON_LLVM_MAX_OUTPUTS
][TGSI_NUM_CHANNELS
];
81 /** This pointer is used to contain the temporary values.
82 * The amount of temporary used in tgsi can't be bound to a max value and
83 * thus we must allocate this array at runtime.
87 LLVMValueRef system_values
[RADEON_LLVM_MAX_SYSTEM_VALUES
];
89 /*=== Private Members ===*/
91 struct radeon_llvm_branch
*branch
;
92 struct radeon_llvm_loop
*loop
;
94 unsigned branch_depth
;
95 unsigned branch_depth_max
;
97 unsigned loop_depth_max
;
99 struct tgsi_array_info
*temp_arrays
;
100 LLVMValueRef
*temp_array_allocas
;
102 LLVMValueRef undef_alloca
;
104 LLVMValueRef main_fn
;
105 LLVMTypeRef return_type
;
107 unsigned fpmath_md_kind
;
108 LLVMValueRef fpmath_md_2p5_ulp
;
110 struct gallivm_state gallivm
;
113 LLVMTypeRef
tgsi2llvmtype(struct lp_build_tgsi_context
*bld_base
,
114 enum tgsi_opcode_type type
);
116 LLVMValueRef
bitcast(struct lp_build_tgsi_context
*bld_base
,
117 enum tgsi_opcode_type type
, LLVMValueRef value
);
119 LLVMValueRef
radeon_llvm_bound_index(struct radeon_llvm_context
*ctx
,
123 void radeon_llvm_emit_prepare_cube_coords(struct lp_build_tgsi_context
*bld_base
,
124 struct lp_build_emit_data
*emit_data
,
125 LLVMValueRef
*coords_arg
,
126 LLVMValueRef
*derivs_arg
);
128 void radeon_llvm_context_init(struct radeon_llvm_context
*ctx
,
130 const struct tgsi_shader_info
*info
,
131 const struct tgsi_token
*tokens
);
133 void radeon_llvm_create_func(struct radeon_llvm_context
*ctx
,
134 LLVMTypeRef
*return_types
, unsigned num_return_elems
,
135 LLVMTypeRef
*ParamTypes
, unsigned ParamCount
);
137 void radeon_llvm_dispose(struct radeon_llvm_context
*ctx
);
139 unsigned radeon_llvm_reg_index_soa(unsigned index
, unsigned chan
);
141 void radeon_llvm_finalize_module(struct radeon_llvm_context
*ctx
);
143 void build_tgsi_intrinsic_nomem(const struct lp_build_tgsi_action
*action
,
144 struct lp_build_tgsi_context
*bld_base
,
145 struct lp_build_emit_data
*emit_data
);
147 LLVMValueRef
radeon_llvm_emit_fetch_64bit(struct lp_build_tgsi_context
*bld_base
,
148 enum tgsi_opcode_type type
,
152 LLVMValueRef
radeon_llvm_saturate(struct lp_build_tgsi_context
*bld_base
,
155 LLVMValueRef
radeon_llvm_emit_fetch(struct lp_build_tgsi_context
*bld_base
,
156 const struct tgsi_full_src_register
*reg
,
157 enum tgsi_opcode_type type
,
160 void radeon_llvm_emit_store(struct lp_build_tgsi_context
*bld_base
,
161 const struct tgsi_full_instruction
*inst
,
162 const struct tgsi_opcode_info
*info
,
163 LLVMValueRef dst
[4]);
165 static inline struct radeon_llvm_context
*
166 radeon_llvm_context(struct lp_build_tgsi_context
*bld_base
)
168 return (struct radeon_llvm_context
*)bld_base
;
171 #endif /* RADEON_LLVM_H */