projects / mesa.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
history | raw | HEAD
gallium/radeon: stop using "reloc" in a few places
[mesa.git] / src / gallium / drivers / radeon / radeon_uvd.c
1 /**************************************************************************
2 *
3 * Copyright 2011 Advanced Micro Devices, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 /*
29 * Authors:
30 * Christian König <christian.koenig@amd.com>
31 *
32 */
33
34 #include <sys/types.h>
35 #include <assert.h>
36 #include <errno.h>
37 #include <unistd.h>
38 #include <stdio.h>
39
40 #include "pipe/p_video_codec.h"
41
42 #include "util/u_memory.h"
43 #include "util/u_video.h"
44
45 #include "vl/vl_defines.h"
46 #include "vl/vl_mpeg12_decoder.h"
47
48 #include "r600_pipe_common.h"
49 #include "radeon_video.h"
50 #include "radeon_uvd.h"
51
52 #define NUM_BUFFERS 4
53
54 #define NUM_MPEG2_REFS 6
55 #define NUM_H264_REFS 17
56 #define NUM_VC1_REFS 5
57
58 #define FB_BUFFER_OFFSET 0x1000
59 #define FB_BUFFER_SIZE 2048
60 #define IT_SCALING_TABLE_SIZE 992
61
62 /* UVD decoder representation */
63 struct ruvd_decoder {
64 struct pipe_video_codec base;
65
66 ruvd_set_dtb set_dtb;
67
68 unsigned stream_handle;
69 unsigned stream_type;
70 unsigned frame_number;
71
72 struct pipe_screen *screen;
73 struct radeon_winsys* ws;
74 struct radeon_winsys_cs* cs;
75
76 unsigned cur_buffer;
77
78 struct rvid_buffer msg_fb_it_buffers[NUM_BUFFERS];
79 struct ruvd_msg *msg;
80 uint32_t *fb;
81 uint8_t *it;
82
83 struct rvid_buffer bs_buffers[NUM_BUFFERS];
84 void* bs_ptr;
85 unsigned bs_size;
86
87 struct rvid_buffer dpb;
88 bool use_legacy;
89 struct rvid_buffer ctx;
90 };
91
92 /* flush IB to the hardware */
93 static void flush(struct ruvd_decoder *dec)
94 {
95 dec->ws->cs_flush(dec->cs, RADEON_FLUSH_ASYNC, NULL, 0);
96 }
97
98 /* add a new set register command to the IB */
99 static void set_reg(struct ruvd_decoder *dec, unsigned reg, uint32_t val)
100 {
101 uint32_t *pm4 = dec->cs->buf;
102 pm4[dec->cs->cdw++] = RUVD_PKT0(reg >> 2, 0);
103 pm4[dec->cs->cdw++] = val;
104 }
105
106 /* send a command to the VCPU through the GPCOM registers */
107 static void send_cmd(struct ruvd_decoder *dec, unsigned cmd,
108 struct radeon_winsys_cs_handle* cs_buf, uint32_t off,
109 enum radeon_bo_usage usage, enum radeon_bo_domain domain)
110 {
111 int reloc_idx;
112
113 reloc_idx = dec->ws->cs_add_buffer(dec->cs, cs_buf, usage, domain,
114 RADEON_PRIO_UVD);
115 if (!dec->use_legacy) {
116 uint64_t addr;
117 addr = dec->ws->buffer_get_virtual_address(cs_buf);
118 addr = addr + off;
119 set_reg(dec, RUVD_GPCOM_VCPU_DATA0, addr);
120 set_reg(dec, RUVD_GPCOM_VCPU_DATA1, addr >> 32);
121 } else {
122 set_reg(dec, RUVD_GPCOM_VCPU_DATA0, off);
123 set_reg(dec, RUVD_GPCOM_VCPU_DATA1, reloc_idx * 4);
124 }
125 set_reg(dec, RUVD_GPCOM_VCPU_CMD, cmd << 1);
126 }
127
128 /* do the codec needs an IT buffer ?*/
129 static bool have_it(struct ruvd_decoder *dec)
130 {
131 return dec->stream_type == RUVD_CODEC_H264_PERF ||
132 dec->stream_type == RUVD_CODEC_H265;
133 }
134
135 /* map the next available message/feedback/itscaling buffer */
136 static void map_msg_fb_it_buf(struct ruvd_decoder *dec)
137 {
138 struct rvid_buffer* buf;
139 uint8_t *ptr;
140
141 /* grab the current message/feedback buffer */
142 buf = &dec->msg_fb_it_buffers[dec->cur_buffer];
143
144 /* and map it for CPU access */
145 ptr = dec->ws->buffer_map(buf->res->cs_buf, dec->cs, PIPE_TRANSFER_WRITE);
146
147 /* calc buffer offsets */
148 dec->msg = (struct ruvd_msg *)ptr;
149 dec->fb = (uint32_t *)(ptr + FB_BUFFER_OFFSET);
150 if (have_it(dec))
151 dec->it = (uint8_t *)(ptr + FB_BUFFER_OFFSET + FB_BUFFER_SIZE);
152 }
153
154 /* unmap and send a message command to the VCPU */
155 static void send_msg_buf(struct ruvd_decoder *dec)
156 {
157 struct rvid_buffer* buf;
158
159 /* ignore the request if message/feedback buffer isn't mapped */
160 if (!dec->msg || !dec->fb)
161 return;
162
163 /* grab the current message buffer */
164 buf = &dec->msg_fb_it_buffers[dec->cur_buffer];
165
166 /* unmap the buffer */
167 dec->ws->buffer_unmap(buf->res->cs_buf);
168 dec->msg = NULL;
169 dec->fb = NULL;
170 dec->it = NULL;
171
172 /* and send it to the hardware */
173 send_cmd(dec, RUVD_CMD_MSG_BUFFER, buf->res->cs_buf, 0,
174 RADEON_USAGE_READ, RADEON_DOMAIN_GTT);
175 }
176
177 /* cycle to the next set of buffers */
178 static void next_buffer(struct ruvd_decoder *dec)
179 {
180 ++dec->cur_buffer;
181 dec->cur_buffer %= NUM_BUFFERS;
182 }
183
184 /* convert the profile into something UVD understands */
185 static uint32_t profile2stream_type(struct ruvd_decoder *dec, unsigned family)
186 {
187 switch (u_reduce_video_profile(dec->base.profile)) {
188 case PIPE_VIDEO_FORMAT_MPEG4_AVC:
189 return (family >= CHIP_TONGA) ?
190 RUVD_CODEC_H264_PERF : RUVD_CODEC_H264;
191
192 case PIPE_VIDEO_FORMAT_VC1:
193 return RUVD_CODEC_VC1;
194
195 case PIPE_VIDEO_FORMAT_MPEG12:
196 return RUVD_CODEC_MPEG2;
197
198 case PIPE_VIDEO_FORMAT_MPEG4:
199 return RUVD_CODEC_MPEG4;
200
201 case PIPE_VIDEO_FORMAT_HEVC:
202 return RUVD_CODEC_H265;
203
204 default:
205 assert(0);
206 return 0;
207 }
208 }
209
210 static unsigned calc_ctx_size(struct ruvd_decoder *dec)
211 {
212 unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH);
213 unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT);
214
215 unsigned max_references = dec->base.max_references + 1;
216
217 if (dec->base.width * dec->base.height >= 4096*2000)
218 max_references = MAX2(max_references, 8);
219 else
220 max_references = MAX2(max_references, 17);
221
222 width = align (width, 16);
223 height = align (height, 16);
224 return ((width + 255) / 16) * ((height + 255) / 16) * 16 * max_references + 52 * 1024;
225 }
226
227 /* calculate size of reference picture buffer */
228 static unsigned calc_dpb_size(struct ruvd_decoder *dec)
229 {
230 unsigned width_in_mb, height_in_mb, image_size, dpb_size;
231
232 // always align them to MB size for dpb calculation
233 unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH);
234 unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT);
235
236 // always one more for currently decoded picture
237 unsigned max_references = dec->base.max_references + 1;
238
239 // aligned size of a single frame
240 image_size = width * height;
241 image_size += image_size / 2;
242 image_size = align(image_size, 1024);
243
244 // picture width & height in 16 pixel units
245 width_in_mb = width / VL_MACROBLOCK_WIDTH;
246 height_in_mb = align(height / VL_MACROBLOCK_HEIGHT, 2);
247
248 switch (u_reduce_video_profile(dec->base.profile)) {
249 case PIPE_VIDEO_FORMAT_MPEG4_AVC: {
250 if (!dec->use_legacy) {
251 unsigned fs_in_mb = width_in_mb * height_in_mb;
252 unsigned alignment = 64, num_dpb_buffer;
253
254 if (dec->stream_type == RUVD_CODEC_H264_PERF)
255 alignment = 256;
256 switch(dec->base.level) {
257 case 30:
258 num_dpb_buffer = 8100 / fs_in_mb;
259 break;
260 case 31:
261 num_dpb_buffer = 18000 / fs_in_mb;
262 break;
263 case 32:
264 num_dpb_buffer = 20480 / fs_in_mb;
265 break;
266 case 41:
267 num_dpb_buffer = 32768 / fs_in_mb;
268 break;
269 case 42:
270 num_dpb_buffer = 34816 / fs_in_mb;
271 break;
272 case 50:
273 num_dpb_buffer = 110400 / fs_in_mb;
274 break;
275 case 51:
276 num_dpb_buffer = 184320 / fs_in_mb;
277 break;
278 default:
279 num_dpb_buffer = 184320 / fs_in_mb;
280 break;
281 }
282 num_dpb_buffer++;
283 max_references = MAX2(MIN2(NUM_H264_REFS, num_dpb_buffer), max_references);
284 dpb_size = image_size * max_references;
285 dpb_size += max_references * align(width_in_mb * height_in_mb * 192, alignment);
286 dpb_size += align(width_in_mb * height_in_mb * 32, alignment);
287 } else {
288 // the firmware seems to allways assume a minimum of ref frames
289 max_references = MAX2(NUM_H264_REFS, max_references);
290 // reference picture buffer
291 dpb_size = image_size * max_references;
292 // macroblock context buffer
293 dpb_size += width_in_mb * height_in_mb * max_references * 192;
294 // IT surface buffer
295 dpb_size += width_in_mb * height_in_mb * 32;
296 }
297 break;
298 }
299
300 case PIPE_VIDEO_FORMAT_HEVC:
301 if (dec->base.width * dec->base.height >= 4096*2000)
302 max_references = MAX2(max_references, 8);
303 else
304 max_references = MAX2(max_references, 17);
305
306 width = align (width, 16);
307 height = align (height, 16);
308 dpb_size = align((width * height * 3) / 2, 256) * max_references;
309 break;
310
311 case PIPE_VIDEO_FORMAT_VC1:
312 // the firmware seems to allways assume a minimum of ref frames
313 max_references = MAX2(NUM_VC1_REFS, max_references);
314
315 // reference picture buffer
316 dpb_size = image_size * max_references;
317
318 // CONTEXT_BUFFER
319 dpb_size += width_in_mb * height_in_mb * 128;
320
321 // IT surface buffer
322 dpb_size += width_in_mb * 64;
323
324 // DB surface buffer
325 dpb_size += width_in_mb * 128;
326
327 // BP
328 dpb_size += align(MAX2(width_in_mb, height_in_mb) * 7 * 16, 64);
329 break;
330
331 case PIPE_VIDEO_FORMAT_MPEG12:
332 // reference picture buffer, must be big enough for all frames
333 dpb_size = image_size * NUM_MPEG2_REFS;
334 break;
335
336 case PIPE_VIDEO_FORMAT_MPEG4:
337 // reference picture buffer
338 dpb_size = image_size * max_references;
339
340 // CM
341 dpb_size += width_in_mb * height_in_mb * 64;
342
343 // IT surface buffer
344 dpb_size += align(width_in_mb * height_in_mb * 32, 64);
345
346 dpb_size = MAX2(dpb_size, 30 * 1024 * 1024);
347 break;
348
349 default:
350 // something is missing here
351 assert(0);
352
353 // at least use a sane default value
354 dpb_size = 32 * 1024 * 1024;
355 break;
356 }
357 return dpb_size;
358 }
359
360 /* free associated data in the video buffer callback */
361 static void ruvd_destroy_associated_data(void *data)
362 {
363 /* NOOP, since we only use an intptr */
364 }
365
366 /* get h264 specific message bits */
367 static struct ruvd_h264 get_h264_msg(struct ruvd_decoder *dec, struct pipe_h264_picture_desc *pic)
368 {
369 struct ruvd_h264 result;
370
371 memset(&result, 0, sizeof(result));
372 switch (pic->base.profile) {
373 case PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE:
374 result.profile = RUVD_H264_PROFILE_BASELINE;
375 break;
376
377 case PIPE_VIDEO_PROFILE_MPEG4_AVC_MAIN:
378 result.profile = RUVD_H264_PROFILE_MAIN;
379 break;
380
381 case PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH:
382 result.profile = RUVD_H264_PROFILE_HIGH;
383 break;
384
385 default:
386 assert(0);
387 break;
388 }
389
390 result.level = dec->base.level;
391
392 result.sps_info_flags = 0;
393 result.sps_info_flags |= pic->pps->sps->direct_8x8_inference_flag << 0;
394 result.sps_info_flags |= pic->pps->sps->mb_adaptive_frame_field_flag << 1;
395 result.sps_info_flags |= pic->pps->sps->frame_mbs_only_flag << 2;
396 result.sps_info_flags |= pic->pps->sps->delta_pic_order_always_zero_flag << 3;
397
398 result.bit_depth_luma_minus8 = pic->pps->sps->bit_depth_luma_minus8;
399 result.bit_depth_chroma_minus8 = pic->pps->sps->bit_depth_chroma_minus8;
400 result.log2_max_frame_num_minus4 = pic->pps->sps->log2_max_frame_num_minus4;
401 result.pic_order_cnt_type = pic->pps->sps->pic_order_cnt_type;
402 result.log2_max_pic_order_cnt_lsb_minus4 = pic->pps->sps->log2_max_pic_order_cnt_lsb_minus4;
403
404 switch (dec->base.chroma_format) {
405 case PIPE_VIDEO_CHROMA_FORMAT_400:
406 result.chroma_format = 0;
407 break;
408 case PIPE_VIDEO_CHROMA_FORMAT_420:
409 result.chroma_format = 1;
410 break;
411 case PIPE_VIDEO_CHROMA_FORMAT_422:
412 result.chroma_format = 2;
413 break;
414 case PIPE_VIDEO_CHROMA_FORMAT_444:
415 result.chroma_format = 3;
416 break;
417 }
418
419 result.pps_info_flags = 0;
420 result.pps_info_flags |= pic->pps->transform_8x8_mode_flag << 0;
421 result.pps_info_flags |= pic->pps->redundant_pic_cnt_present_flag << 1;
422 result.pps_info_flags |= pic->pps->constrained_intra_pred_flag << 2;
423 result.pps_info_flags |= pic->pps->deblocking_filter_control_present_flag << 3;
424 result.pps_info_flags |= pic->pps->weighted_bipred_idc << 4;
425 result.pps_info_flags |= pic->pps->weighted_pred_flag << 6;
426 result.pps_info_flags |= pic->pps->bottom_field_pic_order_in_frame_present_flag << 7;
427 result.pps_info_flags |= pic->pps->entropy_coding_mode_flag << 8;
428
429 result.num_slice_groups_minus1 = pic->pps->num_slice_groups_minus1;
430 result.slice_group_map_type = pic->pps->slice_group_map_type;
431 result.slice_group_change_rate_minus1 = pic->pps->slice_group_change_rate_minus1;
432 result.pic_init_qp_minus26 = pic->pps->pic_init_qp_minus26;
433 result.chroma_qp_index_offset = pic->pps->chroma_qp_index_offset;
434 result.second_chroma_qp_index_offset = pic->pps->second_chroma_qp_index_offset;
435
436 memcpy(result.scaling_list_4x4, pic->pps->ScalingList4x4, 6*16);
437 memcpy(result.scaling_list_8x8, pic->pps->ScalingList8x8, 2*64);
438
439 if (dec->stream_type == RUVD_CODEC_H264_PERF) {
440 memcpy(dec->it, result.scaling_list_4x4, 6*16);
441 memcpy((dec->it + 96), result.scaling_list_8x8, 2*64);
442 }
443
444 result.num_ref_frames = pic->num_ref_frames;
445
446 result.num_ref_idx_l0_active_minus1 = pic->num_ref_idx_l0_active_minus1;
447 result.num_ref_idx_l1_active_minus1 = pic->num_ref_idx_l1_active_minus1;
448
449 result.frame_num = pic->frame_num;
450 memcpy(result.frame_num_list, pic->frame_num_list, 4*16);
451 result.curr_field_order_cnt_list[0] = pic->field_order_cnt[0];
452 result.curr_field_order_cnt_list[1] = pic->field_order_cnt[1];
453 memcpy(result.field_order_cnt_list, pic->field_order_cnt_list, 4*16*2);
454
455 result.decoded_pic_idx = pic->frame_num;
456
457 return result;
458 }
459
460 /* get h265 specific message bits */
461 static struct ruvd_h265 get_h265_msg(struct ruvd_decoder *dec, struct pipe_video_buffer *target,
462 struct pipe_h265_picture_desc *pic)
463 {
464 struct ruvd_h265 result;
465 unsigned i;
466
467 memset(&result, 0, sizeof(result));
468
469 result.sps_info_flags = 0;
470 result.sps_info_flags |= pic->pps->sps->scaling_list_enabled_flag << 0;
471 result.sps_info_flags |= pic->pps->sps->amp_enabled_flag << 1;
472 result.sps_info_flags |= pic->pps->sps->sample_adaptive_offset_enabled_flag << 2;
473 result.sps_info_flags |= pic->pps->sps->pcm_enabled_flag << 3;
474 result.sps_info_flags |= pic->pps->sps->pcm_loop_filter_disabled_flag << 4;
475 result.sps_info_flags |= pic->pps->sps->long_term_ref_pics_present_flag << 5;
476 result.sps_info_flags |= pic->pps->sps->sps_temporal_mvp_enabled_flag << 6;
477 result.sps_info_flags |= pic->pps->sps->strong_intra_smoothing_enabled_flag << 7;
478 result.sps_info_flags |= pic->pps->sps->separate_colour_plane_flag << 8;
479 if (((struct r600_common_screen*)dec->screen)->family == CHIP_CARRIZO)
480 result.sps_info_flags |= 1 << 9;
481
482 result.chroma_format = pic->pps->sps->chroma_format_idc;
483 result.bit_depth_luma_minus8 = pic->pps->sps->bit_depth_luma_minus8;
484 result.bit_depth_chroma_minus8 = pic->pps->sps->bit_depth_chroma_minus8;
485 result.log2_max_pic_order_cnt_lsb_minus4 = pic->pps->sps->log2_max_pic_order_cnt_lsb_minus4;
486 result.sps_max_dec_pic_buffering_minus1 = pic->pps->sps->sps_max_dec_pic_buffering_minus1;
487 result.log2_min_luma_coding_block_size_minus3 = pic->pps->sps->log2_min_luma_coding_block_size_minus3;
488 result.log2_diff_max_min_luma_coding_block_size = pic->pps->sps->log2_diff_max_min_luma_coding_block_size;
489 result.log2_min_transform_block_size_minus2 = pic->pps->sps->log2_min_transform_block_size_minus2;
490 result.log2_diff_max_min_transform_block_size = pic->pps->sps->log2_diff_max_min_transform_block_size;
491 result.max_transform_hierarchy_depth_inter = pic->pps->sps->max_transform_hierarchy_depth_inter;
492 result.max_transform_hierarchy_depth_intra = pic->pps->sps->max_transform_hierarchy_depth_intra;
493 result.pcm_sample_bit_depth_luma_minus1 = pic->pps->sps->pcm_sample_bit_depth_luma_minus1;
494 result.pcm_sample_bit_depth_chroma_minus1 = pic->pps->sps->pcm_sample_bit_depth_chroma_minus1;
495 result.log2_min_pcm_luma_coding_block_size_minus3 = pic->pps->sps->log2_min_pcm_luma_coding_block_size_minus3;
496 result.log2_diff_max_min_pcm_luma_coding_block_size = pic->pps->sps->log2_diff_max_min_pcm_luma_coding_block_size;
497 result.num_short_term_ref_pic_sets = pic->pps->sps->num_short_term_ref_pic_sets;
498
499 result.pps_info_flags = 0;
500 result.pps_info_flags |= pic->pps->dependent_slice_segments_enabled_flag << 0;
501 result.pps_info_flags |= pic->pps->output_flag_present_flag << 1;
502 result.pps_info_flags |= pic->pps->sign_data_hiding_enabled_flag << 2;
503 result.pps_info_flags |= pic->pps->cabac_init_present_flag << 3;
504 result.pps_info_flags |= pic->pps->constrained_intra_pred_flag << 4;
505 result.pps_info_flags |= pic->pps->transform_skip_enabled_flag << 5;
506 result.pps_info_flags |= pic->pps->cu_qp_delta_enabled_flag << 6;
507 result.pps_info_flags |= pic->pps->pps_slice_chroma_qp_offsets_present_flag << 7;
508 result.pps_info_flags |= pic->pps->weighted_pred_flag << 8;
509 result.pps_info_flags |= pic->pps->weighted_bipred_flag << 9;
510 result.pps_info_flags |= pic->pps->transquant_bypass_enabled_flag << 10;
511 result.pps_info_flags |= pic->pps->tiles_enabled_flag << 11;
512 result.pps_info_flags |= pic->pps->entropy_coding_sync_enabled_flag << 12;
513 result.pps_info_flags |= pic->pps->uniform_spacing_flag << 13;
514 result.pps_info_flags |= pic->pps->loop_filter_across_tiles_enabled_flag << 14;
515 result.pps_info_flags |= pic->pps->pps_loop_filter_across_slices_enabled_flag << 15;
516 result.pps_info_flags |= pic->pps->deblocking_filter_override_enabled_flag << 16;
517 result.pps_info_flags |= pic->pps->pps_deblocking_filter_disabled_flag << 17;
518 result.pps_info_flags |= pic->pps->lists_modification_present_flag << 18;
519 result.pps_info_flags |= pic->pps->slice_segment_header_extension_present_flag << 19;
520 //result.pps_info_flags |= pic->pps->deblocking_filter_control_present_flag; ???
521
522 result.num_extra_slice_header_bits = pic->pps->num_extra_slice_header_bits;
523 result.num_long_term_ref_pic_sps = pic->pps->sps->num_long_term_ref_pics_sps;
524 result.num_ref_idx_l0_default_active_minus1 = pic->pps->num_ref_idx_l0_default_active_minus1;
525 result.num_ref_idx_l1_default_active_minus1 = pic->pps->num_ref_idx_l1_default_active_minus1;
526 result.pps_cb_qp_offset = pic->pps->pps_cb_qp_offset;
527 result.pps_cr_qp_offset = pic->pps->pps_cr_qp_offset;
528 result.pps_beta_offset_div2 = pic->pps->pps_beta_offset_div2;
529 result.pps_tc_offset_div2 = pic->pps->pps_tc_offset_div2;
530 result.diff_cu_qp_delta_depth = pic->pps->diff_cu_qp_delta_depth;
531 result.num_tile_columns_minus1 = pic->pps->num_tile_columns_minus1;
532 result.num_tile_rows_minus1 = pic->pps->num_tile_rows_minus1;
533 result.log2_parallel_merge_level_minus2 = pic->pps->log2_parallel_merge_level_minus2;
534 result.init_qp_minus26 = pic->pps->init_qp_minus26;
535
536 for (i = 0; i < 19; ++i)
537 result.column_width_minus1[i] = pic->pps->column_width_minus1[i];
538
539 for (i = 0; i < 21; ++i)
540 result.row_height_minus1[i] = pic->pps->row_height_minus1[i];
541
542 result.num_delta_pocs_ref_rps_idx = pic->NumDeltaPocsOfRefRpsIdx;
543 result.curr_idx = pic->CurrPicOrderCntVal;
544 result.curr_poc = pic->CurrPicOrderCntVal;
545
546 vl_video_buffer_set_associated_data(target, &dec->base,
547 (void *)(uintptr_t)pic->CurrPicOrderCntVal,
548 &ruvd_destroy_associated_data);
549
550 for (i = 0; i < 16; ++i) {
551 struct pipe_video_buffer *ref = pic->ref[i];
552 uintptr_t ref_pic = 0;
553
554 result.poc_list[i] = pic->PicOrderCntVal[i];
555
556 if (ref)
557 ref_pic = (uintptr_t)vl_video_buffer_get_associated_data(ref, &dec->base);
558 else
559 ref_pic = 0x7F;
560 result.ref_pic_list[i] = ref_pic;
561 }
562
563 for (i = 0; i < 8; ++i) {
564 result.ref_pic_set_st_curr_before[i] = 0xFF;
565 result.ref_pic_set_st_curr_after[i] = 0xFF;
566 result.ref_pic_set_lt_curr[i] = 0xFF;
567 }
568
569 for (i = 0; i < pic->NumPocStCurrBefore; ++i)
570 result.ref_pic_set_st_curr_before[i] = pic->RefPicSetStCurrBefore[i];
571
572 for (i = 0; i < pic->NumPocStCurrAfter; ++i)
573 result.ref_pic_set_st_curr_after[i] = pic->RefPicSetStCurrAfter[i];
574
575 for (i = 0; i < pic->NumPocLtCurr; ++i)
576 result.ref_pic_set_lt_curr[i] = pic->RefPicSetLtCurr[i];
577
578 for (i = 0; i < 6; ++i)
579 result.ucScalingListDCCoefSizeID2[i] = pic->pps->sps->ScalingListDCCoeff16x16[i];
580
581 for (i = 0; i < 2; ++i)
582 result.ucScalingListDCCoefSizeID3[i] = pic->pps->sps->ScalingListDCCoeff32x32[i];
583
584 memcpy(dec->it, pic->pps->sps->ScalingList4x4, 6 * 16);
585 memcpy(dec->it + 96, pic->pps->sps->ScalingList8x8, 6 * 64);
586 memcpy(dec->it + 480, pic->pps->sps->ScalingList16x16, 6 * 64);
587 memcpy(dec->it + 864, pic->pps->sps->ScalingList32x32, 2 * 64);
588
589 /* TODO
590 result.highestTid;
591 result.isNonRef;
592
593 IDRPicFlag;
594 RAPPicFlag;
595 NumPocTotalCurr;
596 NumShortTermPictureSliceHeaderBits;
597 NumLongTermPictureSliceHeaderBits;
598
599 IsLongTerm[16];
600 */
601
602 return result;
603 }
604
605 /* get vc1 specific message bits */
606 static struct ruvd_vc1 get_vc1_msg(struct pipe_vc1_picture_desc *pic)
607 {
608 struct ruvd_vc1 result;
609
610 memset(&result, 0, sizeof(result));
611
612 switch(pic->base.profile) {
613 case PIPE_VIDEO_PROFILE_VC1_SIMPLE:
614 result.profile = RUVD_VC1_PROFILE_SIMPLE;
615 result.level = 1;
616 break;
617
618 case PIPE_VIDEO_PROFILE_VC1_MAIN:
619 result.profile = RUVD_VC1_PROFILE_MAIN;
620 result.level = 2;
621 break;
622
623 case PIPE_VIDEO_PROFILE_VC1_ADVANCED:
624 result.profile = RUVD_VC1_PROFILE_ADVANCED;
625 result.level = 4;
626 break;
627
628 default:
629 assert(0);
630 }
631
632 /* fields common for all profiles */
633 result.sps_info_flags |= pic->postprocflag << 7;
634 result.sps_info_flags |= pic->pulldown << 6;
635 result.sps_info_flags |= pic->interlace << 5;
636 result.sps_info_flags |= pic->tfcntrflag << 4;
637 result.sps_info_flags |= pic->finterpflag << 3;
638 result.sps_info_flags |= pic->psf << 1;
639
640 result.pps_info_flags |= pic->range_mapy_flag << 31;
641 result.pps_info_flags |= pic->range_mapy << 28;
642 result.pps_info_flags |= pic->range_mapuv_flag << 27;
643 result.pps_info_flags |= pic->range_mapuv << 24;
644 result.pps_info_flags |= pic->multires << 21;
645 result.pps_info_flags |= pic->maxbframes << 16;
646 result.pps_info_flags |= pic->overlap << 11;
647 result.pps_info_flags |= pic->quantizer << 9;
648 result.pps_info_flags |= pic->panscan_flag << 7;
649 result.pps_info_flags |= pic->refdist_flag << 6;
650 result.pps_info_flags |= pic->vstransform << 0;
651
652 /* some fields only apply to main/advanced profile */
653 if (pic->base.profile != PIPE_VIDEO_PROFILE_VC1_SIMPLE) {
654 result.pps_info_flags |= pic->syncmarker << 20;
655 result.pps_info_flags |= pic->rangered << 19;
656 result.pps_info_flags |= pic->loopfilter << 5;
657 result.pps_info_flags |= pic->fastuvmc << 4;
658 result.pps_info_flags |= pic->extended_mv << 3;
659 result.pps_info_flags |= pic->extended_dmv << 8;
660 result.pps_info_flags |= pic->dquant << 1;
661 }
662
663 result.chroma_format = 1;
664
665 #if 0
666 //(((unsigned int)(pPicParams->advance.reserved1)) << SPS_INFO_VC1_RESERVED_SHIFT)
667 uint32_t slice_count
668 uint8_t picture_type
669 uint8_t frame_coding_mode
670 uint8_t deblockEnable
671 uint8_t pquant
672 #endif
673
674 return result;
675 }
676
677 /* extract the frame number from a referenced video buffer */
678 static uint32_t get_ref_pic_idx(struct ruvd_decoder *dec, struct pipe_video_buffer *ref)
679 {
680 uint32_t min = MAX2(dec->frame_number, NUM_MPEG2_REFS) - NUM_MPEG2_REFS;
681 uint32_t max = MAX2(dec->frame_number, 1) - 1;
682 uintptr_t frame;
683
684 /* seems to be the most sane fallback */
685 if (!ref)
686 return max;
687
688 /* get the frame number from the associated data */
689 frame = (uintptr_t)vl_video_buffer_get_associated_data(ref, &dec->base);
690
691 /* limit the frame number to a valid range */
692 return MAX2(MIN2(frame, max), min);
693 }
694
695 /* get mpeg2 specific msg bits */
696 static struct ruvd_mpeg2 get_mpeg2_msg(struct ruvd_decoder *dec,
697 struct pipe_mpeg12_picture_desc *pic)
698 {
699 const int *zscan = pic->alternate_scan ? vl_zscan_alternate : vl_zscan_normal;
700 struct ruvd_mpeg2 result;
701 unsigned i;
702
703 memset(&result, 0, sizeof(result));
704 result.decoded_pic_idx = dec->frame_number;
705 for (i = 0; i < 2; ++i)
706 result.ref_pic_idx[i] = get_ref_pic_idx(dec, pic->ref[i]);
707
708 result.load_intra_quantiser_matrix = 1;
709 result.load_nonintra_quantiser_matrix = 1;
710
711 for (i = 0; i < 64; ++i) {
712 result.intra_quantiser_matrix[i] = pic->intra_matrix[zscan[i]];
713 result.nonintra_quantiser_matrix[i] = pic->non_intra_matrix[zscan[i]];
714 }
715
716 result.profile_and_level_indication = 0;
717 result.chroma_format = 0x1;
718
719 result.picture_coding_type = pic->picture_coding_type;
720 result.f_code[0][0] = pic->f_code[0][0] + 1;
721 result.f_code[0][1] = pic->f_code[0][1] + 1;
722 result.f_code[1][0] = pic->f_code[1][0] + 1;
723 result.f_code[1][1] = pic->f_code[1][1] + 1;
724 result.intra_dc_precision = pic->intra_dc_precision;
725 result.pic_structure = pic->picture_structure;
726 result.top_field_first = pic->top_field_first;
727 result.frame_pred_frame_dct = pic->frame_pred_frame_dct;
728 result.concealment_motion_vectors = pic->concealment_motion_vectors;
729 result.q_scale_type = pic->q_scale_type;
730 result.intra_vlc_format = pic->intra_vlc_format;
731 result.alternate_scan = pic->alternate_scan;
732
733 return result;
734 }
735
736 /* get mpeg4 specific msg bits */
737 static struct ruvd_mpeg4 get_mpeg4_msg(struct ruvd_decoder *dec,
738 struct pipe_mpeg4_picture_desc *pic)
739 {
740 struct ruvd_mpeg4 result;
741 unsigned i;
742
743 memset(&result, 0, sizeof(result));
744 result.decoded_pic_idx = dec->frame_number;
745 for (i = 0; i < 2; ++i)
746 result.ref_pic_idx[i] = get_ref_pic_idx(dec, pic->ref[i]);
747
748 result.variant_type = 0;
749 result.profile_and_level_indication = 0xF0; // ASP Level0
750
751 result.video_object_layer_verid = 0x5; // advanced simple
752 result.video_object_layer_shape = 0x0; // rectangular
753
754 result.video_object_layer_width = dec->base.width;
755 result.video_object_layer_height = dec->base.height;
756
757 result.vop_time_increment_resolution = pic->vop_time_increment_resolution;
758
759 result.flags |= pic->short_video_header << 0;
760 //result.flags |= obmc_disable << 1;
761 result.flags |= pic->interlaced << 2;
762 result.flags |= 1 << 3; // load_intra_quant_mat
763 result.flags |= 1 << 4; // load_nonintra_quant_mat
764 result.flags |= pic->quarter_sample << 5;
765 result.flags |= 1 << 6; // complexity_estimation_disable
766 result.flags |= pic->resync_marker_disable << 7;
767 //result.flags |= data_partitioned << 8;
768 //result.flags |= reversible_vlc << 9;
769 result.flags |= 0 << 10; // newpred_enable
770 result.flags |= 0 << 11; // reduced_resolution_vop_enable
771 //result.flags |= scalability << 12;
772 //result.flags |= is_object_layer_identifier << 13;
773 //result.flags |= fixed_vop_rate << 14;
774 //result.flags |= newpred_segment_type << 15;
775
776 result.quant_type = pic->quant_type;
777
778 for (i = 0; i < 64; ++i) {
779 result.intra_quant_mat[i] = pic->intra_matrix[vl_zscan_normal[i]];
780 result.nonintra_quant_mat[i] = pic->non_intra_matrix[vl_zscan_normal[i]];
781 }
782
783 /*
784 int32_t trd [2]
785 int32_t trb [2]
786 uint8_t vop_coding_type
787 uint8_t vop_fcode_forward
788 uint8_t vop_fcode_backward
789 uint8_t rounding_control
790 uint8_t alternate_vertical_scan_flag
791 uint8_t top_field_first
792 */
793
794 return result;
795 }
796
797 /**
798 * destroy this video decoder
799 */
800 static void ruvd_destroy(struct pipe_video_codec *decoder)
801 {
802 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder;
803 unsigned i;
804
805 assert(decoder);
806
807 map_msg_fb_it_buf(dec);
808 memset(dec->msg, 0, sizeof(*dec->msg));
809 dec->msg->size = sizeof(*dec->msg);
810 dec->msg->msg_type = RUVD_MSG_DESTROY;
811 dec->msg->stream_handle = dec->stream_handle;
812 send_msg_buf(dec);
813
814 flush(dec);
815
816 dec->ws->cs_destroy(dec->cs);
817
818 for (i = 0; i < NUM_BUFFERS; ++i) {
819 rvid_destroy_buffer(&dec->msg_fb_it_buffers[i]);
820 rvid_destroy_buffer(&dec->bs_buffers[i]);
821 }
822
823 rvid_destroy_buffer(&dec->dpb);
824 if (u_reduce_video_profile(dec->base.profile) == PIPE_VIDEO_FORMAT_HEVC)
825 rvid_destroy_buffer(&dec->ctx);
826
827 FREE(dec);
828 }
829
830 /**
831 * start decoding of a new frame
832 */
833 static void ruvd_begin_frame(struct pipe_video_codec *decoder,
834 struct pipe_video_buffer *target,
835 struct pipe_picture_desc *picture)
836 {
837 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder;
838 uintptr_t frame;
839
840 assert(decoder);
841
842 frame = ++dec->frame_number;
843 vl_video_buffer_set_associated_data(target, decoder, (void *)frame,
844 &ruvd_destroy_associated_data);
845
846 dec->bs_size = 0;
847 dec->bs_ptr = dec->ws->buffer_map(
848 dec->bs_buffers[dec->cur_buffer].res->cs_buf,
849 dec->cs, PIPE_TRANSFER_WRITE);
850 }
851
852 /**
853 * decode a macroblock
854 */
855 static void ruvd_decode_macroblock(struct pipe_video_codec *decoder,
856 struct pipe_video_buffer *target,
857 struct pipe_picture_desc *picture,
858 const struct pipe_macroblock *macroblocks,
859 unsigned num_macroblocks)
860 {
861 /* not supported (yet) */
862 assert(0);
863 }
864
865 /**
866 * decode a bitstream
867 */
868 static void ruvd_decode_bitstream(struct pipe_video_codec *decoder,
869 struct pipe_video_buffer *target,
870 struct pipe_picture_desc *picture,
871 unsigned num_buffers,
872 const void * const *buffers,
873 const unsigned *sizes)
874 {
875 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder;
876 unsigned i;
877
878 assert(decoder);
879
880 if (!dec->bs_ptr)
881 return;
882
883 for (i = 0; i < num_buffers; ++i) {
884 struct rvid_buffer *buf = &dec->bs_buffers[dec->cur_buffer];
885 unsigned new_size = dec->bs_size + sizes[i];
886
887 if (new_size > buf->res->buf->size) {
888 dec->ws->buffer_unmap(buf->res->cs_buf);
889 if (!rvid_resize_buffer(dec->screen, dec->cs, buf, new_size)) {
890 RVID_ERR("Can't resize bitstream buffer!");
891 return;
892 }
893
894 dec->bs_ptr = dec->ws->buffer_map(buf->res->cs_buf, dec->cs,
895 PIPE_TRANSFER_WRITE);
896 if (!dec->bs_ptr)
897 return;
898
899 dec->bs_ptr += dec->bs_size;
900 }
901
902 memcpy(dec->bs_ptr, buffers[i], sizes[i]);
903 dec->bs_size += sizes[i];
904 dec->bs_ptr += sizes[i];
905 }
906 }
907
908 /**
909 * end decoding of the current frame
910 */
911 static void ruvd_end_frame(struct pipe_video_codec *decoder,
912 struct pipe_video_buffer *target,
913 struct pipe_picture_desc *picture)
914 {
915 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder;
916 struct radeon_winsys_cs_handle *dt;
917 struct rvid_buffer *msg_fb_it_buf, *bs_buf;
918 unsigned bs_size;
919
920 assert(decoder);
921
922 if (!dec->bs_ptr)
923 return;
924
925 msg_fb_it_buf = &dec->msg_fb_it_buffers[dec->cur_buffer];
926 bs_buf = &dec->bs_buffers[dec->cur_buffer];
927
928 bs_size = align(dec->bs_size, 128);
929 memset(dec->bs_ptr, 0, bs_size - dec->bs_size);
930 dec->ws->buffer_unmap(bs_buf->res->cs_buf);
931
932 map_msg_fb_it_buf(dec);
933 dec->msg->size = sizeof(*dec->msg);
934 dec->msg->msg_type = RUVD_MSG_DECODE;
935 dec->msg->stream_handle = dec->stream_handle;
936 dec->msg->status_report_feedback_number = dec->frame_number;
937
938 dec->msg->body.decode.stream_type = dec->stream_type;
939 dec->msg->body.decode.decode_flags = 0x1;
940 dec->msg->body.decode.width_in_samples = dec->base.width;
941 dec->msg->body.decode.height_in_samples = dec->base.height;
942
943 dec->msg->body.decode.dpb_size = dec->dpb.res->buf->size;
944 dec->msg->body.decode.bsd_size = bs_size;
945 dec->msg->body.decode.db_pitch = dec->base.width;
946
947 dt = dec->set_dtb(dec->msg, (struct vl_video_buffer *)target);
948
949 switch (u_reduce_video_profile(picture->profile)) {
950 case PIPE_VIDEO_FORMAT_MPEG4_AVC:
951 dec->msg->body.decode.codec.h264 = get_h264_msg(dec, (struct pipe_h264_picture_desc*)picture);
952 break;
953
954 case PIPE_VIDEO_FORMAT_HEVC:
955 dec->msg->body.decode.codec.h265 = get_h265_msg(dec, target, (struct pipe_h265_picture_desc*)picture);
956 break;
957
958 case PIPE_VIDEO_FORMAT_VC1:
959 dec->msg->body.decode.codec.vc1 = get_vc1_msg((struct pipe_vc1_picture_desc*)picture);
960 break;
961
962 case PIPE_VIDEO_FORMAT_MPEG12:
963 dec->msg->body.decode.codec.mpeg2 = get_mpeg2_msg(dec, (struct pipe_mpeg12_picture_desc*)picture);
964 break;
965
966 case PIPE_VIDEO_FORMAT_MPEG4:
967 dec->msg->body.decode.codec.mpeg4 = get_mpeg4_msg(dec, (struct pipe_mpeg4_picture_desc*)picture);
968 break;
969
970 default:
971 assert(0);
972 return;
973 }
974
975 dec->msg->body.decode.db_surf_tile_config = dec->msg->body.decode.dt_surf_tile_config;
976 dec->msg->body.decode.extension_support = 0x1;
977
978 /* set at least the feedback buffer size */
979 dec->fb[0] = FB_BUFFER_SIZE;
980
981 send_msg_buf(dec);
982
983 send_cmd(dec, RUVD_CMD_DPB_BUFFER, dec->dpb.res->cs_buf, 0,
984 RADEON_USAGE_READWRITE, RADEON_DOMAIN_VRAM);
985 if (u_reduce_video_profile(picture->profile) == PIPE_VIDEO_FORMAT_HEVC) {
986 send_cmd(dec, RUVD_CMD_CONTEXT_BUFFER, dec->ctx.res->cs_buf, 0,
987 RADEON_USAGE_READWRITE, RADEON_DOMAIN_VRAM);
988 }
989 send_cmd(dec, RUVD_CMD_BITSTREAM_BUFFER, bs_buf->res->cs_buf,
990 0, RADEON_USAGE_READ, RADEON_DOMAIN_GTT);
991 send_cmd(dec, RUVD_CMD_DECODING_TARGET_BUFFER, dt, 0,
992 RADEON_USAGE_WRITE, RADEON_DOMAIN_VRAM);
993 send_cmd(dec, RUVD_CMD_FEEDBACK_BUFFER, msg_fb_it_buf->res->cs_buf,
994 FB_BUFFER_OFFSET, RADEON_USAGE_WRITE, RADEON_DOMAIN_GTT);
995 if (have_it(dec))
996 send_cmd(dec, RUVD_CMD_ITSCALING_TABLE_BUFFER, msg_fb_it_buf->res->cs_buf,
997 FB_BUFFER_OFFSET + FB_BUFFER_SIZE, RADEON_USAGE_READ, RADEON_DOMAIN_GTT);
998 set_reg(dec, RUVD_ENGINE_CNTL, 1);
999
1000 flush(dec);
1001 next_buffer(dec);
1002 }
1003
1004 /**
1005 * flush any outstanding command buffers to the hardware
1006 */
1007 static void ruvd_flush(struct pipe_video_codec *decoder)
1008 {
1009 }
1010
1011 /**
1012 * create and UVD decoder
1013 */
1014 struct pipe_video_codec *ruvd_create_decoder(struct pipe_context *context,
1015 const struct pipe_video_codec *templ,
1016 ruvd_set_dtb set_dtb)
1017 {
1018 struct radeon_winsys* ws = ((struct r600_common_context *)context)->ws;
1019 struct r600_common_context *rctx = (struct r600_common_context*)context;
1020 unsigned dpb_size;
1021 unsigned width = templ->width, height = templ->height;
1022 unsigned bs_buf_size;
1023 struct radeon_info info;
1024 struct ruvd_decoder *dec;
1025 int i;
1026
1027 ws->query_info(ws, &info);
1028
1029 switch(u_reduce_video_profile(templ->profile)) {
1030 case PIPE_VIDEO_FORMAT_MPEG12:
1031 if (templ->entrypoint > PIPE_VIDEO_ENTRYPOINT_BITSTREAM || info.family < CHIP_PALM)
1032 return vl_create_mpeg12_decoder(context, templ);
1033
1034 /* fall through */
1035 case PIPE_VIDEO_FORMAT_MPEG4:
1036 case PIPE_VIDEO_FORMAT_MPEG4_AVC:
1037 width = align(width, VL_MACROBLOCK_WIDTH);
1038 height = align(height, VL_MACROBLOCK_HEIGHT);
1039 break;
1040
1041 default:
1042 break;
1043 }
1044
1045
1046 dec = CALLOC_STRUCT(ruvd_decoder);
1047
1048 if (!dec)
1049 return NULL;
1050
1051 if (info.drm_major < 3)
1052 dec->use_legacy = TRUE;
1053
1054 dec->base = *templ;
1055 dec->base.context = context;
1056 dec->base.width = width;
1057 dec->base.height = height;
1058
1059 dec->base.destroy = ruvd_destroy;
1060 dec->base.begin_frame = ruvd_begin_frame;
1061 dec->base.decode_macroblock = ruvd_decode_macroblock;
1062 dec->base.decode_bitstream = ruvd_decode_bitstream;
1063 dec->base.end_frame = ruvd_end_frame;
1064 dec->base.flush = ruvd_flush;
1065
1066 dec->stream_type = profile2stream_type(dec, info.family);
1067 dec->set_dtb = set_dtb;
1068 dec->stream_handle = rvid_alloc_stream_handle();
1069 dec->screen = context->screen;
1070 dec->ws = ws;
1071 dec->cs = ws->cs_create(rctx->ctx, RING_UVD, NULL, NULL, NULL);
1072 if (!dec->cs) {
1073 RVID_ERR("Can't get command submission context.\n");
1074 goto error;
1075 }
1076
1077 bs_buf_size = width * height * 512 / (16 * 16);
1078 for (i = 0; i < NUM_BUFFERS; ++i) {
1079 unsigned msg_fb_it_size = FB_BUFFER_OFFSET + FB_BUFFER_SIZE;
1080 STATIC_ASSERT(sizeof(struct ruvd_msg) <= FB_BUFFER_OFFSET);
1081 if (have_it(dec))
1082 msg_fb_it_size += IT_SCALING_TABLE_SIZE;
1083 if (!rvid_create_buffer(dec->screen, &dec->msg_fb_it_buffers[i],
1084 msg_fb_it_size, PIPE_USAGE_STAGING)) {
1085 RVID_ERR("Can't allocated message buffers.\n");
1086 goto error;
1087 }
1088
1089 if (!rvid_create_buffer(dec->screen, &dec->bs_buffers[i],
1090 bs_buf_size, PIPE_USAGE_STAGING)) {
1091 RVID_ERR("Can't allocated bitstream buffers.\n");
1092 goto error;
1093 }
1094
1095 rvid_clear_buffer(context, &dec->msg_fb_it_buffers[i]);
1096 rvid_clear_buffer(context, &dec->bs_buffers[i]);
1097 }
1098
1099 dpb_size = calc_dpb_size(dec);
1100
1101 if (!rvid_create_buffer(dec->screen, &dec->dpb, dpb_size, PIPE_USAGE_DEFAULT)) {
1102 RVID_ERR("Can't allocated dpb.\n");
1103 goto error;
1104 }
1105
1106 rvid_clear_buffer(context, &dec->dpb);
1107
1108 if (u_reduce_video_profile(dec->base.profile) == PIPE_VIDEO_FORMAT_HEVC) {
1109 unsigned ctx_size = calc_ctx_size(dec);
1110 if (!rvid_create_buffer(dec->screen, &dec->ctx, ctx_size, PIPE_USAGE_DEFAULT)) {
1111 RVID_ERR("Can't allocated context buffer.\n");
1112 goto error;
1113 }
1114 rvid_clear_buffer(context, &dec->ctx);
1115 }
1116
1117 map_msg_fb_it_buf(dec);
1118 dec->msg->size = sizeof(*dec->msg);
1119 dec->msg->msg_type = RUVD_MSG_CREATE;
1120 dec->msg->stream_handle = dec->stream_handle;
1121 dec->msg->body.create.stream_type = dec->stream_type;
1122 dec->msg->body.create.width_in_samples = dec->base.width;
1123 dec->msg->body.create.height_in_samples = dec->base.height;
1124 dec->msg->body.create.dpb_size = dpb_size;
1125 send_msg_buf(dec);
1126 flush(dec);
1127 next_buffer(dec);
1128
1129 return &dec->base;
1130
1131 error:
1132 if (dec->cs) dec->ws->cs_destroy(dec->cs);
1133
1134 for (i = 0; i < NUM_BUFFERS; ++i) {
1135 rvid_destroy_buffer(&dec->msg_fb_it_buffers[i]);
1136 rvid_destroy_buffer(&dec->bs_buffers[i]);
1137 }
1138
1139 rvid_destroy_buffer(&dec->dpb);
1140 if (u_reduce_video_profile(dec->base.profile) == PIPE_VIDEO_FORMAT_HEVC)
1141 rvid_destroy_buffer(&dec->ctx);
1142
1143 FREE(dec);
1144
1145 return NULL;
1146 }
1147
1148 /* calculate top/bottom offset */
1149 static unsigned texture_offset(struct radeon_surf *surface, unsigned layer)
1150 {
1151 return surface->level[0].offset +
1152 layer * surface->level[0].slice_size;
1153 }
1154
1155 /* hw encode the aspect of macro tiles */
1156 static unsigned macro_tile_aspect(unsigned macro_tile_aspect)
1157 {
1158 switch (macro_tile_aspect) {
1159 default:
1160 case 1: macro_tile_aspect = 0; break;
1161 case 2: macro_tile_aspect = 1; break;
1162 case 4: macro_tile_aspect = 2; break;
1163 case 8: macro_tile_aspect = 3; break;
1164 }
1165 return macro_tile_aspect;
1166 }
1167
1168 /* hw encode the bank width and height */
1169 static unsigned bank_wh(unsigned bankwh)
1170 {
1171 switch (bankwh) {
1172 default:
1173 case 1: bankwh = 0; break;
1174 case 2: bankwh = 1; break;
1175 case 4: bankwh = 2; break;
1176 case 8: bankwh = 3; break;
1177 }
1178 return bankwh;
1179 }
1180
1181 /**
1182 * fill decoding target field from the luma and chroma surfaces
1183 */
1184 void ruvd_set_dt_surfaces(struct ruvd_msg *msg, struct radeon_surf *luma,
1185 struct radeon_surf *chroma)
1186 {
1187 msg->body.decode.dt_pitch = luma->level[0].pitch_bytes;
1188 switch (luma->level[0].mode) {
1189 case RADEON_SURF_MODE_LINEAR_ALIGNED:
1190 msg->body.decode.dt_tiling_mode = RUVD_TILE_LINEAR;
1191 msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_LINEAR;
1192 break;
1193 case RADEON_SURF_MODE_1D:
1194 msg->body.decode.dt_tiling_mode = RUVD_TILE_8X8;
1195 msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_1D_THIN;
1196 break;
1197 case RADEON_SURF_MODE_2D:
1198 msg->body.decode.dt_tiling_mode = RUVD_TILE_8X8;
1199 msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_2D_THIN;
1200 break;
1201 default:
1202 assert(0);
1203 break;
1204 }
1205
1206 msg->body.decode.dt_luma_top_offset = texture_offset(luma, 0);
1207 msg->body.decode.dt_chroma_top_offset = texture_offset(chroma, 0);
1208 if (msg->body.decode.dt_field_mode) {
1209 msg->body.decode.dt_luma_bottom_offset = texture_offset(luma, 1);
1210 msg->body.decode.dt_chroma_bottom_offset = texture_offset(chroma, 1);
1211 } else {
1212 msg->body.decode.dt_luma_bottom_offset = msg->body.decode.dt_luma_top_offset;
1213 msg->body.decode.dt_chroma_bottom_offset = msg->body.decode.dt_chroma_top_offset;
1214 }
1215
1216 assert(luma->bankw == chroma->bankw);
1217 assert(luma->bankh == chroma->bankh);
1218 assert(luma->mtilea == chroma->mtilea);
1219
1220 msg->body.decode.dt_surf_tile_config |= RUVD_BANK_WIDTH(bank_wh(luma->bankw));
1221 msg->body.decode.dt_surf_tile_config |= RUVD_BANK_HEIGHT(bank_wh(luma->bankh));
1222 msg->body.decode.dt_surf_tile_config |= RUVD_MACRO_TILE_ASPECT_RATIO(macro_tile_aspect(luma->mtilea));
1223 }