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[mesa.git] / src / gallium / drivers / radeon / radeon_uvd.c
1 /**************************************************************************
2 *
3 * Copyright 2011 Advanced Micro Devices, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 /*
29 * Authors:
30 * Christian König <christian.koenig@amd.com>
31 *
32 */
33
34 #include <sys/types.h>
35 #include <assert.h>
36 #include <errno.h>
37 #include <unistd.h>
38 #include <stdio.h>
39
40 #include "pipe/p_video_codec.h"
41
42 #include "util/u_memory.h"
43 #include "util/u_video.h"
44
45 #include "vl/vl_defines.h"
46 #include "vl/vl_mpeg12_decoder.h"
47
48 #include "r600_pipe_common.h"
49 #include "radeon_video.h"
50 #include "radeon_uvd.h"
51
52 #define NUM_BUFFERS 4
53
54 #define NUM_MPEG2_REFS 6
55 #define NUM_H264_REFS 17
56 #define NUM_VC1_REFS 5
57
58 #define FB_BUFFER_OFFSET 0x1000
59 #define FB_BUFFER_SIZE 2048
60 #define FB_BUFFER_SIZE_TONGA (2048 * 64)
61 #define IT_SCALING_TABLE_SIZE 992
62 #define UVD_SESSION_CONTEXT_SIZE (128 * 1024)
63
64 /* UVD decoder representation */
65 struct ruvd_decoder {
66 struct pipe_video_codec base;
67
68 ruvd_set_dtb set_dtb;
69
70 unsigned stream_handle;
71 unsigned stream_type;
72 unsigned frame_number;
73
74 struct pipe_screen *screen;
75 struct radeon_winsys* ws;
76 struct radeon_winsys_cs* cs;
77
78 unsigned cur_buffer;
79
80 struct rvid_buffer msg_fb_it_buffers[NUM_BUFFERS];
81 struct ruvd_msg *msg;
82 uint32_t *fb;
83 unsigned fb_size;
84 uint8_t *it;
85
86 struct rvid_buffer bs_buffers[NUM_BUFFERS];
87 void* bs_ptr;
88 unsigned bs_size;
89
90 struct rvid_buffer dpb;
91 bool use_legacy;
92 struct rvid_buffer ctx;
93 struct rvid_buffer sessionctx;
94 };
95
96 /* flush IB to the hardware */
97 static int flush(struct ruvd_decoder *dec, unsigned flags)
98 {
99 return dec->ws->cs_flush(dec->cs, flags, NULL);
100 }
101
102 /* add a new set register command to the IB */
103 static void set_reg(struct ruvd_decoder *dec, unsigned reg, uint32_t val)
104 {
105 radeon_emit(dec->cs, RUVD_PKT0(reg >> 2, 0));
106 radeon_emit(dec->cs, val);
107 }
108
109 /* send a command to the VCPU through the GPCOM registers */
110 static void send_cmd(struct ruvd_decoder *dec, unsigned cmd,
111 struct pb_buffer* buf, uint32_t off,
112 enum radeon_bo_usage usage, enum radeon_bo_domain domain)
113 {
114 int reloc_idx;
115
116 reloc_idx = dec->ws->cs_add_buffer(dec->cs, buf, usage, domain,
117 RADEON_PRIO_UVD);
118 if (!dec->use_legacy) {
119 uint64_t addr;
120 addr = dec->ws->buffer_get_virtual_address(buf);
121 addr = addr + off;
122 set_reg(dec, RUVD_GPCOM_VCPU_DATA0, addr);
123 set_reg(dec, RUVD_GPCOM_VCPU_DATA1, addr >> 32);
124 } else {
125 set_reg(dec, RUVD_GPCOM_VCPU_DATA0, off);
126 set_reg(dec, RUVD_GPCOM_VCPU_DATA1, reloc_idx * 4);
127 }
128 set_reg(dec, RUVD_GPCOM_VCPU_CMD, cmd << 1);
129 }
130
131 /* do the codec needs an IT buffer ?*/
132 static bool have_it(struct ruvd_decoder *dec)
133 {
134 return dec->stream_type == RUVD_CODEC_H264_PERF ||
135 dec->stream_type == RUVD_CODEC_H265;
136 }
137
138 /* map the next available message/feedback/itscaling buffer */
139 static void map_msg_fb_it_buf(struct ruvd_decoder *dec)
140 {
141 struct rvid_buffer* buf;
142 uint8_t *ptr;
143
144 /* grab the current message/feedback buffer */
145 buf = &dec->msg_fb_it_buffers[dec->cur_buffer];
146
147 /* and map it for CPU access */
148 ptr = dec->ws->buffer_map(buf->res->buf, dec->cs, PIPE_TRANSFER_WRITE);
149
150 /* calc buffer offsets */
151 dec->msg = (struct ruvd_msg *)ptr;
152 dec->fb = (uint32_t *)(ptr + FB_BUFFER_OFFSET);
153 if (have_it(dec))
154 dec->it = (uint8_t *)(ptr + FB_BUFFER_OFFSET + dec->fb_size);
155 }
156
157 /* unmap and send a message command to the VCPU */
158 static void send_msg_buf(struct ruvd_decoder *dec)
159 {
160 struct rvid_buffer* buf;
161
162 /* ignore the request if message/feedback buffer isn't mapped */
163 if (!dec->msg || !dec->fb)
164 return;
165
166 /* grab the current message buffer */
167 buf = &dec->msg_fb_it_buffers[dec->cur_buffer];
168
169 /* unmap the buffer */
170 dec->ws->buffer_unmap(buf->res->buf);
171 dec->msg = NULL;
172 dec->fb = NULL;
173 dec->it = NULL;
174
175
176 if (dec->sessionctx.res)
177 send_cmd(dec, RUVD_CMD_SESSION_CONTEXT_BUFFER,
178 dec->sessionctx.res->buf, 0, RADEON_USAGE_READWRITE,
179 RADEON_DOMAIN_VRAM);
180
181 /* and send it to the hardware */
182 send_cmd(dec, RUVD_CMD_MSG_BUFFER, buf->res->buf, 0,
183 RADEON_USAGE_READ, RADEON_DOMAIN_GTT);
184 }
185
186 /* cycle to the next set of buffers */
187 static void next_buffer(struct ruvd_decoder *dec)
188 {
189 ++dec->cur_buffer;
190 dec->cur_buffer %= NUM_BUFFERS;
191 }
192
193 /* convert the profile into something UVD understands */
194 static uint32_t profile2stream_type(struct ruvd_decoder *dec, unsigned family)
195 {
196 switch (u_reduce_video_profile(dec->base.profile)) {
197 case PIPE_VIDEO_FORMAT_MPEG4_AVC:
198 return (family >= CHIP_TONGA) ?
199 RUVD_CODEC_H264_PERF : RUVD_CODEC_H264;
200
201 case PIPE_VIDEO_FORMAT_VC1:
202 return RUVD_CODEC_VC1;
203
204 case PIPE_VIDEO_FORMAT_MPEG12:
205 return RUVD_CODEC_MPEG2;
206
207 case PIPE_VIDEO_FORMAT_MPEG4:
208 return RUVD_CODEC_MPEG4;
209
210 case PIPE_VIDEO_FORMAT_HEVC:
211 return RUVD_CODEC_H265;
212
213 default:
214 assert(0);
215 return 0;
216 }
217 }
218
219 static unsigned calc_ctx_size_h264_perf(struct ruvd_decoder *dec)
220 {
221 unsigned width_in_mb, height_in_mb, ctx_size;
222 unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH);
223 unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT);
224
225 unsigned max_references = dec->base.max_references + 1;
226
227 // picture width & height in 16 pixel units
228 width_in_mb = width / VL_MACROBLOCK_WIDTH;
229 height_in_mb = align(height / VL_MACROBLOCK_HEIGHT, 2);
230
231 if (!dec->use_legacy) {
232 unsigned fs_in_mb = width_in_mb * height_in_mb;
233 unsigned num_dpb_buffer;
234 switch(dec->base.level) {
235 case 30:
236 num_dpb_buffer = 8100 / fs_in_mb;
237 break;
238 case 31:
239 num_dpb_buffer = 18000 / fs_in_mb;
240 break;
241 case 32:
242 num_dpb_buffer = 20480 / fs_in_mb;
243 break;
244 case 41:
245 num_dpb_buffer = 32768 / fs_in_mb;
246 break;
247 case 42:
248 num_dpb_buffer = 34816 / fs_in_mb;
249 break;
250 case 50:
251 num_dpb_buffer = 110400 / fs_in_mb;
252 break;
253 case 51:
254 num_dpb_buffer = 184320 / fs_in_mb;
255 break;
256 default:
257 num_dpb_buffer = 184320 / fs_in_mb;
258 break;
259 }
260 num_dpb_buffer++;
261 max_references = MAX2(MIN2(NUM_H264_REFS, num_dpb_buffer), max_references);
262 ctx_size = max_references * align(width_in_mb * height_in_mb * 192, 256);
263 } else {
264 // the firmware seems to always assume a minimum of ref frames
265 max_references = MAX2(NUM_H264_REFS, max_references);
266 // macroblock context buffer
267 ctx_size = align(width_in_mb * height_in_mb * max_references * 192, 256);
268 }
269
270 return ctx_size;
271 }
272
273 static unsigned calc_ctx_size_h265_main(struct ruvd_decoder *dec)
274 {
275 unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH);
276 unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT);
277
278 unsigned max_references = dec->base.max_references + 1;
279
280 if (dec->base.width * dec->base.height >= 4096*2000)
281 max_references = MAX2(max_references, 8);
282 else
283 max_references = MAX2(max_references, 17);
284
285 width = align (width, 16);
286 height = align (height, 16);
287 return ((width + 255) / 16) * ((height + 255) / 16) * 16 * max_references + 52 * 1024;
288 }
289
290 static unsigned calc_ctx_size_h265_main10(struct ruvd_decoder *dec, struct pipe_h265_picture_desc *pic)
291 {
292 unsigned block_size, log2_ctb_size, width_in_ctb, height_in_ctb, num_16x16_block_per_ctb;
293 unsigned context_buffer_size_per_ctb_row, cm_buffer_size, max_mb_address, db_left_tile_pxl_size;
294 unsigned db_left_tile_ctx_size = 4096 / 16 * (32 + 16 * 4);
295
296 unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH);
297 unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT);
298 unsigned coeff_10bit = (pic->pps->sps->bit_depth_luma_minus8 || pic->pps->sps->bit_depth_chroma_minus8) ? 2 : 1;
299
300 unsigned max_references = dec->base.max_references + 1;
301
302 if (dec->base.width * dec->base.height >= 4096*2000)
303 max_references = MAX2(max_references, 8);
304 else
305 max_references = MAX2(max_references, 17);
306
307 block_size = (1 << (pic->pps->sps->log2_min_luma_coding_block_size_minus3 + 3));
308 log2_ctb_size = block_size + pic->pps->sps->log2_diff_max_min_luma_coding_block_size;
309
310 width_in_ctb = (width + ((1 << log2_ctb_size) - 1)) >> log2_ctb_size;
311 height_in_ctb = (height + ((1 << log2_ctb_size) - 1)) >> log2_ctb_size;
312
313 num_16x16_block_per_ctb = ((1 << log2_ctb_size) >> 4) * ((1 << log2_ctb_size) >> 4);
314 context_buffer_size_per_ctb_row = align(width_in_ctb * num_16x16_block_per_ctb * 16, 256);
315 max_mb_address = (unsigned) ceil(height * 8 / 2048.0);
316
317 cm_buffer_size = max_references * context_buffer_size_per_ctb_row * height_in_ctb;
318 db_left_tile_pxl_size = coeff_10bit * (max_mb_address * 2 * 2048 + 1024);
319
320 return cm_buffer_size + db_left_tile_ctx_size + db_left_tile_pxl_size;
321 }
322
323 /* calculate size of reference picture buffer */
324 static unsigned calc_dpb_size(struct ruvd_decoder *dec)
325 {
326 unsigned width_in_mb, height_in_mb, image_size, dpb_size;
327
328 // always align them to MB size for dpb calculation
329 unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH);
330 unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT);
331
332 // always one more for currently decoded picture
333 unsigned max_references = dec->base.max_references + 1;
334
335 // aligned size of a single frame
336 image_size = width * height;
337 image_size += image_size / 2;
338 image_size = align(image_size, 1024);
339
340 // picture width & height in 16 pixel units
341 width_in_mb = width / VL_MACROBLOCK_WIDTH;
342 height_in_mb = align(height / VL_MACROBLOCK_HEIGHT, 2);
343
344 switch (u_reduce_video_profile(dec->base.profile)) {
345 case PIPE_VIDEO_FORMAT_MPEG4_AVC: {
346 if (!dec->use_legacy) {
347 unsigned fs_in_mb = width_in_mb * height_in_mb;
348 unsigned alignment = 64, num_dpb_buffer;
349
350 if (dec->stream_type == RUVD_CODEC_H264_PERF)
351 alignment = 256;
352 switch(dec->base.level) {
353 case 30:
354 num_dpb_buffer = 8100 / fs_in_mb;
355 break;
356 case 31:
357 num_dpb_buffer = 18000 / fs_in_mb;
358 break;
359 case 32:
360 num_dpb_buffer = 20480 / fs_in_mb;
361 break;
362 case 41:
363 num_dpb_buffer = 32768 / fs_in_mb;
364 break;
365 case 42:
366 num_dpb_buffer = 34816 / fs_in_mb;
367 break;
368 case 50:
369 num_dpb_buffer = 110400 / fs_in_mb;
370 break;
371 case 51:
372 num_dpb_buffer = 184320 / fs_in_mb;
373 break;
374 default:
375 num_dpb_buffer = 184320 / fs_in_mb;
376 break;
377 }
378 num_dpb_buffer++;
379 max_references = MAX2(MIN2(NUM_H264_REFS, num_dpb_buffer), max_references);
380 dpb_size = image_size * max_references;
381 if ((dec->stream_type != RUVD_CODEC_H264_PERF) ||
382 (((struct r600_common_screen*)dec->screen)->family < CHIP_POLARIS10)) {
383 dpb_size += max_references * align(width_in_mb * height_in_mb * 192, alignment);
384 dpb_size += align(width_in_mb * height_in_mb * 32, alignment);
385 }
386 } else {
387 // the firmware seems to allways assume a minimum of ref frames
388 max_references = MAX2(NUM_H264_REFS, max_references);
389 // reference picture buffer
390 dpb_size = image_size * max_references;
391 if ((dec->stream_type != RUVD_CODEC_H264_PERF) ||
392 (((struct r600_common_screen*)dec->screen)->family < CHIP_POLARIS10)) {
393 // macroblock context buffer
394 dpb_size += width_in_mb * height_in_mb * max_references * 192;
395 // IT surface buffer
396 dpb_size += width_in_mb * height_in_mb * 32;
397 }
398 }
399 break;
400 }
401
402 case PIPE_VIDEO_FORMAT_HEVC:
403 if (dec->base.width * dec->base.height >= 4096*2000)
404 max_references = MAX2(max_references, 8);
405 else
406 max_references = MAX2(max_references, 17);
407
408 width = align (width, 16);
409 height = align (height, 16);
410 if (dec->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10)
411 dpb_size = align((width * height * 9) / 4, 256) * max_references;
412 else
413 dpb_size = align((width * height * 3) / 2, 256) * max_references;
414 break;
415
416 case PIPE_VIDEO_FORMAT_VC1:
417 // the firmware seems to allways assume a minimum of ref frames
418 max_references = MAX2(NUM_VC1_REFS, max_references);
419
420 // reference picture buffer
421 dpb_size = image_size * max_references;
422
423 // CONTEXT_BUFFER
424 dpb_size += width_in_mb * height_in_mb * 128;
425
426 // IT surface buffer
427 dpb_size += width_in_mb * 64;
428
429 // DB surface buffer
430 dpb_size += width_in_mb * 128;
431
432 // BP
433 dpb_size += align(MAX2(width_in_mb, height_in_mb) * 7 * 16, 64);
434 break;
435
436 case PIPE_VIDEO_FORMAT_MPEG12:
437 // reference picture buffer, must be big enough for all frames
438 dpb_size = image_size * NUM_MPEG2_REFS;
439 break;
440
441 case PIPE_VIDEO_FORMAT_MPEG4:
442 // reference picture buffer
443 dpb_size = image_size * max_references;
444
445 // CM
446 dpb_size += width_in_mb * height_in_mb * 64;
447
448 // IT surface buffer
449 dpb_size += align(width_in_mb * height_in_mb * 32, 64);
450
451 dpb_size = MAX2(dpb_size, 30 * 1024 * 1024);
452 break;
453
454 default:
455 // something is missing here
456 assert(0);
457
458 // at least use a sane default value
459 dpb_size = 32 * 1024 * 1024;
460 break;
461 }
462 return dpb_size;
463 }
464
465 /* free associated data in the video buffer callback */
466 static void ruvd_destroy_associated_data(void *data)
467 {
468 /* NOOP, since we only use an intptr */
469 }
470
471 /* get h264 specific message bits */
472 static struct ruvd_h264 get_h264_msg(struct ruvd_decoder *dec, struct pipe_h264_picture_desc *pic)
473 {
474 struct ruvd_h264 result;
475
476 memset(&result, 0, sizeof(result));
477 switch (pic->base.profile) {
478 case PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE:
479 result.profile = RUVD_H264_PROFILE_BASELINE;
480 break;
481
482 case PIPE_VIDEO_PROFILE_MPEG4_AVC_MAIN:
483 result.profile = RUVD_H264_PROFILE_MAIN;
484 break;
485
486 case PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH:
487 result.profile = RUVD_H264_PROFILE_HIGH;
488 break;
489
490 default:
491 assert(0);
492 break;
493 }
494
495 result.level = dec->base.level;
496
497 result.sps_info_flags = 0;
498 result.sps_info_flags |= pic->pps->sps->direct_8x8_inference_flag << 0;
499 result.sps_info_flags |= pic->pps->sps->mb_adaptive_frame_field_flag << 1;
500 result.sps_info_flags |= pic->pps->sps->frame_mbs_only_flag << 2;
501 result.sps_info_flags |= pic->pps->sps->delta_pic_order_always_zero_flag << 3;
502
503 result.bit_depth_luma_minus8 = pic->pps->sps->bit_depth_luma_minus8;
504 result.bit_depth_chroma_minus8 = pic->pps->sps->bit_depth_chroma_minus8;
505 result.log2_max_frame_num_minus4 = pic->pps->sps->log2_max_frame_num_minus4;
506 result.pic_order_cnt_type = pic->pps->sps->pic_order_cnt_type;
507 result.log2_max_pic_order_cnt_lsb_minus4 = pic->pps->sps->log2_max_pic_order_cnt_lsb_minus4;
508
509 switch (dec->base.chroma_format) {
510 case PIPE_VIDEO_CHROMA_FORMAT_NONE:
511 /* TODO: assert? */
512 break;
513 case PIPE_VIDEO_CHROMA_FORMAT_400:
514 result.chroma_format = 0;
515 break;
516 case PIPE_VIDEO_CHROMA_FORMAT_420:
517 result.chroma_format = 1;
518 break;
519 case PIPE_VIDEO_CHROMA_FORMAT_422:
520 result.chroma_format = 2;
521 break;
522 case PIPE_VIDEO_CHROMA_FORMAT_444:
523 result.chroma_format = 3;
524 break;
525 }
526
527 result.pps_info_flags = 0;
528 result.pps_info_flags |= pic->pps->transform_8x8_mode_flag << 0;
529 result.pps_info_flags |= pic->pps->redundant_pic_cnt_present_flag << 1;
530 result.pps_info_flags |= pic->pps->constrained_intra_pred_flag << 2;
531 result.pps_info_flags |= pic->pps->deblocking_filter_control_present_flag << 3;
532 result.pps_info_flags |= pic->pps->weighted_bipred_idc << 4;
533 result.pps_info_flags |= pic->pps->weighted_pred_flag << 6;
534 result.pps_info_flags |= pic->pps->bottom_field_pic_order_in_frame_present_flag << 7;
535 result.pps_info_flags |= pic->pps->entropy_coding_mode_flag << 8;
536
537 result.num_slice_groups_minus1 = pic->pps->num_slice_groups_minus1;
538 result.slice_group_map_type = pic->pps->slice_group_map_type;
539 result.slice_group_change_rate_minus1 = pic->pps->slice_group_change_rate_minus1;
540 result.pic_init_qp_minus26 = pic->pps->pic_init_qp_minus26;
541 result.chroma_qp_index_offset = pic->pps->chroma_qp_index_offset;
542 result.second_chroma_qp_index_offset = pic->pps->second_chroma_qp_index_offset;
543
544 memcpy(result.scaling_list_4x4, pic->pps->ScalingList4x4, 6*16);
545 memcpy(result.scaling_list_8x8, pic->pps->ScalingList8x8, 2*64);
546
547 if (dec->stream_type == RUVD_CODEC_H264_PERF) {
548 memcpy(dec->it, result.scaling_list_4x4, 6*16);
549 memcpy((dec->it + 96), result.scaling_list_8x8, 2*64);
550 }
551
552 result.num_ref_frames = pic->num_ref_frames;
553
554 result.num_ref_idx_l0_active_minus1 = pic->num_ref_idx_l0_active_minus1;
555 result.num_ref_idx_l1_active_minus1 = pic->num_ref_idx_l1_active_minus1;
556
557 result.frame_num = pic->frame_num;
558 memcpy(result.frame_num_list, pic->frame_num_list, 4*16);
559 result.curr_field_order_cnt_list[0] = pic->field_order_cnt[0];
560 result.curr_field_order_cnt_list[1] = pic->field_order_cnt[1];
561 memcpy(result.field_order_cnt_list, pic->field_order_cnt_list, 4*16*2);
562
563 result.decoded_pic_idx = pic->frame_num;
564
565 return result;
566 }
567
568 /* get h265 specific message bits */
569 static struct ruvd_h265 get_h265_msg(struct ruvd_decoder *dec, struct pipe_video_buffer *target,
570 struct pipe_h265_picture_desc *pic)
571 {
572 struct ruvd_h265 result;
573 unsigned i;
574
575 memset(&result, 0, sizeof(result));
576
577 result.sps_info_flags = 0;
578 result.sps_info_flags |= pic->pps->sps->scaling_list_enabled_flag << 0;
579 result.sps_info_flags |= pic->pps->sps->amp_enabled_flag << 1;
580 result.sps_info_flags |= pic->pps->sps->sample_adaptive_offset_enabled_flag << 2;
581 result.sps_info_flags |= pic->pps->sps->pcm_enabled_flag << 3;
582 result.sps_info_flags |= pic->pps->sps->pcm_loop_filter_disabled_flag << 4;
583 result.sps_info_flags |= pic->pps->sps->long_term_ref_pics_present_flag << 5;
584 result.sps_info_flags |= pic->pps->sps->sps_temporal_mvp_enabled_flag << 6;
585 result.sps_info_flags |= pic->pps->sps->strong_intra_smoothing_enabled_flag << 7;
586 result.sps_info_flags |= pic->pps->sps->separate_colour_plane_flag << 8;
587 if (((struct r600_common_screen*)dec->screen)->family == CHIP_CARRIZO)
588 result.sps_info_flags |= 1 << 9;
589 if (pic->UseRefPicList == true)
590 result.sps_info_flags |= 1 << 10;
591
592 result.chroma_format = pic->pps->sps->chroma_format_idc;
593 result.bit_depth_luma_minus8 = pic->pps->sps->bit_depth_luma_minus8;
594 result.bit_depth_chroma_minus8 = pic->pps->sps->bit_depth_chroma_minus8;
595 result.log2_max_pic_order_cnt_lsb_minus4 = pic->pps->sps->log2_max_pic_order_cnt_lsb_minus4;
596 result.sps_max_dec_pic_buffering_minus1 = pic->pps->sps->sps_max_dec_pic_buffering_minus1;
597 result.log2_min_luma_coding_block_size_minus3 = pic->pps->sps->log2_min_luma_coding_block_size_minus3;
598 result.log2_diff_max_min_luma_coding_block_size = pic->pps->sps->log2_diff_max_min_luma_coding_block_size;
599 result.log2_min_transform_block_size_minus2 = pic->pps->sps->log2_min_transform_block_size_minus2;
600 result.log2_diff_max_min_transform_block_size = pic->pps->sps->log2_diff_max_min_transform_block_size;
601 result.max_transform_hierarchy_depth_inter = pic->pps->sps->max_transform_hierarchy_depth_inter;
602 result.max_transform_hierarchy_depth_intra = pic->pps->sps->max_transform_hierarchy_depth_intra;
603 result.pcm_sample_bit_depth_luma_minus1 = pic->pps->sps->pcm_sample_bit_depth_luma_minus1;
604 result.pcm_sample_bit_depth_chroma_minus1 = pic->pps->sps->pcm_sample_bit_depth_chroma_minus1;
605 result.log2_min_pcm_luma_coding_block_size_minus3 = pic->pps->sps->log2_min_pcm_luma_coding_block_size_minus3;
606 result.log2_diff_max_min_pcm_luma_coding_block_size = pic->pps->sps->log2_diff_max_min_pcm_luma_coding_block_size;
607 result.num_short_term_ref_pic_sets = pic->pps->sps->num_short_term_ref_pic_sets;
608
609 result.pps_info_flags = 0;
610 result.pps_info_flags |= pic->pps->dependent_slice_segments_enabled_flag << 0;
611 result.pps_info_flags |= pic->pps->output_flag_present_flag << 1;
612 result.pps_info_flags |= pic->pps->sign_data_hiding_enabled_flag << 2;
613 result.pps_info_flags |= pic->pps->cabac_init_present_flag << 3;
614 result.pps_info_flags |= pic->pps->constrained_intra_pred_flag << 4;
615 result.pps_info_flags |= pic->pps->transform_skip_enabled_flag << 5;
616 result.pps_info_flags |= pic->pps->cu_qp_delta_enabled_flag << 6;
617 result.pps_info_flags |= pic->pps->pps_slice_chroma_qp_offsets_present_flag << 7;
618 result.pps_info_flags |= pic->pps->weighted_pred_flag << 8;
619 result.pps_info_flags |= pic->pps->weighted_bipred_flag << 9;
620 result.pps_info_flags |= pic->pps->transquant_bypass_enabled_flag << 10;
621 result.pps_info_flags |= pic->pps->tiles_enabled_flag << 11;
622 result.pps_info_flags |= pic->pps->entropy_coding_sync_enabled_flag << 12;
623 result.pps_info_flags |= pic->pps->uniform_spacing_flag << 13;
624 result.pps_info_flags |= pic->pps->loop_filter_across_tiles_enabled_flag << 14;
625 result.pps_info_flags |= pic->pps->pps_loop_filter_across_slices_enabled_flag << 15;
626 result.pps_info_flags |= pic->pps->deblocking_filter_override_enabled_flag << 16;
627 result.pps_info_flags |= pic->pps->pps_deblocking_filter_disabled_flag << 17;
628 result.pps_info_flags |= pic->pps->lists_modification_present_flag << 18;
629 result.pps_info_flags |= pic->pps->slice_segment_header_extension_present_flag << 19;
630 //result.pps_info_flags |= pic->pps->deblocking_filter_control_present_flag; ???
631
632 result.num_extra_slice_header_bits = pic->pps->num_extra_slice_header_bits;
633 result.num_long_term_ref_pic_sps = pic->pps->sps->num_long_term_ref_pics_sps;
634 result.num_ref_idx_l0_default_active_minus1 = pic->pps->num_ref_idx_l0_default_active_minus1;
635 result.num_ref_idx_l1_default_active_minus1 = pic->pps->num_ref_idx_l1_default_active_minus1;
636 result.pps_cb_qp_offset = pic->pps->pps_cb_qp_offset;
637 result.pps_cr_qp_offset = pic->pps->pps_cr_qp_offset;
638 result.pps_beta_offset_div2 = pic->pps->pps_beta_offset_div2;
639 result.pps_tc_offset_div2 = pic->pps->pps_tc_offset_div2;
640 result.diff_cu_qp_delta_depth = pic->pps->diff_cu_qp_delta_depth;
641 result.num_tile_columns_minus1 = pic->pps->num_tile_columns_minus1;
642 result.num_tile_rows_minus1 = pic->pps->num_tile_rows_minus1;
643 result.log2_parallel_merge_level_minus2 = pic->pps->log2_parallel_merge_level_minus2;
644 result.init_qp_minus26 = pic->pps->init_qp_minus26;
645
646 for (i = 0; i < 19; ++i)
647 result.column_width_minus1[i] = pic->pps->column_width_minus1[i];
648
649 for (i = 0; i < 21; ++i)
650 result.row_height_minus1[i] = pic->pps->row_height_minus1[i];
651
652 result.num_delta_pocs_ref_rps_idx = pic->NumDeltaPocsOfRefRpsIdx;
653 result.curr_idx = pic->CurrPicOrderCntVal;
654 result.curr_poc = pic->CurrPicOrderCntVal;
655
656 vl_video_buffer_set_associated_data(target, &dec->base,
657 (void *)(uintptr_t)pic->CurrPicOrderCntVal,
658 &ruvd_destroy_associated_data);
659
660 for (i = 0; i < 16; ++i) {
661 struct pipe_video_buffer *ref = pic->ref[i];
662 uintptr_t ref_pic = 0;
663
664 result.poc_list[i] = pic->PicOrderCntVal[i];
665
666 if (ref)
667 ref_pic = (uintptr_t)vl_video_buffer_get_associated_data(ref, &dec->base);
668 else
669 ref_pic = 0x7F;
670 result.ref_pic_list[i] = ref_pic;
671 }
672
673 for (i = 0; i < 8; ++i) {
674 result.ref_pic_set_st_curr_before[i] = 0xFF;
675 result.ref_pic_set_st_curr_after[i] = 0xFF;
676 result.ref_pic_set_lt_curr[i] = 0xFF;
677 }
678
679 for (i = 0; i < pic->NumPocStCurrBefore; ++i)
680 result.ref_pic_set_st_curr_before[i] = pic->RefPicSetStCurrBefore[i];
681
682 for (i = 0; i < pic->NumPocStCurrAfter; ++i)
683 result.ref_pic_set_st_curr_after[i] = pic->RefPicSetStCurrAfter[i];
684
685 for (i = 0; i < pic->NumPocLtCurr; ++i)
686 result.ref_pic_set_lt_curr[i] = pic->RefPicSetLtCurr[i];
687
688 for (i = 0; i < 6; ++i)
689 result.ucScalingListDCCoefSizeID2[i] = pic->pps->sps->ScalingListDCCoeff16x16[i];
690
691 for (i = 0; i < 2; ++i)
692 result.ucScalingListDCCoefSizeID3[i] = pic->pps->sps->ScalingListDCCoeff32x32[i];
693
694 memcpy(dec->it, pic->pps->sps->ScalingList4x4, 6 * 16);
695 memcpy(dec->it + 96, pic->pps->sps->ScalingList8x8, 6 * 64);
696 memcpy(dec->it + 480, pic->pps->sps->ScalingList16x16, 6 * 64);
697 memcpy(dec->it + 864, pic->pps->sps->ScalingList32x32, 2 * 64);
698
699 for (i = 0 ; i < 2 ; i++) {
700 for (int j = 0 ; j < 15 ; j++)
701 result.direct_reflist[i][j] = pic->RefPicList[i][j];
702 }
703
704 if ((pic->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10) &&
705 (target->buffer_format == PIPE_FORMAT_NV12)) {
706 result.p010_mode = 0;
707 result.luma_10to8 = 5;
708 result.chroma_10to8 = 5;
709 result.sclr_luma10to8 = 4;
710 result.sclr_chroma10to8 = 4;
711 }
712
713 /* TODO
714 result.highestTid;
715 result.isNonRef;
716
717 IDRPicFlag;
718 RAPPicFlag;
719 NumPocTotalCurr;
720 NumShortTermPictureSliceHeaderBits;
721 NumLongTermPictureSliceHeaderBits;
722
723 IsLongTerm[16];
724 */
725
726 return result;
727 }
728
729 /* get vc1 specific message bits */
730 static struct ruvd_vc1 get_vc1_msg(struct pipe_vc1_picture_desc *pic)
731 {
732 struct ruvd_vc1 result;
733
734 memset(&result, 0, sizeof(result));
735
736 switch(pic->base.profile) {
737 case PIPE_VIDEO_PROFILE_VC1_SIMPLE:
738 result.profile = RUVD_VC1_PROFILE_SIMPLE;
739 result.level = 1;
740 break;
741
742 case PIPE_VIDEO_PROFILE_VC1_MAIN:
743 result.profile = RUVD_VC1_PROFILE_MAIN;
744 result.level = 2;
745 break;
746
747 case PIPE_VIDEO_PROFILE_VC1_ADVANCED:
748 result.profile = RUVD_VC1_PROFILE_ADVANCED;
749 result.level = 4;
750 break;
751
752 default:
753 assert(0);
754 }
755
756 /* fields common for all profiles */
757 result.sps_info_flags |= pic->postprocflag << 7;
758 result.sps_info_flags |= pic->pulldown << 6;
759 result.sps_info_flags |= pic->interlace << 5;
760 result.sps_info_flags |= pic->tfcntrflag << 4;
761 result.sps_info_flags |= pic->finterpflag << 3;
762 result.sps_info_flags |= pic->psf << 1;
763
764 result.pps_info_flags |= pic->range_mapy_flag << 31;
765 result.pps_info_flags |= pic->range_mapy << 28;
766 result.pps_info_flags |= pic->range_mapuv_flag << 27;
767 result.pps_info_flags |= pic->range_mapuv << 24;
768 result.pps_info_flags |= pic->multires << 21;
769 result.pps_info_flags |= pic->maxbframes << 16;
770 result.pps_info_flags |= pic->overlap << 11;
771 result.pps_info_flags |= pic->quantizer << 9;
772 result.pps_info_flags |= pic->panscan_flag << 7;
773 result.pps_info_flags |= pic->refdist_flag << 6;
774 result.pps_info_flags |= pic->vstransform << 0;
775
776 /* some fields only apply to main/advanced profile */
777 if (pic->base.profile != PIPE_VIDEO_PROFILE_VC1_SIMPLE) {
778 result.pps_info_flags |= pic->syncmarker << 20;
779 result.pps_info_flags |= pic->rangered << 19;
780 result.pps_info_flags |= pic->loopfilter << 5;
781 result.pps_info_flags |= pic->fastuvmc << 4;
782 result.pps_info_flags |= pic->extended_mv << 3;
783 result.pps_info_flags |= pic->extended_dmv << 8;
784 result.pps_info_flags |= pic->dquant << 1;
785 }
786
787 result.chroma_format = 1;
788
789 #if 0
790 //(((unsigned int)(pPicParams->advance.reserved1)) << SPS_INFO_VC1_RESERVED_SHIFT)
791 uint32_t slice_count
792 uint8_t picture_type
793 uint8_t frame_coding_mode
794 uint8_t deblockEnable
795 uint8_t pquant
796 #endif
797
798 return result;
799 }
800
801 /* extract the frame number from a referenced video buffer */
802 static uint32_t get_ref_pic_idx(struct ruvd_decoder *dec, struct pipe_video_buffer *ref)
803 {
804 uint32_t min = MAX2(dec->frame_number, NUM_MPEG2_REFS) - NUM_MPEG2_REFS;
805 uint32_t max = MAX2(dec->frame_number, 1) - 1;
806 uintptr_t frame;
807
808 /* seems to be the most sane fallback */
809 if (!ref)
810 return max;
811
812 /* get the frame number from the associated data */
813 frame = (uintptr_t)vl_video_buffer_get_associated_data(ref, &dec->base);
814
815 /* limit the frame number to a valid range */
816 return MAX2(MIN2(frame, max), min);
817 }
818
819 /* get mpeg2 specific msg bits */
820 static struct ruvd_mpeg2 get_mpeg2_msg(struct ruvd_decoder *dec,
821 struct pipe_mpeg12_picture_desc *pic)
822 {
823 const int *zscan = pic->alternate_scan ? vl_zscan_alternate : vl_zscan_normal;
824 struct ruvd_mpeg2 result;
825 unsigned i;
826
827 memset(&result, 0, sizeof(result));
828 result.decoded_pic_idx = dec->frame_number;
829 for (i = 0; i < 2; ++i)
830 result.ref_pic_idx[i] = get_ref_pic_idx(dec, pic->ref[i]);
831
832 result.load_intra_quantiser_matrix = 1;
833 result.load_nonintra_quantiser_matrix = 1;
834
835 for (i = 0; i < 64; ++i) {
836 result.intra_quantiser_matrix[i] = pic->intra_matrix[zscan[i]];
837 result.nonintra_quantiser_matrix[i] = pic->non_intra_matrix[zscan[i]];
838 }
839
840 result.profile_and_level_indication = 0;
841 result.chroma_format = 0x1;
842
843 result.picture_coding_type = pic->picture_coding_type;
844 result.f_code[0][0] = pic->f_code[0][0] + 1;
845 result.f_code[0][1] = pic->f_code[0][1] + 1;
846 result.f_code[1][0] = pic->f_code[1][0] + 1;
847 result.f_code[1][1] = pic->f_code[1][1] + 1;
848 result.intra_dc_precision = pic->intra_dc_precision;
849 result.pic_structure = pic->picture_structure;
850 result.top_field_first = pic->top_field_first;
851 result.frame_pred_frame_dct = pic->frame_pred_frame_dct;
852 result.concealment_motion_vectors = pic->concealment_motion_vectors;
853 result.q_scale_type = pic->q_scale_type;
854 result.intra_vlc_format = pic->intra_vlc_format;
855 result.alternate_scan = pic->alternate_scan;
856
857 return result;
858 }
859
860 /* get mpeg4 specific msg bits */
861 static struct ruvd_mpeg4 get_mpeg4_msg(struct ruvd_decoder *dec,
862 struct pipe_mpeg4_picture_desc *pic)
863 {
864 struct ruvd_mpeg4 result;
865 unsigned i;
866
867 memset(&result, 0, sizeof(result));
868 result.decoded_pic_idx = dec->frame_number;
869 for (i = 0; i < 2; ++i)
870 result.ref_pic_idx[i] = get_ref_pic_idx(dec, pic->ref[i]);
871
872 result.variant_type = 0;
873 result.profile_and_level_indication = 0xF0; // ASP Level0
874
875 result.video_object_layer_verid = 0x5; // advanced simple
876 result.video_object_layer_shape = 0x0; // rectangular
877
878 result.video_object_layer_width = dec->base.width;
879 result.video_object_layer_height = dec->base.height;
880
881 result.vop_time_increment_resolution = pic->vop_time_increment_resolution;
882
883 result.flags |= pic->short_video_header << 0;
884 //result.flags |= obmc_disable << 1;
885 result.flags |= pic->interlaced << 2;
886 result.flags |= 1 << 3; // load_intra_quant_mat
887 result.flags |= 1 << 4; // load_nonintra_quant_mat
888 result.flags |= pic->quarter_sample << 5;
889 result.flags |= 1 << 6; // complexity_estimation_disable
890 result.flags |= pic->resync_marker_disable << 7;
891 //result.flags |= data_partitioned << 8;
892 //result.flags |= reversible_vlc << 9;
893 result.flags |= 0 << 10; // newpred_enable
894 result.flags |= 0 << 11; // reduced_resolution_vop_enable
895 //result.flags |= scalability << 12;
896 //result.flags |= is_object_layer_identifier << 13;
897 //result.flags |= fixed_vop_rate << 14;
898 //result.flags |= newpred_segment_type << 15;
899
900 result.quant_type = pic->quant_type;
901
902 for (i = 0; i < 64; ++i) {
903 result.intra_quant_mat[i] = pic->intra_matrix[vl_zscan_normal[i]];
904 result.nonintra_quant_mat[i] = pic->non_intra_matrix[vl_zscan_normal[i]];
905 }
906
907 /*
908 int32_t trd [2]
909 int32_t trb [2]
910 uint8_t vop_coding_type
911 uint8_t vop_fcode_forward
912 uint8_t vop_fcode_backward
913 uint8_t rounding_control
914 uint8_t alternate_vertical_scan_flag
915 uint8_t top_field_first
916 */
917
918 return result;
919 }
920
921 /**
922 * destroy this video decoder
923 */
924 static void ruvd_destroy(struct pipe_video_codec *decoder)
925 {
926 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder;
927 unsigned i;
928
929 assert(decoder);
930
931 map_msg_fb_it_buf(dec);
932 memset(dec->msg, 0, sizeof(*dec->msg));
933 dec->msg->size = sizeof(*dec->msg);
934 dec->msg->msg_type = RUVD_MSG_DESTROY;
935 dec->msg->stream_handle = dec->stream_handle;
936 send_msg_buf(dec);
937
938 flush(dec, 0);
939
940 dec->ws->cs_destroy(dec->cs);
941
942 for (i = 0; i < NUM_BUFFERS; ++i) {
943 rvid_destroy_buffer(&dec->msg_fb_it_buffers[i]);
944 rvid_destroy_buffer(&dec->bs_buffers[i]);
945 }
946
947 rvid_destroy_buffer(&dec->dpb);
948 rvid_destroy_buffer(&dec->ctx);
949 rvid_destroy_buffer(&dec->sessionctx);
950
951 FREE(dec);
952 }
953
954 /**
955 * start decoding of a new frame
956 */
957 static void ruvd_begin_frame(struct pipe_video_codec *decoder,
958 struct pipe_video_buffer *target,
959 struct pipe_picture_desc *picture)
960 {
961 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder;
962 uintptr_t frame;
963
964 assert(decoder);
965
966 frame = ++dec->frame_number;
967 vl_video_buffer_set_associated_data(target, decoder, (void *)frame,
968 &ruvd_destroy_associated_data);
969
970 dec->bs_size = 0;
971 dec->bs_ptr = dec->ws->buffer_map(
972 dec->bs_buffers[dec->cur_buffer].res->buf,
973 dec->cs, PIPE_TRANSFER_WRITE);
974 }
975
976 /**
977 * decode a macroblock
978 */
979 static void ruvd_decode_macroblock(struct pipe_video_codec *decoder,
980 struct pipe_video_buffer *target,
981 struct pipe_picture_desc *picture,
982 const struct pipe_macroblock *macroblocks,
983 unsigned num_macroblocks)
984 {
985 /* not supported (yet) */
986 assert(0);
987 }
988
989 /**
990 * decode a bitstream
991 */
992 static void ruvd_decode_bitstream(struct pipe_video_codec *decoder,
993 struct pipe_video_buffer *target,
994 struct pipe_picture_desc *picture,
995 unsigned num_buffers,
996 const void * const *buffers,
997 const unsigned *sizes)
998 {
999 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder;
1000 unsigned i;
1001
1002 assert(decoder);
1003
1004 if (!dec->bs_ptr)
1005 return;
1006
1007 for (i = 0; i < num_buffers; ++i) {
1008 struct rvid_buffer *buf = &dec->bs_buffers[dec->cur_buffer];
1009 unsigned new_size = dec->bs_size + sizes[i];
1010
1011 if (new_size > buf->res->buf->size) {
1012 dec->ws->buffer_unmap(buf->res->buf);
1013 if (!rvid_resize_buffer(dec->screen, dec->cs, buf, new_size)) {
1014 RVID_ERR("Can't resize bitstream buffer!");
1015 return;
1016 }
1017
1018 dec->bs_ptr = dec->ws->buffer_map(buf->res->buf, dec->cs,
1019 PIPE_TRANSFER_WRITE);
1020 if (!dec->bs_ptr)
1021 return;
1022
1023 dec->bs_ptr += dec->bs_size;
1024 }
1025
1026 memcpy(dec->bs_ptr, buffers[i], sizes[i]);
1027 dec->bs_size += sizes[i];
1028 dec->bs_ptr += sizes[i];
1029 }
1030 }
1031
1032 /**
1033 * end decoding of the current frame
1034 */
1035 static void ruvd_end_frame(struct pipe_video_codec *decoder,
1036 struct pipe_video_buffer *target,
1037 struct pipe_picture_desc *picture)
1038 {
1039 struct ruvd_decoder *dec = (struct ruvd_decoder*)decoder;
1040 struct pb_buffer *dt;
1041 struct rvid_buffer *msg_fb_it_buf, *bs_buf;
1042 unsigned bs_size;
1043
1044 assert(decoder);
1045
1046 if (!dec->bs_ptr)
1047 return;
1048
1049 msg_fb_it_buf = &dec->msg_fb_it_buffers[dec->cur_buffer];
1050 bs_buf = &dec->bs_buffers[dec->cur_buffer];
1051
1052 bs_size = align(dec->bs_size, 128);
1053 memset(dec->bs_ptr, 0, bs_size - dec->bs_size);
1054 dec->ws->buffer_unmap(bs_buf->res->buf);
1055
1056 map_msg_fb_it_buf(dec);
1057 dec->msg->size = sizeof(*dec->msg);
1058 dec->msg->msg_type = RUVD_MSG_DECODE;
1059 dec->msg->stream_handle = dec->stream_handle;
1060 dec->msg->status_report_feedback_number = dec->frame_number;
1061
1062 dec->msg->body.decode.stream_type = dec->stream_type;
1063 dec->msg->body.decode.decode_flags = 0x1;
1064 dec->msg->body.decode.width_in_samples = dec->base.width;
1065 dec->msg->body.decode.height_in_samples = dec->base.height;
1066
1067 if ((picture->profile == PIPE_VIDEO_PROFILE_VC1_SIMPLE) ||
1068 (picture->profile == PIPE_VIDEO_PROFILE_VC1_MAIN)) {
1069 dec->msg->body.decode.width_in_samples = align(dec->msg->body.decode.width_in_samples, 16) / 16;
1070 dec->msg->body.decode.height_in_samples = align(dec->msg->body.decode.height_in_samples, 16) / 16;
1071 }
1072
1073 dec->msg->body.decode.dpb_size = dec->dpb.res->buf->size;
1074 dec->msg->body.decode.bsd_size = bs_size;
1075 dec->msg->body.decode.db_pitch = align(dec->base.width, 16);
1076
1077 if (dec->stream_type == RUVD_CODEC_H264_PERF &&
1078 ((struct r600_common_screen*)dec->screen)->family >= CHIP_POLARIS10)
1079 dec->msg->body.decode.dpb_reserved = dec->ctx.res->buf->size;
1080
1081 dt = dec->set_dtb(dec->msg, (struct vl_video_buffer *)target);
1082 if (((struct r600_common_screen*)dec->screen)->family >= CHIP_STONEY)
1083 dec->msg->body.decode.dt_wa_chroma_top_offset = dec->msg->body.decode.dt_pitch / 2;
1084
1085 switch (u_reduce_video_profile(picture->profile)) {
1086 case PIPE_VIDEO_FORMAT_MPEG4_AVC:
1087 dec->msg->body.decode.codec.h264 = get_h264_msg(dec, (struct pipe_h264_picture_desc*)picture);
1088 break;
1089
1090 case PIPE_VIDEO_FORMAT_HEVC:
1091 dec->msg->body.decode.codec.h265 = get_h265_msg(dec, target, (struct pipe_h265_picture_desc*)picture);
1092 if (dec->ctx.res == NULL) {
1093 unsigned ctx_size;
1094 if (dec->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10)
1095 ctx_size = calc_ctx_size_h265_main10(dec, (struct pipe_h265_picture_desc*)picture);
1096 else
1097 ctx_size = calc_ctx_size_h265_main(dec);
1098 if (!rvid_create_buffer(dec->screen, &dec->ctx, ctx_size, PIPE_USAGE_DEFAULT)) {
1099 RVID_ERR("Can't allocated context buffer.\n");
1100 }
1101 rvid_clear_buffer(decoder->context, &dec->ctx);
1102 }
1103
1104 if (dec->ctx.res)
1105 dec->msg->body.decode.dpb_reserved = dec->ctx.res->buf->size;
1106 break;
1107
1108 case PIPE_VIDEO_FORMAT_VC1:
1109 dec->msg->body.decode.codec.vc1 = get_vc1_msg((struct pipe_vc1_picture_desc*)picture);
1110 break;
1111
1112 case PIPE_VIDEO_FORMAT_MPEG12:
1113 dec->msg->body.decode.codec.mpeg2 = get_mpeg2_msg(dec, (struct pipe_mpeg12_picture_desc*)picture);
1114 break;
1115
1116 case PIPE_VIDEO_FORMAT_MPEG4:
1117 dec->msg->body.decode.codec.mpeg4 = get_mpeg4_msg(dec, (struct pipe_mpeg4_picture_desc*)picture);
1118 break;
1119
1120 default:
1121 assert(0);
1122 return;
1123 }
1124
1125 dec->msg->body.decode.db_surf_tile_config = dec->msg->body.decode.dt_surf_tile_config;
1126 dec->msg->body.decode.extension_support = 0x1;
1127
1128 /* set at least the feedback buffer size */
1129 dec->fb[0] = dec->fb_size;
1130
1131 send_msg_buf(dec);
1132
1133 send_cmd(dec, RUVD_CMD_DPB_BUFFER, dec->dpb.res->buf, 0,
1134 RADEON_USAGE_READWRITE, RADEON_DOMAIN_VRAM);
1135 if (dec->ctx.res)
1136 send_cmd(dec, RUVD_CMD_CONTEXT_BUFFER, dec->ctx.res->buf, 0,
1137 RADEON_USAGE_READWRITE, RADEON_DOMAIN_VRAM);
1138 send_cmd(dec, RUVD_CMD_BITSTREAM_BUFFER, bs_buf->res->buf,
1139 0, RADEON_USAGE_READ, RADEON_DOMAIN_GTT);
1140 send_cmd(dec, RUVD_CMD_DECODING_TARGET_BUFFER, dt, 0,
1141 RADEON_USAGE_WRITE, RADEON_DOMAIN_VRAM);
1142 send_cmd(dec, RUVD_CMD_FEEDBACK_BUFFER, msg_fb_it_buf->res->buf,
1143 FB_BUFFER_OFFSET, RADEON_USAGE_WRITE, RADEON_DOMAIN_GTT);
1144 if (have_it(dec))
1145 send_cmd(dec, RUVD_CMD_ITSCALING_TABLE_BUFFER, msg_fb_it_buf->res->buf,
1146 FB_BUFFER_OFFSET + dec->fb_size, RADEON_USAGE_READ, RADEON_DOMAIN_GTT);
1147 set_reg(dec, RUVD_ENGINE_CNTL, 1);
1148
1149 flush(dec, RADEON_FLUSH_ASYNC);
1150 next_buffer(dec);
1151 }
1152
1153 /**
1154 * flush any outstanding command buffers to the hardware
1155 */
1156 static void ruvd_flush(struct pipe_video_codec *decoder)
1157 {
1158 }
1159
1160 /**
1161 * create and UVD decoder
1162 */
1163 struct pipe_video_codec *ruvd_create_decoder(struct pipe_context *context,
1164 const struct pipe_video_codec *templ,
1165 ruvd_set_dtb set_dtb)
1166 {
1167 struct radeon_winsys* ws = ((struct r600_common_context *)context)->ws;
1168 struct r600_common_context *rctx = (struct r600_common_context*)context;
1169 unsigned dpb_size;
1170 unsigned width = templ->width, height = templ->height;
1171 unsigned bs_buf_size;
1172 struct radeon_info info;
1173 struct ruvd_decoder *dec;
1174 int r, i;
1175
1176 ws->query_info(ws, &info);
1177
1178 switch(u_reduce_video_profile(templ->profile)) {
1179 case PIPE_VIDEO_FORMAT_MPEG12:
1180 if (templ->entrypoint > PIPE_VIDEO_ENTRYPOINT_BITSTREAM || info.family < CHIP_PALM)
1181 return vl_create_mpeg12_decoder(context, templ);
1182
1183 /* fall through */
1184 case PIPE_VIDEO_FORMAT_MPEG4:
1185 width = align(width, VL_MACROBLOCK_WIDTH);
1186 height = align(height, VL_MACROBLOCK_HEIGHT);
1187 break;
1188 case PIPE_VIDEO_FORMAT_MPEG4_AVC:
1189 width = align(width, VL_MACROBLOCK_WIDTH);
1190 height = align(height, VL_MACROBLOCK_HEIGHT);
1191 break;
1192
1193 default:
1194 break;
1195 }
1196
1197
1198 dec = CALLOC_STRUCT(ruvd_decoder);
1199
1200 if (!dec)
1201 return NULL;
1202
1203 if (info.drm_major < 3)
1204 dec->use_legacy = true;
1205
1206 dec->base = *templ;
1207 dec->base.context = context;
1208 dec->base.width = width;
1209 dec->base.height = height;
1210
1211 dec->base.destroy = ruvd_destroy;
1212 dec->base.begin_frame = ruvd_begin_frame;
1213 dec->base.decode_macroblock = ruvd_decode_macroblock;
1214 dec->base.decode_bitstream = ruvd_decode_bitstream;
1215 dec->base.end_frame = ruvd_end_frame;
1216 dec->base.flush = ruvd_flush;
1217
1218 dec->stream_type = profile2stream_type(dec, info.family);
1219 dec->set_dtb = set_dtb;
1220 dec->stream_handle = rvid_alloc_stream_handle();
1221 dec->screen = context->screen;
1222 dec->ws = ws;
1223 dec->cs = ws->cs_create(rctx->ctx, RING_UVD, NULL, NULL);
1224 if (!dec->cs) {
1225 RVID_ERR("Can't get command submission context.\n");
1226 goto error;
1227 }
1228
1229 dec->fb_size = (info.family == CHIP_TONGA) ? FB_BUFFER_SIZE_TONGA :
1230 FB_BUFFER_SIZE;
1231 bs_buf_size = width * height * (512 / (16 * 16));
1232 for (i = 0; i < NUM_BUFFERS; ++i) {
1233 unsigned msg_fb_it_size = FB_BUFFER_OFFSET + dec->fb_size;
1234 STATIC_ASSERT(sizeof(struct ruvd_msg) <= FB_BUFFER_OFFSET);
1235 if (have_it(dec))
1236 msg_fb_it_size += IT_SCALING_TABLE_SIZE;
1237 if (!rvid_create_buffer(dec->screen, &dec->msg_fb_it_buffers[i],
1238 msg_fb_it_size, PIPE_USAGE_STAGING)) {
1239 RVID_ERR("Can't allocated message buffers.\n");
1240 goto error;
1241 }
1242
1243 if (!rvid_create_buffer(dec->screen, &dec->bs_buffers[i],
1244 bs_buf_size, PIPE_USAGE_STAGING)) {
1245 RVID_ERR("Can't allocated bitstream buffers.\n");
1246 goto error;
1247 }
1248
1249 rvid_clear_buffer(context, &dec->msg_fb_it_buffers[i]);
1250 rvid_clear_buffer(context, &dec->bs_buffers[i]);
1251 }
1252
1253 dpb_size = calc_dpb_size(dec);
1254
1255 if (!rvid_create_buffer(dec->screen, &dec->dpb, dpb_size, PIPE_USAGE_DEFAULT)) {
1256 RVID_ERR("Can't allocated dpb.\n");
1257 goto error;
1258 }
1259
1260 rvid_clear_buffer(context, &dec->dpb);
1261
1262 if (dec->stream_type == RUVD_CODEC_H264_PERF && info.family >= CHIP_POLARIS10) {
1263 unsigned ctx_size = calc_ctx_size_h264_perf(dec);
1264 if (!rvid_create_buffer(dec->screen, &dec->ctx, ctx_size, PIPE_USAGE_DEFAULT)) {
1265 RVID_ERR("Can't allocated context buffer.\n");
1266 goto error;
1267 }
1268 rvid_clear_buffer(context, &dec->ctx);
1269 }
1270
1271 if (info.family >= CHIP_POLARIS10 && info.drm_minor >= 3) {
1272 if (!rvid_create_buffer(dec->screen, &dec->sessionctx,
1273 UVD_SESSION_CONTEXT_SIZE,
1274 PIPE_USAGE_DEFAULT)) {
1275 RVID_ERR("Can't allocated session ctx.\n");
1276 goto error;
1277 }
1278 rvid_clear_buffer(context, &dec->sessionctx);
1279 }
1280
1281 map_msg_fb_it_buf(dec);
1282 dec->msg->size = sizeof(*dec->msg);
1283 dec->msg->msg_type = RUVD_MSG_CREATE;
1284 dec->msg->stream_handle = dec->stream_handle;
1285 dec->msg->body.create.stream_type = dec->stream_type;
1286 dec->msg->body.create.width_in_samples = dec->base.width;
1287 dec->msg->body.create.height_in_samples = dec->base.height;
1288 dec->msg->body.create.dpb_size = dpb_size;
1289 send_msg_buf(dec);
1290 r = flush(dec, 0);
1291 if (r)
1292 goto error;
1293
1294 next_buffer(dec);
1295
1296 return &dec->base;
1297
1298 error:
1299 if (dec->cs) dec->ws->cs_destroy(dec->cs);
1300
1301 for (i = 0; i < NUM_BUFFERS; ++i) {
1302 rvid_destroy_buffer(&dec->msg_fb_it_buffers[i]);
1303 rvid_destroy_buffer(&dec->bs_buffers[i]);
1304 }
1305
1306 rvid_destroy_buffer(&dec->dpb);
1307 rvid_destroy_buffer(&dec->ctx);
1308 rvid_destroy_buffer(&dec->sessionctx);
1309
1310 FREE(dec);
1311
1312 return NULL;
1313 }
1314
1315 /* calculate top/bottom offset */
1316 static unsigned texture_offset(struct radeon_surf *surface, unsigned layer)
1317 {
1318 return surface->level[0].offset +
1319 layer * surface->level[0].slice_size;
1320 }
1321
1322 /* hw encode the aspect of macro tiles */
1323 static unsigned macro_tile_aspect(unsigned macro_tile_aspect)
1324 {
1325 switch (macro_tile_aspect) {
1326 default:
1327 case 1: macro_tile_aspect = 0; break;
1328 case 2: macro_tile_aspect = 1; break;
1329 case 4: macro_tile_aspect = 2; break;
1330 case 8: macro_tile_aspect = 3; break;
1331 }
1332 return macro_tile_aspect;
1333 }
1334
1335 /* hw encode the bank width and height */
1336 static unsigned bank_wh(unsigned bankwh)
1337 {
1338 switch (bankwh) {
1339 default:
1340 case 1: bankwh = 0; break;
1341 case 2: bankwh = 1; break;
1342 case 4: bankwh = 2; break;
1343 case 8: bankwh = 3; break;
1344 }
1345 return bankwh;
1346 }
1347
1348 /**
1349 * fill decoding target field from the luma and chroma surfaces
1350 */
1351 void ruvd_set_dt_surfaces(struct ruvd_msg *msg, struct radeon_surf *luma,
1352 struct radeon_surf *chroma)
1353 {
1354 msg->body.decode.dt_pitch = luma->level[0].pitch_bytes;
1355 switch (luma->level[0].mode) {
1356 case RADEON_SURF_MODE_LINEAR_ALIGNED:
1357 msg->body.decode.dt_tiling_mode = RUVD_TILE_LINEAR;
1358 msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_LINEAR;
1359 break;
1360 case RADEON_SURF_MODE_1D:
1361 msg->body.decode.dt_tiling_mode = RUVD_TILE_8X8;
1362 msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_1D_THIN;
1363 break;
1364 case RADEON_SURF_MODE_2D:
1365 msg->body.decode.dt_tiling_mode = RUVD_TILE_8X8;
1366 msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_2D_THIN;
1367 break;
1368 default:
1369 assert(0);
1370 break;
1371 }
1372
1373 msg->body.decode.dt_luma_top_offset = texture_offset(luma, 0);
1374 msg->body.decode.dt_chroma_top_offset = texture_offset(chroma, 0);
1375 if (msg->body.decode.dt_field_mode) {
1376 msg->body.decode.dt_luma_bottom_offset = texture_offset(luma, 1);
1377 msg->body.decode.dt_chroma_bottom_offset = texture_offset(chroma, 1);
1378 } else {
1379 msg->body.decode.dt_luma_bottom_offset = msg->body.decode.dt_luma_top_offset;
1380 msg->body.decode.dt_chroma_bottom_offset = msg->body.decode.dt_chroma_top_offset;
1381 }
1382
1383 assert(luma->bankw == chroma->bankw);
1384 assert(luma->bankh == chroma->bankh);
1385 assert(luma->mtilea == chroma->mtilea);
1386
1387 msg->body.decode.dt_surf_tile_config |= RUVD_BANK_WIDTH(bank_wh(luma->bankw));
1388 msg->body.decode.dt_surf_tile_config |= RUVD_BANK_HEIGHT(bank_wh(luma->bankh));
1389 msg->body.decode.dt_surf_tile_config |= RUVD_MACRO_TILE_ASPECT_RATIO(macro_tile_aspect(luma->mtilea));
1390 }