src/gallium/drivers/radeon/radeon_vce.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2013 Advanced Micro Devices, Inc.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 /*
  29  * Authors:
  30  *      Christian König <christian.koenig@amd.com>
  31  *
  32  */
  33
  34 #include <stdio.h>
  35
  36 #include "pipe/p_video_codec.h"
  37
  38 #include "util/u_video.h"
  39 #include "util/u_memory.h"
  40
  41 #include "vl/vl_video_buffer.h"
  42
  43 #include "r600_pipe_common.h"
  44 #include "radeon_video.h"
  45 #include "radeon_vce.h"
  46
  47 #define FW_40_2_2 ((40 << 24) | (2 << 16) | (2 << 8))
  48 #define FW_50_0_1 ((50 << 24) | (0 << 16) | (1 << 8))
  49 #define FW_50_1_2 ((50 << 24) | (1 << 16) | (2 << 8))
  50 #define FW_50_10_2 ((50 << 24) | (10 << 16) | (2 << 8))
  51 #define FW_50_17_3 ((50 << 24) | (17 << 16) | (3 << 8))
  52
  53 /**
  54  * flush commands to the hardware
  55  */
  56 static void flush(struct rvce_encoder *enc)
  57 {
  58         enc->ws->cs_flush(enc->cs, RADEON_FLUSH_ASYNC, NULL, 0);
  59         enc->task_info_idx = 0;
  60         enc->bs_idx = 0;
  61 }
  62
  63 #if 0
  64 static void dump_feedback(struct rvce_encoder *enc, struct rvid_buffer *fb)
  65 {
  66         uint32_t *ptr = enc->ws->buffer_map(fb->res->cs_buf, enc->cs, PIPE_TRANSFER_READ_WRITE);
  67         unsigned i = 0;
  68         fprintf(stderr, "\n");
  69         fprintf(stderr, "encStatus:\t\t\t%08x\n", ptr[i++]);
  70         fprintf(stderr, "encHasBitstream:\t\t%08x\n", ptr[i++]);
  71         fprintf(stderr, "encHasAudioBitstream:\t\t%08x\n", ptr[i++]);
  72         fprintf(stderr, "encBitstreamOffset:\t\t%08x\n", ptr[i++]);
  73         fprintf(stderr, "encBitstreamSize:\t\t%08x\n", ptr[i++]);
  74         fprintf(stderr, "encAudioBitstreamOffset:\t%08x\n", ptr[i++]);
  75         fprintf(stderr, "encAudioBitstreamSize:\t\t%08x\n", ptr[i++]);
  76         fprintf(stderr, "encExtrabytes:\t\t\t%08x\n", ptr[i++]);
  77         fprintf(stderr, "encAudioExtrabytes:\t\t%08x\n", ptr[i++]);
  78         fprintf(stderr, "videoTimeStamp:\t\t\t%08x\n", ptr[i++]);
  79         fprintf(stderr, "audioTimeStamp:\t\t\t%08x\n", ptr[i++]);
  80         fprintf(stderr, "videoOutputType:\t\t%08x\n", ptr[i++]);
  81         fprintf(stderr, "attributeFlags:\t\t\t%08x\n", ptr[i++]);
  82         fprintf(stderr, "seiPrivatePackageOffset:\t%08x\n", ptr[i++]);
  83         fprintf(stderr, "seiPrivatePackageSize:\t\t%08x\n", ptr[i++]);
  84         fprintf(stderr, "\n");
  85         enc->ws->buffer_unmap(fb->res->cs_buf);
  86 }
  87 #endif
  88
  89 /**
  90  * reset the CPB handling
  91  */
  92 static void reset_cpb(struct rvce_encoder *enc)
  93 {
  94         unsigned i;
  95
  96         LIST_INITHEAD(&enc->cpb_slots);
  97         for (i = 0; i < enc->cpb_num; ++i) {
  98                 struct rvce_cpb_slot *slot = &enc->cpb_array[i];
  99                 slot->index = i;
 100                 slot->picture_type = PIPE_H264_ENC_PICTURE_TYPE_SKIP;
 101                 slot->frame_num = 0;
 102                 slot->pic_order_cnt = 0;
 103                 LIST_ADDTAIL(&slot->list, &enc->cpb_slots);
 104         }
 105 }
 106
 107 /**
 108  * sort l0 and l1 to the top of the list
 109  */
 110 static void sort_cpb(struct rvce_encoder *enc)
 111 {
 112         struct rvce_cpb_slot *i, *l0 = NULL, *l1 = NULL;
 113
 114         LIST_FOR_EACH_ENTRY(i, &enc->cpb_slots, list) {
 115                 if (i->frame_num == enc->pic.ref_idx_l0)
 116                         l0 = i;
 117
 118                 if (i->frame_num == enc->pic.ref_idx_l1)
 119                         l1 = i;
 120
 121                 if (enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_P && l0)
 122                         break;
 123
 124                 if (enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_B &&
 125                     l0 && l1)
 126                         break;
 127         }
 128
 129         if (l1) {
 130                 LIST_DEL(&l1->list);
 131                 LIST_ADD(&l1->list, &enc->cpb_slots);
 132         }
 133
 134         if (l0) {
 135                 LIST_DEL(&l0->list);
 136                 LIST_ADD(&l0->list, &enc->cpb_slots);
 137         }
 138 }
 139
 140 /**
 141  * get number of cpbs based on dpb
 142  */
 143 static unsigned get_cpb_num(struct rvce_encoder *enc)
 144 {
 145         unsigned w = align(enc->base.width, 16) / 16;
 146         unsigned h = align(enc->base.height, 16) / 16;
 147         unsigned dpb;
 148
 149         switch (enc->base.level) {
 150         case 10:
 151                 dpb = 396;
 152                 break;
 153         case 11:
 154                 dpb = 900;
 155                 break;
 156         case 12:
 157         case 13:
 158         case 20:
 159                 dpb = 2376;
 160                 break;
 161         case 21:
 162                 dpb = 4752;
 163                 break;
 164         case 22:
 165         case 30:
 166                 dpb = 8100;
 167                 break;
 168         case 31:
 169                 dpb = 18000;
 170                 break;
 171         case 32:
 172                 dpb = 20480;
 173                 break;
 174         case 40:
 175         case 41:
 176                 dpb = 32768;
 177                 break;
 178         default:
 179         case 42:
 180                 dpb = 34816;
 181                 break;
 182         case 50:
 183                 dpb = 110400;
 184                 break;
 185         case 51:
 186                 dpb = 184320;
 187                 break;
 188         }
 189
 190         return MIN2(dpb / (w * h), 16);
 191 }
 192
 193 /**
 194  * Get the slot for the currently encoded frame
 195  */
 196 struct rvce_cpb_slot *current_slot(struct rvce_encoder *enc)
 197 {
 198         return LIST_ENTRY(struct rvce_cpb_slot, enc->cpb_slots.prev, list);
 199 }
 200
 201 /**
 202  * Get the slot for L0
 203  */
 204 struct rvce_cpb_slot *l0_slot(struct rvce_encoder *enc)
 205 {
 206         return LIST_ENTRY(struct rvce_cpb_slot, enc->cpb_slots.next, list);
 207 }
 208
 209 /**
 210  * Get the slot for L1
 211  */
 212 struct rvce_cpb_slot *l1_slot(struct rvce_encoder *enc)
 213 {
 214         return LIST_ENTRY(struct rvce_cpb_slot, enc->cpb_slots.next->next, list);
 215 }
 216
 217 /**
 218  * Calculate the offsets into the CPB
 219  */
 220 void rvce_frame_offset(struct rvce_encoder *enc, struct rvce_cpb_slot *slot,
 221                        signed *luma_offset, signed *chroma_offset)
 222 {
 223         unsigned pitch = align(enc->luma->level[0].pitch_bytes, 128);
 224         unsigned vpitch = align(enc->luma->npix_y, 16);
 225         unsigned fsize = pitch * (vpitch + vpitch / 2);
 226
 227         *luma_offset = slot->index * fsize;
 228         *chroma_offset = *luma_offset + pitch * vpitch;
 229 }
 230
 231 /**
 232  * destroy this video encoder
 233  */
 234 static void rvce_destroy(struct pipe_video_codec *encoder)
 235 {
 236         struct rvce_encoder *enc = (struct rvce_encoder*)encoder;
 237         if (enc->stream_handle) {
 238                 struct rvid_buffer fb;
 239                 rvid_create_buffer(enc->screen, &fb, 512, PIPE_USAGE_STAGING);
 240                 enc->fb = &fb;
 241                 enc->session(enc);
 242                 enc->feedback(enc);
 243                 enc->destroy(enc);
 244                 flush(enc);
 245                 rvid_destroy_buffer(&fb);
 246         }
 247         rvid_destroy_buffer(&enc->cpb);
 248         enc->ws->cs_destroy(enc->cs);
 249         FREE(enc->cpb_array);
 250         FREE(enc);
 251 }
 252
 253 static void rvce_begin_frame(struct pipe_video_codec *encoder,
 254                              struct pipe_video_buffer *source,
 255                              struct pipe_picture_desc *picture)
 256 {
 257         struct rvce_encoder *enc = (struct rvce_encoder*)encoder;
 258         struct vl_video_buffer *vid_buf = (struct vl_video_buffer *)source;
 259         struct pipe_h264_enc_picture_desc *pic = (struct pipe_h264_enc_picture_desc *)picture;
 260
 261         bool need_rate_control =
 262                 enc->pic.rate_ctrl.rate_ctrl_method != pic->rate_ctrl.rate_ctrl_method ||
 263                 enc->pic.quant_i_frames != pic->quant_i_frames ||
 264                 enc->pic.quant_p_frames != pic->quant_p_frames ||
 265                 enc->pic.quant_b_frames != pic->quant_b_frames;
 266
 267         enc->pic = *pic;
 268
 269         enc->get_buffer(vid_buf->resources[0], &enc->handle, &enc->luma);
 270         enc->get_buffer(vid_buf->resources[1], NULL, &enc->chroma);
 271
 272         if (pic->picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR)
 273                 reset_cpb(enc);
 274         else if (pic->picture_type == PIPE_H264_ENC_PICTURE_TYPE_P ||
 275                  pic->picture_type == PIPE_H264_ENC_PICTURE_TYPE_B)
 276                 sort_cpb(enc);
 277
 278         if (!enc->stream_handle) {
 279                 struct rvid_buffer fb;
 280                 enc->stream_handle = rvid_alloc_stream_handle();
 281                 rvid_create_buffer(enc->screen, &fb, 512, PIPE_USAGE_STAGING);
 282                 enc->fb = &fb;
 283                 enc->session(enc);
 284                 enc->create(enc);
 285                 enc->config(enc);
 286                 enc->feedback(enc);
 287                 flush(enc);
 288                 //dump_feedback(enc, &fb);
 289                 rvid_destroy_buffer(&fb);
 290                 need_rate_control = false;
 291         }
 292
 293         if (need_rate_control) {
 294                 enc->session(enc);
 295                 enc->config(enc);
 296                 flush(enc);
 297         }
 298 }
 299
 300 static void rvce_encode_bitstream(struct pipe_video_codec *encoder,
 301                                   struct pipe_video_buffer *source,
 302                                   struct pipe_resource *destination,
 303                                   void **fb)
 304 {
 305         struct rvce_encoder *enc = (struct rvce_encoder*)encoder;
 306         enc->get_buffer(destination, &enc->bs_handle, NULL);
 307         enc->bs_size = destination->width0;
 308
 309         *fb = enc->fb = CALLOC_STRUCT(rvid_buffer);
 310         if (!rvid_create_buffer(enc->screen, enc->fb, 512, PIPE_USAGE_STAGING)) {
 311                 RVID_ERR("Can't create feedback buffer.\n");
 312                 return;
 313         }
 314         if (!enc->cs->cdw)
 315                 enc->session(enc);
 316         enc->encode(enc);
 317         enc->feedback(enc);
 318 }
 319
 320 static void rvce_end_frame(struct pipe_video_codec *encoder,
 321                            struct pipe_video_buffer *source,
 322                            struct pipe_picture_desc *picture)
 323 {
 324         struct rvce_encoder *enc = (struct rvce_encoder*)encoder;
 325         struct rvce_cpb_slot *slot = LIST_ENTRY(
 326                 struct rvce_cpb_slot, enc->cpb_slots.prev, list);
 327
 328         if (!enc->dual_inst || enc->bs_idx > 1)
 329                 flush(enc);
 330
 331         /* update the CPB backtrack with the just encoded frame */
 332         slot->picture_type = enc->pic.picture_type;
 333         slot->frame_num = enc->pic.frame_num;
 334         slot->pic_order_cnt = enc->pic.pic_order_cnt;
 335         if (!enc->pic.not_referenced) {
 336                 LIST_DEL(&slot->list);
 337                 LIST_ADD(&slot->list, &enc->cpb_slots);
 338         }
 339 }
 340
 341 static void rvce_get_feedback(struct pipe_video_codec *encoder,
 342                               void *feedback, unsigned *size)
 343 {
 344         struct rvce_encoder *enc = (struct rvce_encoder*)encoder;
 345         struct rvid_buffer *fb = feedback;
 346
 347         if (size) {
 348                 uint32_t *ptr = enc->ws->buffer_map(fb->res->cs_buf, enc->cs, PIPE_TRANSFER_READ_WRITE);
 349
 350                 if (ptr[1]) {
 351                         *size = ptr[4] - ptr[9];
 352                 } else {
 353                         *size = 0;
 354                 }
 355
 356                 enc->ws->buffer_unmap(fb->res->cs_buf);
 357         }
 358         //dump_feedback(enc, fb);
 359         rvid_destroy_buffer(fb);
 360         FREE(fb);
 361 }
 362
 363 /**
 364  * flush any outstanding command buffers to the hardware
 365  */
 366 static void rvce_flush(struct pipe_video_codec *encoder)
 367 {
 368         struct rvce_encoder *enc = (struct rvce_encoder*)encoder;
 369
 370         flush(enc);
 371 }
 372
 373 static void rvce_cs_flush(void *ctx, unsigned flags,
 374                           struct pipe_fence_handle **fence)
 375 {
 376         // just ignored
 377 }
 378
 379 struct pipe_video_codec *rvce_create_encoder(struct pipe_context *context,
 380                                              const struct pipe_video_codec *templ,
 381                                              struct radeon_winsys* ws,
 382                                              rvce_get_buffer get_buffer)
 383 {
 384         struct r600_common_screen *rscreen = (struct r600_common_screen *)context->screen;
 385         struct r600_common_context *rctx = (struct r600_common_context*)context;
 386         struct rvce_encoder *enc;
 387         struct pipe_video_buffer *tmp_buf, templat = {};
 388         struct radeon_surf *tmp_surf;
 389         unsigned cpb_size;
 390
 391         if (!rscreen->info.vce_fw_version) {
 392                 RVID_ERR("Kernel doesn't supports VCE!\n");
 393                 return NULL;
 394
 395         } else if (!rvce_is_fw_version_supported(rscreen)) {
 396                 RVID_ERR("Unsupported VCE fw version loaded!\n");
 397                 return NULL;
 398         }
 399
 400         enc = CALLOC_STRUCT(rvce_encoder);
 401         if (!enc)
 402                 return NULL;
 403
 404         if (rscreen->info.drm_major == 3)
 405                 enc->use_vm = true;
 406         if ((rscreen->info.drm_major > 2) || (rscreen->info.drm_minor >= 42))
 407                 enc->use_vui = true;
 408         if (rscreen->info.family >= CHIP_TONGA)
 409                 enc->dual_pipe = true;
 410         /* TODO enable B frame with dual instance */
 411         if ((rscreen->info.family >= CHIP_TONGA) &&
 412                 (templ->max_references == 1) &&
 413                 (rscreen->info.vce_harvest_config == 0))
 414                 enc->dual_inst = true;
 415
 416         enc->base = *templ;
 417         enc->base.context = context;
 418
 419         enc->base.destroy = rvce_destroy;
 420         enc->base.begin_frame = rvce_begin_frame;
 421         enc->base.encode_bitstream = rvce_encode_bitstream;
 422         enc->base.end_frame = rvce_end_frame;
 423         enc->base.flush = rvce_flush;
 424         enc->base.get_feedback = rvce_get_feedback;
 425         enc->get_buffer = get_buffer;
 426
 427         enc->screen = context->screen;
 428         enc->ws = ws;
 429         enc->cs = ws->cs_create(rctx->ctx, RING_VCE, rvce_cs_flush, enc, NULL);
 430         if (!enc->cs) {
 431                 RVID_ERR("Can't get command submission context.\n");
 432                 goto error;
 433         }
 434
 435         templat.buffer_format = PIPE_FORMAT_NV12;
 436         templat.chroma_format = PIPE_VIDEO_CHROMA_FORMAT_420;
 437         templat.width = enc->base.width;
 438         templat.height = enc->base.height;
 439         templat.interlaced = false;
 440         if (!(tmp_buf = context->create_video_buffer(context, &templat))) {
 441                 RVID_ERR("Can't create video buffer.\n");
 442                 goto error;
 443         }
 444
 445         enc->cpb_num = get_cpb_num(enc);
 446         if (!enc->cpb_num)
 447                 goto error;
 448
 449         get_buffer(((struct vl_video_buffer *)tmp_buf)->resources[0], NULL, &tmp_surf);
 450         cpb_size = align(tmp_surf->level[0].pitch_bytes, 128);
 451         cpb_size = cpb_size * align(tmp_surf->npix_y, 16);
 452         cpb_size = cpb_size * 3 / 2;
 453         cpb_size = cpb_size * enc->cpb_num;
 454         if (enc->dual_pipe)
 455                 cpb_size +=  RVCE_MAX_AUX_BUFFER_NUM *
 456                         RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE * 2;
 457         tmp_buf->destroy(tmp_buf);
 458         if (!rvid_create_buffer(enc->screen, &enc->cpb, cpb_size, PIPE_USAGE_DEFAULT)) {
 459                 RVID_ERR("Can't create CPB buffer.\n");
 460                 goto error;
 461         }
 462
 463         enc->cpb_array = CALLOC(enc->cpb_num, sizeof(struct rvce_cpb_slot));
 464         if (!enc->cpb_array)
 465                 goto error;
 466
 467         reset_cpb(enc);
 468
 469         switch (rscreen->info.vce_fw_version) {
 470         case FW_40_2_2:
 471                 radeon_vce_40_2_2_init(enc);
 472                 break;
 473
 474         case FW_50_0_1:
 475         case FW_50_1_2:
 476         case FW_50_10_2:
 477         case FW_50_17_3:
 478                 radeon_vce_50_init(enc);
 479                 break;
 480
 481         default:
 482                 goto error;
 483         }
 484
 485         return &enc->base;
 486
 487 error:
 488         if (enc->cs)
 489                 enc->ws->cs_destroy(enc->cs);
 490
 491         rvid_destroy_buffer(&enc->cpb);
 492
 493         FREE(enc->cpb_array);
 494         FREE(enc);
 495         return NULL;
 496 }
 497
 498 /**
 499  * check if kernel has the right fw version loaded
 500  */
 501 bool rvce_is_fw_version_supported(struct r600_common_screen *rscreen)
 502 {
 503         return rscreen->info.vce_fw_version == FW_40_2_2 ||
 504                 rscreen->info.vce_fw_version == FW_50_0_1 ||
 505                 rscreen->info.vce_fw_version == FW_50_1_2 ||
 506                 rscreen->info.vce_fw_version == FW_50_10_2 ||
 507                 rscreen->info.vce_fw_version == FW_50_17_3;
 508 }
 509
 510 /**
 511  * Add the buffer as relocation to the current command submission
 512  */
 513 void rvce_add_buffer(struct rvce_encoder *enc, struct radeon_winsys_cs_handle *buf,
 514                      enum radeon_bo_usage usage, enum radeon_bo_domain domain,
 515                      signed offset)
 516 {
 517         int reloc_idx;
 518
 519         reloc_idx = enc->ws->cs_add_buffer(enc->cs, buf, usage, domain, RADEON_PRIO_VCE);
 520         if (enc->use_vm) {
 521                 uint64_t addr;
 522                 addr = enc->ws->buffer_get_virtual_address(buf);
 523                 addr = addr + offset;
 524                 RVCE_CS(addr >> 32);
 525                 RVCE_CS(addr);
 526         } else {
 527                 RVCE_CS(reloc_idx * 4);
 528                 RVCE_CS(offset);
 529         }
 530 }