iris: Make iris_has_color_unresolved more generic
[mesa.git] / src / gallium / drivers / radeon / radeon_vce_50.c
1 /**************************************************************************
2 *
3 * Copyright 2013 Advanced Micro Devices, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #include "pipe/p_video_codec.h"
29 #include "radeon_vce.h"
30 #include "radeon_video.h"
31 #include "si_pipe.h"
32 #include "util/u_memory.h"
33 #include "util/u_video.h"
34 #include "vl/vl_video_buffer.h"
35
36 #include <stdio.h>
37
38 static void rate_control(struct rvce_encoder *enc)
39 {
40 RVCE_BEGIN(0x04000005); // rate control
41 RVCE_CS(enc->pic.rate_ctrl.rate_ctrl_method); // encRateControlMethod
42 RVCE_CS(enc->pic.rate_ctrl.target_bitrate); // encRateControlTargetBitRate
43 RVCE_CS(enc->pic.rate_ctrl.peak_bitrate); // encRateControlPeakBitRate
44 RVCE_CS(enc->pic.rate_ctrl.frame_rate_num); // encRateControlFrameRateNum
45 RVCE_CS(0x00000000); // encGOPSize
46 RVCE_CS(enc->pic.quant_i_frames); // encQP_I
47 RVCE_CS(enc->pic.quant_p_frames); // encQP_P
48 RVCE_CS(enc->pic.quant_b_frames); // encQP_B
49 RVCE_CS(enc->pic.rate_ctrl.vbv_buffer_size); // encVBVBufferSize
50 RVCE_CS(enc->pic.rate_ctrl.frame_rate_den); // encRateControlFrameRateDen
51 RVCE_CS(0x00000000); // encVBVBufferLevel
52 RVCE_CS(0x00000000); // encMaxAUSize
53 RVCE_CS(0x00000000); // encQPInitialMode
54 RVCE_CS(enc->pic.rate_ctrl.target_bits_picture); // encTargetBitsPerPicture
55 RVCE_CS(enc->pic.rate_ctrl.peak_bits_picture_integer); // encPeakBitsPerPictureInteger
56 RVCE_CS(enc->pic.rate_ctrl.peak_bits_picture_fraction); // encPeakBitsPerPictureFractional
57 RVCE_CS(0x00000000); // encMinQP
58 RVCE_CS(0x00000033); // encMaxQP
59 RVCE_CS(0x00000000); // encSkipFrameEnable
60 RVCE_CS(0x00000000); // encFillerDataEnable
61 RVCE_CS(0x00000000); // encEnforceHRD
62 RVCE_CS(0x00000000); // encBPicsDeltaQP
63 RVCE_CS(0x00000000); // encReferenceBPicsDeltaQP
64 RVCE_CS(0x00000000); // encRateControlReInitDisable
65 RVCE_CS(0x00000000); // encLCVBRInitQPFlag
66 RVCE_CS(0x00000000); // encLCVBRSATDBasedNonlinearBitBudgetFlag
67 RVCE_END();
68 }
69
70 static void encode(struct rvce_encoder *enc)
71 {
72 signed luma_offset, chroma_offset, bs_offset;
73 unsigned dep, bs_idx = enc->bs_idx++;
74 int i;
75
76 if (enc->dual_inst) {
77 if (bs_idx == 0)
78 dep = 1;
79 else if (enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR)
80 dep = 0;
81 else
82 dep = 2;
83 } else
84 dep = 0;
85
86 enc->task_info(enc, 0x00000003, dep, 0, bs_idx);
87
88 RVCE_BEGIN(0x05000001); // context buffer
89 RVCE_READWRITE(enc->cpb.res->buf, enc->cpb.res->domains, 0); // encodeContextAddressHi/Lo
90 RVCE_END();
91
92 bs_offset = -(signed)(bs_idx * enc->bs_size);
93
94 RVCE_BEGIN(0x05000004); // video bitstream buffer
95 RVCE_WRITE(enc->bs_handle, RADEON_DOMAIN_GTT, bs_offset); // videoBitstreamRingAddressHi/Lo
96 RVCE_CS(enc->bs_size); // videoBitstreamRingSize
97 RVCE_END();
98
99 if (enc->dual_pipe) {
100 unsigned aux_offset =
101 enc->cpb.res->buf->size - RVCE_MAX_AUX_BUFFER_NUM * RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE * 2;
102 RVCE_BEGIN(0x05000002); // auxiliary buffer
103 for (i = 0; i < 8; ++i) {
104 RVCE_CS(aux_offset);
105 aux_offset += RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE;
106 }
107 for (i = 0; i < 8; ++i)
108 RVCE_CS(RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE);
109 RVCE_END();
110 }
111
112 RVCE_BEGIN(0x03000001); // encode
113 RVCE_CS(enc->pic.frame_num ? 0x0 : 0x11); // insertHeaders
114 RVCE_CS(0x00000000); // pictureStructure
115 RVCE_CS(enc->bs_size); // allowedMaxBitstreamSize
116 RVCE_CS(0x00000000); // forceRefreshMap
117 RVCE_CS(0x00000000); // insertAUD
118 RVCE_CS(0x00000000); // endOfSequence
119 RVCE_CS(0x00000000); // endOfStream
120 RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM,
121 enc->luma->u.legacy.level[0].offset); // inputPictureLumaAddressHi/Lo
122 RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM,
123 enc->chroma->u.legacy.level[0].offset); // inputPictureChromaAddressHi/Lo
124 RVCE_CS(align(enc->luma->u.legacy.level[0].nblk_y, 16)); // encInputFrameYPitch
125 RVCE_CS(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe); // encInputPicLumaPitch
126 RVCE_CS(enc->chroma->u.legacy.level[0].nblk_x * enc->chroma->bpe); // encInputPicChromaPitch
127 if (enc->dual_pipe)
128 RVCE_CS(0x00000000); // encInputPic(Addr|Array)Mode,encDisable(TwoPipeMode|MBOffloading)
129 else
130 RVCE_CS(0x00010000); // encInputPic(Addr|Array)Mode,encDisable(TwoPipeMode|MBOffloading)
131 RVCE_CS(0x00000000); // encInputPicTileConfig
132 RVCE_CS(enc->pic.picture_type); // encPicType
133 RVCE_CS(enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR); // encIdrFlag
134 RVCE_CS(0x00000000); // encIdrPicId
135 RVCE_CS(0x00000000); // encMGSKeyPic
136 RVCE_CS(!enc->pic.not_referenced); // encReferenceFlag
137 RVCE_CS(0x00000000); // encTemporalLayerIndex
138 RVCE_CS(0x00000000); // num_ref_idx_active_override_flag
139 RVCE_CS(0x00000000); // num_ref_idx_l0_active_minus1
140 RVCE_CS(0x00000000); // num_ref_idx_l1_active_minus1
141
142 i = enc->pic.frame_num - enc->pic.ref_idx_l0;
143 if (i > 1 && enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_P) {
144 RVCE_CS(0x00000001); // encRefListModificationOp
145 RVCE_CS(i - 1); // encRefListModificationNum
146 } else {
147 RVCE_CS(0x00000000); // encRefListModificationOp
148 RVCE_CS(0x00000000); // encRefListModificationNum
149 }
150
151 for (i = 0; i < 3; ++i) {
152 RVCE_CS(0x00000000); // encRefListModificationOp
153 RVCE_CS(0x00000000); // encRefListModificationNum
154 }
155 for (i = 0; i < 4; ++i) {
156 RVCE_CS(0x00000000); // encDecodedPictureMarkingOp
157 RVCE_CS(0x00000000); // encDecodedPictureMarkingNum
158 RVCE_CS(0x00000000); // encDecodedPictureMarkingIdx
159 RVCE_CS(0x00000000); // encDecodedRefBasePictureMarkingOp
160 RVCE_CS(0x00000000); // encDecodedRefBasePictureMarkingNum
161 }
162
163 // encReferencePictureL0[0]
164 RVCE_CS(0x00000000); // pictureStructure
165 if (enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_P ||
166 enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_B) {
167 struct rvce_cpb_slot *l0 = si_l0_slot(enc);
168 si_vce_frame_offset(enc, l0, &luma_offset, &chroma_offset);
169 RVCE_CS(l0->picture_type); // encPicType
170 RVCE_CS(l0->frame_num); // frameNumber
171 RVCE_CS(l0->pic_order_cnt); // pictureOrderCount
172 RVCE_CS(luma_offset); // lumaOffset
173 RVCE_CS(chroma_offset); // chromaOffset
174 } else {
175 RVCE_CS(0x00000000); // encPicType
176 RVCE_CS(0x00000000); // frameNumber
177 RVCE_CS(0x00000000); // pictureOrderCount
178 RVCE_CS(0xffffffff); // lumaOffset
179 RVCE_CS(0xffffffff); // chromaOffset
180 }
181
182 // encReferencePictureL0[1]
183 RVCE_CS(0x00000000); // pictureStructure
184 RVCE_CS(0x00000000); // encPicType
185 RVCE_CS(0x00000000); // frameNumber
186 RVCE_CS(0x00000000); // pictureOrderCount
187 RVCE_CS(0xffffffff); // lumaOffset
188 RVCE_CS(0xffffffff); // chromaOffset
189
190 // encReferencePictureL1[0]
191 RVCE_CS(0x00000000); // pictureStructure
192 if (enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_B) {
193 struct rvce_cpb_slot *l1 = si_l1_slot(enc);
194 si_vce_frame_offset(enc, l1, &luma_offset, &chroma_offset);
195 RVCE_CS(l1->picture_type); // encPicType
196 RVCE_CS(l1->frame_num); // frameNumber
197 RVCE_CS(l1->pic_order_cnt); // pictureOrderCount
198 RVCE_CS(luma_offset); // lumaOffset
199 RVCE_CS(chroma_offset); // chromaOffset
200 } else {
201 RVCE_CS(0x00000000); // encPicType
202 RVCE_CS(0x00000000); // frameNumber
203 RVCE_CS(0x00000000); // pictureOrderCount
204 RVCE_CS(0xffffffff); // lumaOffset
205 RVCE_CS(0xffffffff); // chromaOffset
206 }
207
208 si_vce_frame_offset(enc, si_current_slot(enc), &luma_offset, &chroma_offset);
209 RVCE_CS(luma_offset); // encReconstructedLumaOffset
210 RVCE_CS(chroma_offset); // encReconstructedChromaOffset
211 RVCE_CS(0x00000000); // encColocBufferOffset
212 RVCE_CS(0x00000000); // encReconstructedRefBasePictureLumaOffset
213 RVCE_CS(0x00000000); // encReconstructedRefBasePictureChromaOffset
214 RVCE_CS(0x00000000); // encReferenceRefBasePictureLumaOffset
215 RVCE_CS(0x00000000); // encReferenceRefBasePictureChromaOffset
216 RVCE_CS(0x00000000); // pictureCount
217 RVCE_CS(enc->pic.frame_num); // frameNumber
218 RVCE_CS(enc->pic.pic_order_cnt); // pictureOrderCount
219 RVCE_CS(0x00000000); // numIPicRemainInRCGOP
220 RVCE_CS(0x00000000); // numPPicRemainInRCGOP
221 RVCE_CS(0x00000000); // numBPicRemainInRCGOP
222 RVCE_CS(0x00000000); // numIRPicRemainInRCGOP
223 RVCE_CS(0x00000000); // enableIntraRefresh
224 RVCE_END();
225 }
226
227 void si_vce_50_get_param(struct rvce_encoder *enc, struct pipe_h264_enc_picture_desc *pic)
228 {
229 }
230
231 void si_vce_50_init(struct rvce_encoder *enc)
232 {
233 si_vce_40_2_2_init(enc);
234
235 /* only the two below are different */
236 enc->rate_control = rate_control;
237 enc->encode = encode;
238 enc->si_get_pic_param = si_vce_50_get_param;
239 }