radeonsi: use MIN2 instead of expanded ?: operator
[mesa.git] / src / gallium / drivers / radeonsi / si_blit.c
1 /*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23
24 #include "si_pipe.h"
25 #include "util/u_format.h"
26 #include "util/u_surface.h"
27
28 enum si_blitter_op /* bitmask */
29 {
30 SI_SAVE_TEXTURES = 1,
31 SI_SAVE_FRAMEBUFFER = 2,
32 SI_SAVE_FRAGMENT_STATE = 4,
33 SI_DISABLE_RENDER_COND = 8,
34
35 SI_CLEAR = SI_SAVE_FRAGMENT_STATE,
36
37 SI_CLEAR_SURFACE = SI_SAVE_FRAMEBUFFER | SI_SAVE_FRAGMENT_STATE,
38
39 SI_COPY = SI_SAVE_FRAMEBUFFER | SI_SAVE_TEXTURES |
40 SI_SAVE_FRAGMENT_STATE | SI_DISABLE_RENDER_COND,
41
42 SI_BLIT = SI_SAVE_FRAMEBUFFER | SI_SAVE_TEXTURES |
43 SI_SAVE_FRAGMENT_STATE,
44
45 SI_DECOMPRESS = SI_SAVE_FRAMEBUFFER | SI_SAVE_FRAGMENT_STATE |
46 SI_DISABLE_RENDER_COND,
47
48 SI_COLOR_RESOLVE = SI_SAVE_FRAMEBUFFER | SI_SAVE_FRAGMENT_STATE
49 };
50
51 static void si_blitter_begin(struct pipe_context *ctx, enum si_blitter_op op)
52 {
53 struct si_context *sctx = (struct si_context *)ctx;
54
55 util_blitter_save_vertex_buffer_slot(sctx->blitter, sctx->vertex_buffer);
56 util_blitter_save_vertex_elements(sctx->blitter, sctx->vertex_elements);
57 util_blitter_save_vertex_shader(sctx->blitter, sctx->vs_shader.cso);
58 util_blitter_save_tessctrl_shader(sctx->blitter, sctx->tcs_shader.cso);
59 util_blitter_save_tesseval_shader(sctx->blitter, sctx->tes_shader.cso);
60 util_blitter_save_geometry_shader(sctx->blitter, sctx->gs_shader.cso);
61 util_blitter_save_so_targets(sctx->blitter, sctx->b.streamout.num_targets,
62 (struct pipe_stream_output_target**)sctx->b.streamout.targets);
63 util_blitter_save_rasterizer(sctx->blitter, sctx->queued.named.rasterizer);
64
65 if (op & SI_SAVE_FRAGMENT_STATE) {
66 util_blitter_save_blend(sctx->blitter, sctx->queued.named.blend);
67 util_blitter_save_depth_stencil_alpha(sctx->blitter, sctx->queued.named.dsa);
68 util_blitter_save_stencil_ref(sctx->blitter, &sctx->stencil_ref.state);
69 util_blitter_save_fragment_shader(sctx->blitter, sctx->ps_shader.cso);
70 util_blitter_save_sample_mask(sctx->blitter, sctx->sample_mask.sample_mask);
71 util_blitter_save_viewport(sctx->blitter, &sctx->b.viewports.states[0]);
72 util_blitter_save_scissor(sctx->blitter, &sctx->b.scissors.states[0]);
73 }
74
75 if (op & SI_SAVE_FRAMEBUFFER)
76 util_blitter_save_framebuffer(sctx->blitter, &sctx->framebuffer.state);
77
78 if (op & SI_SAVE_TEXTURES) {
79 util_blitter_save_fragment_sampler_states(
80 sctx->blitter, 2,
81 sctx->samplers[PIPE_SHADER_FRAGMENT].views.sampler_states);
82
83 util_blitter_save_fragment_sampler_views(sctx->blitter, 2,
84 sctx->samplers[PIPE_SHADER_FRAGMENT].views.views);
85 }
86
87 if (op & SI_DISABLE_RENDER_COND)
88 sctx->b.render_cond_force_off = true;
89 }
90
91 static void si_blitter_end(struct pipe_context *ctx)
92 {
93 struct si_context *sctx = (struct si_context *)ctx;
94
95 sctx->b.render_cond_force_off = false;
96 }
97
98 static unsigned u_max_sample(struct pipe_resource *r)
99 {
100 return r->nr_samples ? r->nr_samples - 1 : 0;
101 }
102
103 static void si_blit_decompress_depth(struct pipe_context *ctx,
104 struct r600_texture *texture,
105 struct r600_texture *staging,
106 unsigned first_level, unsigned last_level,
107 unsigned first_layer, unsigned last_layer,
108 unsigned first_sample, unsigned last_sample)
109 {
110 struct si_context *sctx = (struct si_context *)ctx;
111 unsigned layer, level, sample, checked_last_layer, max_layer, max_sample;
112 float depth = 1.0f;
113 const struct util_format_description *desc;
114 struct r600_texture *flushed_depth_texture = staging ?
115 staging : texture->flushed_depth_texture;
116
117 if (!staging && !texture->dirty_level_mask)
118 return;
119
120 max_sample = u_max_sample(&texture->resource.b.b);
121
122 desc = util_format_description(flushed_depth_texture->resource.b.b.format);
123
124 if (util_format_has_depth(desc))
125 sctx->dbcb_depth_copy_enabled = true;
126 if (util_format_has_stencil(desc))
127 sctx->dbcb_stencil_copy_enabled = true;
128
129 assert(sctx->dbcb_depth_copy_enabled || sctx->dbcb_stencil_copy_enabled);
130
131 for (level = first_level; level <= last_level; level++) {
132 if (!staging && !(texture->dirty_level_mask & (1 << level)))
133 continue;
134
135 /* The smaller the mipmap level, the less layers there are
136 * as far as 3D textures are concerned. */
137 max_layer = util_max_layer(&texture->resource.b.b, level);
138 checked_last_layer = MIN2(last_layer, max_layer);
139
140 for (layer = first_layer; layer <= checked_last_layer; layer++) {
141 for (sample = first_sample; sample <= last_sample; sample++) {
142 struct pipe_surface *zsurf, *cbsurf, surf_tmpl;
143
144 sctx->dbcb_copy_sample = sample;
145 si_mark_atom_dirty(sctx, &sctx->db_render_state);
146
147 surf_tmpl.format = texture->resource.b.b.format;
148 surf_tmpl.u.tex.level = level;
149 surf_tmpl.u.tex.first_layer = layer;
150 surf_tmpl.u.tex.last_layer = layer;
151
152 zsurf = ctx->create_surface(ctx, &texture->resource.b.b, &surf_tmpl);
153
154 surf_tmpl.format = flushed_depth_texture->resource.b.b.format;
155 cbsurf = ctx->create_surface(ctx,
156 (struct pipe_resource*)flushed_depth_texture, &surf_tmpl);
157
158 si_blitter_begin(ctx, SI_DECOMPRESS);
159 util_blitter_custom_depth_stencil(sctx->blitter, zsurf, cbsurf, 1 << sample,
160 sctx->custom_dsa_flush, depth);
161 si_blitter_end(ctx);
162
163 pipe_surface_reference(&zsurf, NULL);
164 pipe_surface_reference(&cbsurf, NULL);
165 }
166 }
167
168 /* The texture will always be dirty if some layers aren't flushed.
169 * I don't think this case can occur though. */
170 if (!staging &&
171 first_layer == 0 && last_layer == max_layer &&
172 first_sample == 0 && last_sample == max_sample) {
173 texture->dirty_level_mask &= ~(1 << level);
174 }
175 }
176
177 sctx->dbcb_depth_copy_enabled = false;
178 sctx->dbcb_stencil_copy_enabled = false;
179 si_mark_atom_dirty(sctx, &sctx->db_render_state);
180 }
181
182 static void si_blit_decompress_depth_in_place(struct si_context *sctx,
183 struct r600_texture *texture,
184 bool is_stencil_sampler,
185 unsigned first_level, unsigned last_level,
186 unsigned first_layer, unsigned last_layer)
187 {
188 struct pipe_surface *zsurf, surf_tmpl = {{0}};
189 unsigned layer, max_layer, checked_last_layer, level;
190 unsigned *dirty_level_mask;
191
192 if (is_stencil_sampler) {
193 sctx->db_flush_stencil_inplace = true;
194 dirty_level_mask = &texture->stencil_dirty_level_mask;
195 } else {
196 sctx->db_flush_depth_inplace = true;
197 dirty_level_mask = &texture->dirty_level_mask;
198 }
199 si_mark_atom_dirty(sctx, &sctx->db_render_state);
200
201 surf_tmpl.format = texture->resource.b.b.format;
202
203 for (level = first_level; level <= last_level; level++) {
204 if (!(*dirty_level_mask & (1 << level)))
205 continue;
206
207 surf_tmpl.u.tex.level = level;
208
209 /* The smaller the mipmap level, the less layers there are
210 * as far as 3D textures are concerned. */
211 max_layer = util_max_layer(&texture->resource.b.b, level);
212 checked_last_layer = MIN2(last_layer, max_layer);
213
214 for (layer = first_layer; layer <= checked_last_layer; layer++) {
215 surf_tmpl.u.tex.first_layer = layer;
216 surf_tmpl.u.tex.last_layer = layer;
217
218 zsurf = sctx->b.b.create_surface(&sctx->b.b, &texture->resource.b.b, &surf_tmpl);
219
220 si_blitter_begin(&sctx->b.b, SI_DECOMPRESS);
221 util_blitter_custom_depth_stencil(sctx->blitter, zsurf, NULL, ~0,
222 sctx->custom_dsa_flush,
223 1.0f);
224 si_blitter_end(&sctx->b.b);
225
226 pipe_surface_reference(&zsurf, NULL);
227 }
228
229 /* The texture will always be dirty if some layers aren't flushed.
230 * I don't think this case occurs often though. */
231 if (first_layer == 0 && last_layer == max_layer) {
232 *dirty_level_mask &= ~(1 << level);
233 }
234 }
235
236 sctx->db_flush_depth_inplace = false;
237 sctx->db_flush_stencil_inplace = false;
238 si_mark_atom_dirty(sctx, &sctx->db_render_state);
239 }
240
241 static void
242 si_flush_depth_textures(struct si_context *sctx,
243 struct si_textures_info *textures)
244 {
245 unsigned i;
246 unsigned mask = textures->depth_texture_mask;
247
248 while (mask) {
249 struct pipe_sampler_view *view;
250 struct si_sampler_view *sview;
251 struct r600_texture *tex;
252
253 i = u_bit_scan(&mask);
254
255 view = textures->views.views[i];
256 assert(view);
257 sview = (struct si_sampler_view*)view;
258
259 tex = (struct r600_texture *)view->texture;
260 assert(tex->is_depth && !tex->is_flushing_texture);
261
262 si_blit_decompress_depth_in_place(sctx, tex,
263 sview->is_stencil_sampler,
264 view->u.tex.first_level, view->u.tex.last_level,
265 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level));
266 }
267 }
268
269 static void si_blit_decompress_color(struct pipe_context *ctx,
270 struct r600_texture *rtex,
271 unsigned first_level, unsigned last_level,
272 unsigned first_layer, unsigned last_layer,
273 bool need_dcc_decompress)
274 {
275 struct si_context *sctx = (struct si_context *)ctx;
276 unsigned layer, level, checked_last_layer, max_layer;
277
278 if (!rtex->dirty_level_mask && !need_dcc_decompress)
279 return;
280
281 for (level = first_level; level <= last_level; level++) {
282 void* custom_blend;
283
284 if (!(rtex->dirty_level_mask & (1 << level)) && !need_dcc_decompress)
285 continue;
286
287 if (rtex->dcc_offset && need_dcc_decompress) {
288 custom_blend = sctx->custom_blend_dcc_decompress;
289 } else if (rtex->fmask.size) {
290 custom_blend = sctx->custom_blend_decompress;
291 } else {
292 custom_blend = sctx->custom_blend_fastclear;
293 }
294
295 /* The smaller the mipmap level, the less layers there are
296 * as far as 3D textures are concerned. */
297 max_layer = util_max_layer(&rtex->resource.b.b, level);
298 checked_last_layer = MIN2(last_layer, max_layer);
299
300 for (layer = first_layer; layer <= checked_last_layer; layer++) {
301 struct pipe_surface *cbsurf, surf_tmpl;
302
303 surf_tmpl.format = rtex->resource.b.b.format;
304 surf_tmpl.u.tex.level = level;
305 surf_tmpl.u.tex.first_layer = layer;
306 surf_tmpl.u.tex.last_layer = layer;
307 cbsurf = ctx->create_surface(ctx, &rtex->resource.b.b, &surf_tmpl);
308
309 si_blitter_begin(ctx, SI_DECOMPRESS);
310 util_blitter_custom_color(sctx->blitter, cbsurf, custom_blend);
311 si_blitter_end(ctx);
312
313 pipe_surface_reference(&cbsurf, NULL);
314 }
315
316 /* The texture will always be dirty if some layers aren't flushed.
317 * I don't think this case occurs often though. */
318 if (first_layer == 0 && last_layer == max_layer) {
319 rtex->dirty_level_mask &= ~(1 << level);
320 }
321 }
322 }
323
324 static void
325 si_decompress_sampler_color_textures(struct si_context *sctx,
326 struct si_textures_info *textures)
327 {
328 unsigned i;
329 unsigned mask = textures->compressed_colortex_mask;
330
331 while (mask) {
332 struct pipe_sampler_view *view;
333 struct r600_texture *tex;
334
335 i = u_bit_scan(&mask);
336
337 view = textures->views.views[i];
338 assert(view);
339
340 tex = (struct r600_texture *)view->texture;
341 assert(tex->cmask.size || tex->fmask.size || tex->dcc_offset);
342
343 si_blit_decompress_color(&sctx->b.b, tex,
344 view->u.tex.first_level, view->u.tex.last_level,
345 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level),
346 false);
347 }
348 }
349
350 static void
351 si_decompress_image_color_textures(struct si_context *sctx,
352 struct si_images_info *images)
353 {
354 unsigned i;
355 unsigned mask = images->compressed_colortex_mask;
356
357 while (mask) {
358 const struct pipe_image_view *view;
359 struct r600_texture *tex;
360
361 i = u_bit_scan(&mask);
362
363 view = &images->views[i];
364 assert(view->resource->target != PIPE_BUFFER);
365
366 tex = (struct r600_texture *)view->resource;
367 if (!tex->cmask.size && !tex->fmask.size && !tex->dcc_offset)
368 continue;
369
370 si_blit_decompress_color(&sctx->b.b, tex,
371 view->u.tex.level, view->u.tex.level,
372 0, util_max_layer(&tex->resource.b.b, view->u.tex.level),
373 false);
374 }
375 }
376
377 static void si_decompress_textures(struct si_context *sctx, int shader_start,
378 int shader_end)
379 {
380 unsigned compressed_colortex_counter;
381
382 if (sctx->blitter->running)
383 return;
384
385 /* Update the compressed_colortex_mask if necessary. */
386 compressed_colortex_counter = p_atomic_read(&sctx->screen->b.compressed_colortex_counter);
387 if (compressed_colortex_counter != sctx->b.last_compressed_colortex_counter) {
388 sctx->b.last_compressed_colortex_counter = compressed_colortex_counter;
389 si_update_compressed_colortex_masks(sctx);
390 }
391
392 /* Flush depth textures which need to be flushed. */
393 for (int i = shader_start; i < shader_end; i++) {
394 if (sctx->samplers[i].depth_texture_mask) {
395 si_flush_depth_textures(sctx, &sctx->samplers[i]);
396 }
397 if (sctx->samplers[i].compressed_colortex_mask) {
398 si_decompress_sampler_color_textures(sctx, &sctx->samplers[i]);
399 }
400 if (sctx->images[i].compressed_colortex_mask) {
401 si_decompress_image_color_textures(sctx, &sctx->images[i]);
402 }
403 }
404 }
405
406 void si_decompress_graphics_textures(struct si_context *sctx)
407 {
408 si_decompress_textures(sctx, 0, SI_NUM_GRAPHICS_SHADERS);
409 }
410
411 void si_decompress_compute_textures(struct si_context *sctx)
412 {
413 si_decompress_textures(sctx, SI_NUM_GRAPHICS_SHADERS, SI_NUM_SHADERS);
414 }
415
416 static void si_clear(struct pipe_context *ctx, unsigned buffers,
417 const union pipe_color_union *color,
418 double depth, unsigned stencil)
419 {
420 struct si_context *sctx = (struct si_context *)ctx;
421 struct pipe_framebuffer_state *fb = &sctx->framebuffer.state;
422 struct pipe_surface *zsbuf = fb->zsbuf;
423 struct r600_texture *zstex =
424 zsbuf ? (struct r600_texture*)zsbuf->texture : NULL;
425
426 if (buffers & PIPE_CLEAR_COLOR) {
427 evergreen_do_fast_color_clear(&sctx->b, fb,
428 &sctx->framebuffer.atom, &buffers,
429 &sctx->framebuffer.dirty_cbufs,
430 color);
431 if (!buffers)
432 return; /* all buffers have been fast cleared */
433 }
434
435 if (buffers & PIPE_CLEAR_COLOR) {
436 int i;
437
438 /* These buffers cannot use fast clear, make sure to disable expansion. */
439 for (i = 0; i < fb->nr_cbufs; i++) {
440 struct r600_texture *tex;
441
442 /* If not clearing this buffer, skip. */
443 if (!(buffers & (PIPE_CLEAR_COLOR0 << i)))
444 continue;
445
446 if (!fb->cbufs[i])
447 continue;
448
449 tex = (struct r600_texture *)fb->cbufs[i]->texture;
450 if (tex->fmask.size == 0)
451 tex->dirty_level_mask &= ~(1 << fb->cbufs[i]->u.tex.level);
452 }
453 }
454
455 if (zstex && zstex->htile_buffer &&
456 zsbuf->u.tex.level == 0 &&
457 zsbuf->u.tex.first_layer == 0 &&
458 zsbuf->u.tex.last_layer == util_max_layer(&zstex->resource.b.b, 0)) {
459 if (buffers & PIPE_CLEAR_DEPTH) {
460 /* Need to disable EXPCLEAR temporarily if clearing
461 * to a new value. */
462 if (zstex->depth_cleared && zstex->depth_clear_value != depth) {
463 sctx->db_depth_disable_expclear = true;
464 }
465
466 zstex->depth_clear_value = depth;
467 sctx->framebuffer.dirty_zsbuf = true;
468 si_mark_atom_dirty(sctx, &sctx->framebuffer.atom); /* updates DB_DEPTH_CLEAR */
469 sctx->db_depth_clear = true;
470 si_mark_atom_dirty(sctx, &sctx->db_render_state);
471 }
472
473 if (buffers & PIPE_CLEAR_STENCIL) {
474 stencil &= 0xff;
475
476 /* Need to disable EXPCLEAR temporarily if clearing
477 * to a new value. */
478 if (zstex->stencil_cleared && zstex->stencil_clear_value != stencil) {
479 sctx->db_stencil_disable_expclear = true;
480 }
481
482 zstex->stencil_clear_value = stencil;
483 sctx->framebuffer.dirty_zsbuf = true;
484 si_mark_atom_dirty(sctx, &sctx->framebuffer.atom); /* updates DB_STENCIL_CLEAR */
485 sctx->db_stencil_clear = true;
486 si_mark_atom_dirty(sctx, &sctx->db_render_state);
487 }
488 }
489
490 si_blitter_begin(ctx, SI_CLEAR);
491 util_blitter_clear(sctx->blitter, fb->width, fb->height,
492 util_framebuffer_get_num_layers(fb),
493 buffers, color, depth, stencil);
494 si_blitter_end(ctx);
495
496 if (sctx->db_depth_clear) {
497 sctx->db_depth_clear = false;
498 sctx->db_depth_disable_expclear = false;
499 zstex->depth_cleared = true;
500 si_mark_atom_dirty(sctx, &sctx->db_render_state);
501 }
502
503 if (sctx->db_stencil_clear) {
504 sctx->db_stencil_clear = false;
505 sctx->db_stencil_disable_expclear = false;
506 zstex->stencil_cleared = true;
507 si_mark_atom_dirty(sctx, &sctx->db_render_state);
508 }
509 }
510
511 static void si_clear_render_target(struct pipe_context *ctx,
512 struct pipe_surface *dst,
513 const union pipe_color_union *color,
514 unsigned dstx, unsigned dsty,
515 unsigned width, unsigned height)
516 {
517 struct si_context *sctx = (struct si_context *)ctx;
518
519 si_blitter_begin(ctx, SI_CLEAR_SURFACE);
520 util_blitter_clear_render_target(sctx->blitter, dst, color,
521 dstx, dsty, width, height);
522 si_blitter_end(ctx);
523 }
524
525 static void si_clear_depth_stencil(struct pipe_context *ctx,
526 struct pipe_surface *dst,
527 unsigned clear_flags,
528 double depth,
529 unsigned stencil,
530 unsigned dstx, unsigned dsty,
531 unsigned width, unsigned height)
532 {
533 struct si_context *sctx = (struct si_context *)ctx;
534
535 si_blitter_begin(ctx, SI_CLEAR_SURFACE);
536 util_blitter_clear_depth_stencil(sctx->blitter, dst, clear_flags, depth, stencil,
537 dstx, dsty, width, height);
538 si_blitter_end(ctx);
539 }
540
541 /* Helper for decompressing a portion of a color or depth resource before
542 * blitting if any decompression is needed.
543 * The driver doesn't decompress resources automatically while u_blitter is
544 * rendering. */
545 static void si_decompress_subresource(struct pipe_context *ctx,
546 struct pipe_resource *tex,
547 unsigned level,
548 unsigned first_layer, unsigned last_layer)
549 {
550 struct si_context *sctx = (struct si_context *)ctx;
551 struct r600_texture *rtex = (struct r600_texture*)tex;
552
553 if (rtex->is_depth && !rtex->is_flushing_texture) {
554 si_blit_decompress_depth_in_place(sctx, rtex, false,
555 level, level,
556 first_layer, last_layer);
557 if (rtex->surface.flags & RADEON_SURF_SBUFFER)
558 si_blit_decompress_depth_in_place(sctx, rtex, true,
559 level, level,
560 first_layer, last_layer);
561 } else if (rtex->fmask.size || rtex->cmask.size || rtex->dcc_offset) {
562 si_blit_decompress_color(ctx, rtex, level, level,
563 first_layer, last_layer, false);
564 }
565 }
566
567 struct texture_orig_info {
568 unsigned format;
569 unsigned width0;
570 unsigned height0;
571 unsigned npix_x;
572 unsigned npix_y;
573 unsigned npix0_x;
574 unsigned npix0_y;
575 };
576
577 void si_resource_copy_region(struct pipe_context *ctx,
578 struct pipe_resource *dst,
579 unsigned dst_level,
580 unsigned dstx, unsigned dsty, unsigned dstz,
581 struct pipe_resource *src,
582 unsigned src_level,
583 const struct pipe_box *src_box)
584 {
585 struct si_context *sctx = (struct si_context *)ctx;
586 struct pipe_surface *dst_view, dst_templ;
587 struct pipe_sampler_view src_templ, *src_view;
588 unsigned dst_width, dst_height, src_width0, src_height0;
589 unsigned src_force_level = 0;
590 struct pipe_box sbox, dstbox;
591
592 /* Handle buffers first. */
593 if (dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) {
594 si_copy_buffer(sctx, dst, src, dstx, src_box->x, src_box->width, false);
595 return;
596 }
597
598 assert(u_max_sample(dst) == u_max_sample(src));
599
600 /* The driver doesn't decompress resources automatically while
601 * u_blitter is rendering. */
602 si_decompress_subresource(ctx, src, src_level,
603 src_box->z, src_box->z + src_box->depth - 1);
604
605 dst_width = u_minify(dst->width0, dst_level);
606 dst_height = u_minify(dst->height0, dst_level);
607 src_width0 = src->width0;
608 src_height0 = src->height0;
609
610 util_blitter_default_dst_texture(&dst_templ, dst, dst_level, dstz);
611 util_blitter_default_src_texture(&src_templ, src, src_level);
612
613 if (util_format_is_compressed(src->format) ||
614 util_format_is_compressed(dst->format)) {
615 unsigned blocksize = util_format_get_blocksize(src->format);
616
617 if (blocksize == 8)
618 src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT; /* 64-bit block */
619 else
620 src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT; /* 128-bit block */
621 dst_templ.format = src_templ.format;
622
623 dst_width = util_format_get_nblocksx(dst->format, dst_width);
624 dst_height = util_format_get_nblocksy(dst->format, dst_height);
625 src_width0 = util_format_get_nblocksx(src->format, src_width0);
626 src_height0 = util_format_get_nblocksy(src->format, src_height0);
627
628 dstx = util_format_get_nblocksx(dst->format, dstx);
629 dsty = util_format_get_nblocksy(dst->format, dsty);
630
631 sbox.x = util_format_get_nblocksx(src->format, src_box->x);
632 sbox.y = util_format_get_nblocksy(src->format, src_box->y);
633 sbox.z = src_box->z;
634 sbox.width = util_format_get_nblocksx(src->format, src_box->width);
635 sbox.height = util_format_get_nblocksy(src->format, src_box->height);
636 sbox.depth = src_box->depth;
637 src_box = &sbox;
638
639 src_force_level = src_level;
640 } else if (!util_blitter_is_copy_supported(sctx->blitter, dst, src) ||
641 /* also *8_SNORM has precision issues, use UNORM instead */
642 util_format_is_snorm8(src->format)) {
643 if (util_format_is_subsampled_422(src->format)) {
644 src_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
645 dst_templ.format = PIPE_FORMAT_R8G8B8A8_UINT;
646
647 dst_width = util_format_get_nblocksx(dst->format, dst_width);
648 src_width0 = util_format_get_nblocksx(src->format, src_width0);
649
650 dstx = util_format_get_nblocksx(dst->format, dstx);
651
652 sbox = *src_box;
653 sbox.x = util_format_get_nblocksx(src->format, src_box->x);
654 sbox.width = util_format_get_nblocksx(src->format, src_box->width);
655 src_box = &sbox;
656 } else {
657 unsigned blocksize = util_format_get_blocksize(src->format);
658
659 switch (blocksize) {
660 case 1:
661 dst_templ.format = PIPE_FORMAT_R8_UNORM;
662 src_templ.format = PIPE_FORMAT_R8_UNORM;
663 break;
664 case 2:
665 dst_templ.format = PIPE_FORMAT_R8G8_UNORM;
666 src_templ.format = PIPE_FORMAT_R8G8_UNORM;
667 break;
668 case 4:
669 dst_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM;
670 src_templ.format = PIPE_FORMAT_R8G8B8A8_UNORM;
671 break;
672 case 8:
673 dst_templ.format = PIPE_FORMAT_R16G16B16A16_UINT;
674 src_templ.format = PIPE_FORMAT_R16G16B16A16_UINT;
675 break;
676 case 16:
677 dst_templ.format = PIPE_FORMAT_R32G32B32A32_UINT;
678 src_templ.format = PIPE_FORMAT_R32G32B32A32_UINT;
679 break;
680 default:
681 fprintf(stderr, "Unhandled format %s with blocksize %u\n",
682 util_format_short_name(src->format), blocksize);
683 assert(0);
684 }
685 }
686 }
687
688 /* Initialize the surface. */
689 dst_view = r600_create_surface_custom(ctx, dst, &dst_templ,
690 dst_width, dst_height);
691
692 /* Initialize the sampler view. */
693 src_view = si_create_sampler_view_custom(ctx, src, &src_templ,
694 src_width0, src_height0,
695 src_force_level);
696
697 u_box_3d(dstx, dsty, dstz, abs(src_box->width), abs(src_box->height),
698 abs(src_box->depth), &dstbox);
699
700 /* Copy. */
701 si_blitter_begin(ctx, SI_COPY);
702 util_blitter_blit_generic(sctx->blitter, dst_view, &dstbox,
703 src_view, src_box, src_width0, src_height0,
704 PIPE_MASK_RGBAZS, PIPE_TEX_FILTER_NEAREST, NULL,
705 FALSE);
706 si_blitter_end(ctx);
707
708 pipe_surface_reference(&dst_view, NULL);
709 pipe_sampler_view_reference(&src_view, NULL);
710 }
711
712 /* For MSAA integer resolving to work, we change the format to NORM using this function. */
713 static enum pipe_format int_to_norm_format(enum pipe_format format)
714 {
715 switch (format) {
716 #define REPLACE_FORMAT_SIGN(format,sign) \
717 case PIPE_FORMAT_##format##_##sign##INT: \
718 return PIPE_FORMAT_##format##_##sign##NORM
719 #define REPLACE_FORMAT(format) \
720 REPLACE_FORMAT_SIGN(format, U); \
721 REPLACE_FORMAT_SIGN(format, S)
722
723 REPLACE_FORMAT_SIGN(B10G10R10A2, U);
724 REPLACE_FORMAT(R8);
725 REPLACE_FORMAT(R8G8);
726 REPLACE_FORMAT(R8G8B8X8);
727 REPLACE_FORMAT(R8G8B8A8);
728 REPLACE_FORMAT(A8);
729 REPLACE_FORMAT(I8);
730 REPLACE_FORMAT(L8);
731 REPLACE_FORMAT(L8A8);
732 REPLACE_FORMAT(R16);
733 REPLACE_FORMAT(R16G16);
734 REPLACE_FORMAT(R16G16B16X16);
735 REPLACE_FORMAT(R16G16B16A16);
736 REPLACE_FORMAT(A16);
737 REPLACE_FORMAT(I16);
738 REPLACE_FORMAT(L16);
739 REPLACE_FORMAT(L16A16);
740
741 #undef REPLACE_FORMAT
742 #undef REPLACE_FORMAT_SIGN
743 default:
744 return format;
745 }
746 }
747
748 static bool do_hardware_msaa_resolve(struct pipe_context *ctx,
749 const struct pipe_blit_info *info)
750 {
751 struct si_context *sctx = (struct si_context*)ctx;
752 struct r600_texture *dst = (struct r600_texture*)info->dst.resource;
753 unsigned dst_width = u_minify(info->dst.resource->width0, info->dst.level);
754 unsigned dst_height = u_minify(info->dst.resource->height0, info->dst.level);
755 enum pipe_format format = int_to_norm_format(info->dst.format);
756 unsigned sample_mask = ~0;
757
758 /* Hardware MSAA resolve doesn't work if SPI format = NORM16_ABGR and
759 * the format is R16G16. Use R16A16, which does work.
760 */
761 if (format == PIPE_FORMAT_R16G16_UNORM)
762 format = PIPE_FORMAT_R16A16_UNORM;
763 if (format == PIPE_FORMAT_R16G16_SNORM)
764 format = PIPE_FORMAT_R16A16_SNORM;
765
766 if (info->src.resource->nr_samples > 1 &&
767 info->dst.resource->nr_samples <= 1 &&
768 util_max_layer(info->src.resource, 0) == 0 &&
769 util_max_layer(info->dst.resource, info->dst.level) == 0 &&
770 info->dst.format == info->src.format &&
771 !util_format_is_pure_integer(format) &&
772 !util_format_is_depth_or_stencil(format) &&
773 !info->scissor_enable &&
774 (info->mask & PIPE_MASK_RGBA) == PIPE_MASK_RGBA &&
775 dst_width == info->src.resource->width0 &&
776 dst_height == info->src.resource->height0 &&
777 info->dst.box.x == 0 &&
778 info->dst.box.y == 0 &&
779 info->dst.box.width == dst_width &&
780 info->dst.box.height == dst_height &&
781 info->dst.box.depth == 1 &&
782 info->src.box.x == 0 &&
783 info->src.box.y == 0 &&
784 info->src.box.width == dst_width &&
785 info->src.box.height == dst_height &&
786 info->src.box.depth == 1 &&
787 dst->surface.level[info->dst.level].mode >= RADEON_SURF_MODE_1D &&
788 !(dst->surface.flags & RADEON_SURF_SCANOUT) &&
789 (!dst->cmask.size || !dst->dirty_level_mask) && /* dst cannot be fast-cleared */
790 !dst->dcc_offset) {
791 si_blitter_begin(ctx, SI_COLOR_RESOLVE |
792 (info->render_condition_enable ? 0 : SI_DISABLE_RENDER_COND));
793 util_blitter_custom_resolve_color(sctx->blitter,
794 info->dst.resource, info->dst.level,
795 info->dst.box.z,
796 info->src.resource, info->src.box.z,
797 sample_mask, sctx->custom_blend_resolve,
798 format);
799 si_blitter_end(ctx);
800 return true;
801 }
802 return false;
803 }
804
805 static void si_blit(struct pipe_context *ctx,
806 const struct pipe_blit_info *info)
807 {
808 struct si_context *sctx = (struct si_context*)ctx;
809
810 if (do_hardware_msaa_resolve(ctx, info)) {
811 return;
812 }
813
814 assert(util_blitter_is_blit_supported(sctx->blitter, info));
815
816 /* The driver doesn't decompress resources automatically while
817 * u_blitter is rendering. */
818 si_decompress_subresource(ctx, info->src.resource, info->src.level,
819 info->src.box.z,
820 info->src.box.z + info->src.box.depth - 1);
821
822 if (sctx->screen->b.debug_flags & DBG_FORCE_DMA &&
823 util_try_blit_via_copy_region(ctx, info))
824 return;
825
826 si_blitter_begin(ctx, SI_BLIT |
827 (info->render_condition_enable ? 0 : SI_DISABLE_RENDER_COND));
828 util_blitter_blit(sctx->blitter, info);
829 si_blitter_end(ctx);
830 }
831
832 static void si_flush_resource(struct pipe_context *ctx,
833 struct pipe_resource *res)
834 {
835 struct r600_texture *rtex = (struct r600_texture*)res;
836
837 assert(res->target != PIPE_BUFFER);
838
839 if (!rtex->is_depth && (rtex->cmask.size || rtex->dcc_offset)) {
840 si_blit_decompress_color(ctx, rtex, 0, res->last_level,
841 0, util_max_layer(res, 0), false);
842 }
843 }
844
845 static void si_decompress_dcc(struct pipe_context *ctx,
846 struct r600_texture *rtex)
847 {
848 if (!rtex->dcc_offset)
849 return;
850
851 si_blit_decompress_color(ctx, rtex, 0, rtex->resource.b.b.last_level,
852 0, util_max_layer(&rtex->resource.b.b, 0),
853 true);
854 }
855
856 static void si_pipe_clear_buffer(struct pipe_context *ctx,
857 struct pipe_resource *dst,
858 unsigned offset, unsigned size,
859 const void *clear_value_ptr,
860 int clear_value_size)
861 {
862 struct si_context *sctx = (struct si_context*)ctx;
863 uint32_t dword_value;
864 unsigned i;
865
866 assert(offset % clear_value_size == 0);
867 assert(size % clear_value_size == 0);
868
869 if (clear_value_size > 4) {
870 const uint32_t *u32 = clear_value_ptr;
871 bool clear_dword_duplicated = true;
872
873 /* See if we can lower large fills to dword fills. */
874 for (i = 1; i < clear_value_size / 4; i++)
875 if (u32[0] != u32[i]) {
876 clear_dword_duplicated = false;
877 break;
878 }
879
880 if (!clear_dword_duplicated) {
881 /* Use transform feedback for 64-bit, 96-bit, and
882 * 128-bit fills.
883 */
884 union pipe_color_union clear_value;
885
886 memcpy(&clear_value, clear_value_ptr, clear_value_size);
887 si_blitter_begin(ctx, SI_DISABLE_RENDER_COND);
888 util_blitter_clear_buffer(sctx->blitter, dst, offset,
889 size, clear_value_size / 4,
890 &clear_value);
891 si_blitter_end(ctx);
892 return;
893 }
894 }
895
896 /* Expand the clear value to a dword. */
897 switch (clear_value_size) {
898 case 1:
899 dword_value = *(uint8_t*)clear_value_ptr;
900 dword_value |= (dword_value << 8) |
901 (dword_value << 16) |
902 (dword_value << 24);
903 break;
904 case 2:
905 dword_value = *(uint16_t*)clear_value_ptr;
906 dword_value |= dword_value << 16;
907 break;
908 default:
909 dword_value = *(uint32_t*)clear_value_ptr;
910 }
911
912 sctx->b.clear_buffer(ctx, dst, offset, size, dword_value, false);
913 }
914
915 void si_init_blit_functions(struct si_context *sctx)
916 {
917 sctx->b.b.clear = si_clear;
918 sctx->b.b.clear_buffer = si_pipe_clear_buffer;
919 sctx->b.b.clear_render_target = si_clear_render_target;
920 sctx->b.b.clear_depth_stencil = si_clear_depth_stencil;
921 sctx->b.b.resource_copy_region = si_resource_copy_region;
922 sctx->b.b.blit = si_blit;
923 sctx->b.b.flush_resource = si_flush_resource;
924 sctx->b.blit_decompress_depth = si_blit_decompress_depth;
925 sctx->b.decompress_dcc = si_decompress_dcc;
926 }