2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
29 #include "si_shader.h"
31 #ifdef PIPE_ARCH_BIG_ENDIAN
32 #define SI_BIG_ENDIAN 1
34 #define SI_BIG_ENDIAN 0
37 /* The base vertex and primitive restart can be any number, but we must pick
38 * one which will mean "unknown" for the purpose of state tracking and
39 * the number shouldn't be a commonly-used one. */
40 #define SI_BASE_VERTEX_UNKNOWN INT_MIN
41 #define SI_RESTART_INDEX_UNKNOWN INT_MIN
42 #define SI_NUM_SMOOTH_AA_SAMPLES 8
43 #define SI_GS_PER_ES 128
45 /* Instruction cache. */
46 #define SI_CONTEXT_INV_ICACHE (R600_CONTEXT_PRIVATE_FLAG << 0)
47 /* SMEM L1, other names: KCACHE, constant cache, DCACHE, data cache */
48 #define SI_CONTEXT_INV_SMEM_L1 (R600_CONTEXT_PRIVATE_FLAG << 1)
49 /* VMEM L1 can optionally be bypassed (GLC=1). Other names: TC L1 */
50 #define SI_CONTEXT_INV_VMEM_L1 (R600_CONTEXT_PRIVATE_FLAG << 2)
51 /* Used by everything except CB/DB, can be bypassed (SLC=1). Other names: TC L2 */
52 #define SI_CONTEXT_INV_GLOBAL_L2 (R600_CONTEXT_PRIVATE_FLAG << 3)
53 /* Write dirty L2 lines back to memory (shader and CP DMA stores), but don't
54 * invalidate L2. SI-CIK can't do it, so they will do complete invalidation. */
55 #define SI_CONTEXT_WRITEBACK_GLOBAL_L2 (R600_CONTEXT_PRIVATE_FLAG << 4)
56 /* Framebuffer caches. */
57 #define SI_CONTEXT_FLUSH_AND_INV_CB_META (R600_CONTEXT_PRIVATE_FLAG << 5)
58 #define SI_CONTEXT_FLUSH_AND_INV_DB_META (R600_CONTEXT_PRIVATE_FLAG << 6)
59 #define SI_CONTEXT_FLUSH_AND_INV_DB (R600_CONTEXT_PRIVATE_FLAG << 7)
60 #define SI_CONTEXT_FLUSH_AND_INV_CB (R600_CONTEXT_PRIVATE_FLAG << 8)
61 /* Engine synchronization. */
62 #define SI_CONTEXT_VS_PARTIAL_FLUSH (R600_CONTEXT_PRIVATE_FLAG << 9)
63 #define SI_CONTEXT_PS_PARTIAL_FLUSH (R600_CONTEXT_PRIVATE_FLAG << 10)
64 #define SI_CONTEXT_CS_PARTIAL_FLUSH (R600_CONTEXT_PRIVATE_FLAG << 11)
65 #define SI_CONTEXT_VGT_FLUSH (R600_CONTEXT_PRIVATE_FLAG << 12)
66 #define SI_CONTEXT_VGT_STREAMOUT_SYNC (R600_CONTEXT_PRIVATE_FLAG << 13)
68 #define SI_CONTEXT_FLUSH_AND_INV_FRAMEBUFFER (SI_CONTEXT_FLUSH_AND_INV_CB | \
69 SI_CONTEXT_FLUSH_AND_INV_CB_META | \
70 SI_CONTEXT_FLUSH_AND_INV_DB | \
71 SI_CONTEXT_FLUSH_AND_INV_DB_META)
73 #define SI_MAX_BORDER_COLORS 4096
77 struct u_suballocator
;
80 struct r600_common_screen b
;
81 unsigned gs_table_depth
;
82 unsigned tess_offchip_block_dw_size
;
83 bool has_distributed_tess
;
84 bool has_draw_indirect_multi
;
87 /* Whether shaders are monolithic (1-part) or separate (3-part). */
88 bool use_monolithic_shaders
;
91 pipe_mutex shader_parts_mutex
;
92 struct si_shader_part
*vs_prologs
;
93 struct si_shader_part
*vs_epilogs
;
94 struct si_shader_part
*tcs_epilogs
;
95 struct si_shader_part
*gs_prologs
;
96 struct si_shader_part
*ps_prologs
;
97 struct si_shader_part
*ps_epilogs
;
99 /* Shader cache in memory.
101 * Design & limitations:
102 * - The shader cache is per screen (= per process), never saved to
103 * disk, and skips redundant shader compilations from TGSI to bytecode.
104 * - It can only be used with one-variant-per-shader support, in which
105 * case only the main (typically middle) part of shaders is cached.
106 * - Only VS, TCS, TES, PS are cached, out of which only the hw VS
107 * variants of VS and TES are cached, so LS and ES aren't.
108 * - GS and CS aren't cached, but it's certainly possible to cache
111 pipe_mutex shader_cache_mutex
;
112 struct hash_table
*shader_cache
;
114 /* Shader compiler queue for multithreaded compilation. */
115 struct util_queue shader_compiler_queue
;
116 LLVMTargetMachineRef tm
[4]; /* used by the queue only */
119 struct si_blend_color
{
120 struct r600_atom atom
;
121 struct pipe_blend_color state
;
124 struct si_sampler_view
{
125 struct pipe_sampler_view base
;
126 /* [0..7] = image descriptor
127 * [4..7] = buffer descriptor */
129 uint32_t fmask_state
[8];
130 const struct radeon_surf_level
*base_level_info
;
132 unsigned block_width
;
133 bool is_stencil_sampler
;
136 #define SI_SAMPLER_STATE_MAGIC 0x34f1c35a
138 struct si_sampler_state
{
145 struct si_cs_shader_state
{
146 struct si_compute
*program
;
147 struct si_compute
*emitted_program
;
153 struct si_textures_info
{
154 struct si_sampler_views views
;
155 uint32_t depth_texture_mask
; /* which textures are depth */
156 uint32_t compressed_colortex_mask
;
159 struct si_images_info
{
160 struct pipe_image_view views
[SI_NUM_IMAGES
];
161 uint32_t compressed_colortex_mask
;
162 unsigned enabled_mask
;
165 struct si_framebuffer
{
166 struct r600_atom atom
;
167 struct pipe_framebuffer_state state
;
169 unsigned log_samples
;
170 unsigned compressed_cb_mask
;
171 unsigned colorbuf_enabled_4bit
;
172 unsigned spi_shader_col_format
;
173 unsigned spi_shader_col_format_alpha
;
174 unsigned spi_shader_col_format_blend
;
175 unsigned spi_shader_col_format_blend_alpha
;
176 unsigned color_is_int8
; /* bitmask */
177 unsigned dirty_cbufs
;
182 struct si_clip_state
{
183 struct r600_atom atom
;
184 struct pipe_clip_state state
;
187 struct si_sample_locs
{
188 struct r600_atom atom
;
192 struct si_sample_mask
{
193 struct r600_atom atom
;
194 uint16_t sample_mask
;
197 /* A shader state consists of the shader selector, which is a constant state
198 * object shared by multiple contexts and shouldn't be modified, and
199 * the current shader variant selected for this context.
201 struct si_shader_ctx_state
{
202 struct si_shader_selector
*cso
;
203 struct si_shader
*current
;
207 struct r600_common_context b
;
208 struct blitter_context
*blitter
;
209 void *custom_dsa_flush
;
210 void *custom_blend_resolve
;
211 void *custom_blend_decompress
;
212 void *custom_blend_fastclear
;
213 void *custom_blend_dcc_decompress
;
214 struct si_screen
*screen
;
216 struct radeon_winsys_cs
*ce_ib
;
217 struct radeon_winsys_cs
*ce_preamble_ib
;
218 bool ce_need_synchronization
;
219 struct u_suballocator
*ce_suballocator
;
221 struct si_shader_ctx_state fixed_func_tcs_shader
;
222 LLVMTargetMachineRef tm
; /* only non-threaded compilation */
223 bool gfx_flush_in_progress
;
224 bool compute_is_busy
;
226 /* Atoms (direct states). */
227 union si_state_atoms atoms
;
228 unsigned dirty_atoms
; /* mask */
229 /* PM4 states (precomputed immutable states) */
230 union si_state queued
;
231 union si_state emitted
;
233 /* Atom declarations. */
234 struct si_framebuffer framebuffer
;
235 struct si_sample_locs msaa_sample_locs
;
236 struct r600_atom db_render_state
;
237 struct r600_atom msaa_config
;
238 struct si_sample_mask sample_mask
;
239 struct r600_atom cb_render_state
;
240 struct si_blend_color blend_color
;
241 struct r600_atom clip_regs
;
242 struct si_clip_state clip_state
;
243 struct si_shader_data shader_userdata
;
244 struct si_stencil_ref stencil_ref
;
245 struct r600_atom spi_map
;
247 /* Precomputed states. */
248 struct si_pm4_state
*init_config
;
249 struct si_pm4_state
*init_config_gs_rings
;
250 bool init_config_has_vgt_flush
;
251 struct si_pm4_state
*vgt_shader_config
[4];
254 struct si_shader_ctx_state ps_shader
;
255 struct si_shader_ctx_state gs_shader
;
256 struct si_shader_ctx_state vs_shader
;
257 struct si_shader_ctx_state tcs_shader
;
258 struct si_shader_ctx_state tes_shader
;
259 struct si_cs_shader_state cs_shader_state
;
261 /* shader information */
262 struct si_vertex_element
*vertex_elements
;
263 unsigned sprite_coord_enable
;
265 bool do_update_shaders
;
267 /* shader descriptors */
268 struct si_descriptors vertex_buffers
;
269 struct si_descriptors descriptors
[SI_NUM_DESCS
];
270 unsigned descriptors_dirty
;
271 struct si_buffer_resources rw_buffers
;
272 struct si_buffer_resources const_buffers
[SI_NUM_SHADERS
];
273 struct si_buffer_resources shader_buffers
[SI_NUM_SHADERS
];
274 struct si_textures_info samplers
[SI_NUM_SHADERS
];
275 struct si_images_info images
[SI_NUM_SHADERS
];
277 /* other shader resources */
278 struct pipe_constant_buffer null_const_buf
; /* used for set_constant_buffer(NULL) on CIK */
279 struct pipe_resource
*esgs_ring
;
280 struct pipe_resource
*gsvs_ring
;
281 struct pipe_resource
*tf_ring
;
282 struct pipe_resource
*tess_offchip_ring
;
283 union pipe_color_union
*border_color_table
; /* in CPU memory, any endian */
284 struct r600_resource
*border_color_buffer
;
285 union pipe_color_union
*border_color_map
; /* in VRAM (slow access), little endian */
286 unsigned border_color_count
;
288 /* Vertex and index buffers. */
289 bool vertex_buffers_dirty
;
290 struct pipe_index_buffer index_buffer
;
291 struct pipe_vertex_buffer vertex_buffer
[SI_NUM_VERTEX_BUFFERS
];
293 /* MSAA config state. */
295 bool smoothing_enabled
;
297 /* DB render state. */
298 bool dbcb_depth_copy_enabled
;
299 bool dbcb_stencil_copy_enabled
;
300 unsigned dbcb_copy_sample
;
301 bool db_flush_depth_inplace
;
302 bool db_flush_stencil_inplace
;
304 bool db_depth_disable_expclear
;
305 bool db_stencil_clear
;
306 bool db_stencil_disable_expclear
;
307 unsigned ps_db_shader_control
;
308 bool occlusion_queries_disabled
;
310 /* Emitted draw state. */
312 int last_base_vertex
;
313 int last_start_instance
;
315 int last_sh_base_reg
;
316 int last_primitive_restart_en
;
317 int last_restart_index
;
318 int last_gs_out_prim
;
320 int last_multi_vgt_param
;
322 unsigned last_sc_line_stipple
;
323 int last_vtx_reuse_depth
;
324 int current_rast_prim
; /* primitive type after TES, GS */
325 bool gs_tri_strip_adj_fix
;
328 struct r600_resource
*scratch_buffer
;
329 bool emit_scratch_reloc
;
330 unsigned scratch_waves
;
331 unsigned spi_tmpring_size
;
333 struct r600_resource
*compute_scratch_buffer
;
335 /* Emitted derived tessellation state. */
336 struct si_shader
*last_ls
; /* local shader (VS) */
337 struct si_shader_selector
*last_tcs
;
338 int last_num_tcs_input_cp
;
339 int last_tes_sh_base
;
340 unsigned last_num_patches
;
344 struct radeon_saved_cs last_gfx
;
345 struct r600_resource
*last_trace_buf
;
346 struct r600_resource
*trace_buf
;
348 uint64_t dmesg_timestamp
;
349 unsigned apitrace_call_number
;
352 bool need_check_render_feedback
;
356 void cik_init_sdma_functions(struct si_context
*sctx
);
359 void si_init_blit_functions(struct si_context
*sctx
);
360 void si_decompress_graphics_textures(struct si_context
*sctx
);
361 void si_decompress_compute_textures(struct si_context
*sctx
);
362 void si_resource_copy_region(struct pipe_context
*ctx
,
363 struct pipe_resource
*dst
,
365 unsigned dstx
, unsigned dsty
, unsigned dstz
,
366 struct pipe_resource
*src
,
368 const struct pipe_box
*src_box
);
371 #define SI_CPDMA_SKIP_CHECK_CS_SPACE (1 << 0) /* don't call need_cs_space */
372 #define SI_CPDMA_SKIP_SYNC_AFTER (1 << 1) /* don't wait for DMA after the copy */
373 #define SI_CPDMA_SKIP_SYNC_BEFORE (1 << 2) /* don't wait for DMA before the copy (RAW hazards) */
374 #define SI_CPDMA_SKIP_GFX_SYNC (1 << 3) /* don't flush caches and don't wait for PS/CS */
376 void si_copy_buffer(struct si_context
*sctx
,
377 struct pipe_resource
*dst
, struct pipe_resource
*src
,
378 uint64_t dst_offset
, uint64_t src_offset
, unsigned size
,
379 unsigned user_flags
);
380 void cik_prefetch_TC_L2_async(struct si_context
*sctx
, struct pipe_resource
*buf
,
381 uint64_t offset
, unsigned size
);
382 void si_init_cp_dma_functions(struct si_context
*sctx
);
385 void si_init_debug_functions(struct si_context
*sctx
);
386 void si_check_vm_faults(struct r600_common_context
*ctx
,
387 struct radeon_saved_cs
*saved
, enum ring_type ring
);
388 bool si_replace_shader(unsigned num
, struct radeon_shader_binary
*binary
);
391 void si_init_dma_functions(struct si_context
*sctx
);
393 /* si_hw_context.c */
394 void si_context_gfx_flush(void *context
, unsigned flags
,
395 struct pipe_fence_handle
**fence
);
396 void si_begin_new_cs(struct si_context
*ctx
);
397 void si_need_cs_space(struct si_context
*ctx
);
400 void si_init_compute_functions(struct si_context
*sctx
);
402 /* si_perfcounters.c */
403 void si_init_perfcounters(struct si_screen
*screen
);
406 struct pipe_video_codec
*si_uvd_create_decoder(struct pipe_context
*context
,
407 const struct pipe_video_codec
*templ
);
409 struct pipe_video_buffer
*si_video_buffer_create(struct pipe_context
*pipe
,
410 const struct pipe_video_buffer
*tmpl
);
417 si_invalidate_draw_sh_constants(struct si_context
*sctx
)
419 sctx
->last_base_vertex
= SI_BASE_VERTEX_UNKNOWN
;
423 si_set_atom_dirty(struct si_context
*sctx
,
424 struct r600_atom
*atom
, bool dirty
)
426 unsigned bit
= 1 << (atom
->id
- 1);
429 sctx
->dirty_atoms
|= bit
;
431 sctx
->dirty_atoms
&= ~bit
;
435 si_is_atom_dirty(struct si_context
*sctx
,
436 struct r600_atom
*atom
)
438 unsigned bit
= 1 << (atom
->id
- 1);
440 return sctx
->dirty_atoms
& bit
;
444 si_mark_atom_dirty(struct si_context
*sctx
,
445 struct r600_atom
*atom
)
447 si_set_atom_dirty(sctx
, atom
, true);
450 static inline struct tgsi_shader_info
*si_get_vs_info(struct si_context
*sctx
)
452 if (sctx
->gs_shader
.cso
)
453 return &sctx
->gs_shader
.cso
->info
;
454 else if (sctx
->tes_shader
.cso
)
455 return &sctx
->tes_shader
.cso
->info
;
456 else if (sctx
->vs_shader
.cso
)
457 return &sctx
->vs_shader
.cso
->info
;
462 static inline struct si_shader
* si_get_vs_state(struct si_context
*sctx
)
464 if (sctx
->gs_shader
.current
)
465 return sctx
->gs_shader
.cso
->gs_copy_shader
;
466 else if (sctx
->tes_shader
.current
)
467 return sctx
->tes_shader
.current
;
469 return sctx
->vs_shader
.current
;
472 static inline bool si_vs_exports_prim_id(struct si_shader
*shader
)
474 if (shader
->selector
->type
== PIPE_SHADER_VERTEX
)
475 return shader
->key
.part
.vs
.epilog
.export_prim_id
;
476 else if (shader
->selector
->type
== PIPE_SHADER_TESS_EVAL
)
477 return shader
->key
.part
.tes
.epilog
.export_prim_id
;