src/gallium/drivers/radeonsi/si_pm4.h

   1 /*
   2  * Copyright 2012 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Christian König <christian.koenig@amd.com>
  25  */
  26
  27 #ifndef SI_PM4_H
  28 #define SI_PM4_H
  29
  30 #include "radeon/radeon_winsys.h"
  31
  32 #define SI_PM4_MAX_DW           160
  33 #define SI_PM4_MAX_BO           1
  34
  35 // forward defines
  36 struct si_context;
  37 enum chip_class;
  38
  39 struct si_pm4_state
  40 {
  41         /* optional indirect buffer */
  42         struct r600_resource    *indirect_buffer;
  43
  44         /* PKT3_SET_*_REG handling */
  45         unsigned        last_opcode;
  46         unsigned        last_reg;
  47         unsigned        last_pm4;
  48
  49         /* commands for the DE */
  50         unsigned        ndw;
  51         uint32_t        pm4[SI_PM4_MAX_DW];
  52
  53         /* BO's referenced by this state */
  54         unsigned                nbo;
  55         struct r600_resource    *bo[SI_PM4_MAX_BO];
  56         enum radeon_bo_usage    bo_usage[SI_PM4_MAX_BO];
  57         enum radeon_bo_priority bo_priority[SI_PM4_MAX_BO];
  58
  59         bool compute_pkt;
  60 };
  61
  62 void si_pm4_cmd_begin(struct si_pm4_state *state, unsigned opcode);
  63 void si_pm4_cmd_add(struct si_pm4_state *state, uint32_t dw);
  64 void si_pm4_cmd_end(struct si_pm4_state *state, bool predicate);
  65
  66 void si_pm4_set_reg(struct si_pm4_state *state, unsigned reg, uint32_t val);
  67 void si_pm4_add_bo(struct si_pm4_state *state,
  68                    struct r600_resource *bo,
  69                    enum radeon_bo_usage usage,
  70                    enum radeon_bo_priority priority);
  71 void si_pm4_upload_indirect_buffer(struct si_context *sctx,
  72                                    struct si_pm4_state *state);
  73
  74 void si_pm4_free_state_simple(struct si_pm4_state *state);
  75 void si_pm4_free_state(struct si_context *sctx,
  76                        struct si_pm4_state *state,
  77                        unsigned idx);
  78
  79 void si_pm4_emit(struct si_context *sctx, struct si_pm4_state *state);
  80 void si_pm4_emit_dirty(struct si_context *sctx);
  81 void si_pm4_reset_emitted(struct si_context *sctx);
  82
  83 #endif