src/gallium/drivers/radeonsi/si_shader_internal.h

   1 /*
   2  * Copyright 2016 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23
  24 #ifndef SI_SHADER_PRIVATE_H
  25 #define SI_SHADER_PRIVATE_H
  26
  27 #include "si_shader.h"
  28 #include "gallivm/lp_bld_flow.h"
  29 #include "gallivm/lp_bld_init.h"
  30 #include "gallivm/lp_bld_tgsi.h"
  31 #include "tgsi/tgsi_parse.h"
  32 #include "ac_llvm_util.h"
  33 #include "ac_llvm_build.h"
  34
  35 #include <llvm-c/Core.h>
  36 #include <llvm-c/TargetMachine.h>
  37
  38 struct pipe_debug_callback;
  39 struct ac_shader_binary;
  40
  41 #define RADEON_LLVM_MAX_INPUT_SLOTS 32
  42 #define RADEON_LLVM_MAX_INPUTS 32 * 4
  43 #define RADEON_LLVM_MAX_OUTPUTS 32 * 4
  44
  45 #define RADEON_LLVM_INITIAL_CF_DEPTH 4
  46
  47 #define RADEON_LLVM_MAX_SYSTEM_VALUES 11
  48 #define RADEON_LLVM_MAX_ADDRS 16
  49
  50 struct si_llvm_flow;
  51
  52 struct si_shader_context {
  53         struct lp_build_tgsi_context bld_base;
  54         struct gallivm_state gallivm;
  55         struct ac_llvm_context ac;
  56         struct si_shader *shader;
  57         struct si_screen *screen;
  58
  59         unsigned type; /* PIPE_SHADER_* specifies the type of shader. */
  60
  61         /* For clamping the non-constant index in resource indexing: */
  62         unsigned num_const_buffers;
  63         unsigned num_shader_buffers;
  64         unsigned num_images;
  65         unsigned num_samplers;
  66
  67         /* Whether the prolog will be compiled separately. */
  68         bool separate_prolog;
  69
  70         /** This function is responsible for initilizing the inputs array and will be
  71           * called once for each input declared in the TGSI shader.
  72           */
  73         void (*load_input)(struct si_shader_context *,
  74                            unsigned input_index,
  75                            const struct tgsi_full_declaration *decl,
  76                            LLVMValueRef out[4]);
  77
  78         void (*load_system_value)(struct si_shader_context *,
  79                                   unsigned index,
  80                                   const struct tgsi_full_declaration *decl);
  81
  82         void (*declare_memory_region)(struct si_shader_context *,
  83                                       const struct tgsi_full_declaration *decl);
  84
  85         /** This array contains the input values for the shader.  Typically these
  86           * values will be in the form of a target intrinsic that will inform the
  87           * backend how to load the actual inputs to the shader.
  88           */
  89         struct tgsi_full_declaration input_decls[RADEON_LLVM_MAX_INPUT_SLOTS];
  90         LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS];
  91         LLVMValueRef outputs[RADEON_LLVM_MAX_OUTPUTS][TGSI_NUM_CHANNELS];
  92         LLVMValueRef addrs[RADEON_LLVM_MAX_ADDRS][TGSI_NUM_CHANNELS];
  93
  94         /** This pointer is used to contain the temporary values.
  95           * The amount of temporary used in tgsi can't be bound to a max value and
  96           * thus we must allocate this array at runtime.
  97           */
  98         LLVMValueRef *temps;
  99         unsigned temps_count;
 100         LLVMValueRef system_values[RADEON_LLVM_MAX_SYSTEM_VALUES];
 101
 102         LLVMValueRef *imms;
 103         unsigned imms_num;
 104
 105         struct si_llvm_flow *flow;
 106         unsigned flow_depth;
 107         unsigned flow_depth_max;
 108
 109         struct lp_build_if_state merged_wrap_if_state;
 110
 111         struct tgsi_array_info *temp_arrays;
 112         LLVMValueRef *temp_array_allocas;
 113
 114         LLVMValueRef undef_alloca;
 115
 116         LLVMValueRef main_fn;
 117         LLVMTypeRef return_type;
 118
 119         /* Parameter indices for LLVMGetParam. */
 120         int param_rw_buffers;
 121         int param_const_and_shader_buffers;
 122         int param_samplers_and_images;
 123         /* Common inputs for merged shaders. */
 124         int param_merged_wave_info;
 125         int param_merged_scratch_offset;
 126         /* API VS */
 127         int param_vertex_buffers;
 128         int param_base_vertex;
 129         int param_start_instance;
 130         int param_draw_id;
 131         int param_vertex_id;
 132         int param_rel_auto_id;
 133         int param_vs_prim_id;
 134         int param_instance_id;
 135         int param_vertex_index0;
 136         /* VS states and layout of LS outputs / TCS inputs at the end
 137          *   [0] = clamp vertex color
 138          *   [1] = indexed
 139          *   [8:20] = stride between patches in DW = num_inputs * num_vertices * 4
 140          *            max = 32*32*4 + 32*4
 141          *   [24:31] = stride between vertices in DW = num_inputs * 4
 142          *             max = 32*4
 143          */
 144         int param_vs_state_bits;
 145         /* HW VS */
 146         int param_streamout_config;
 147         int param_streamout_write_index;
 148         int param_streamout_offset[4];
 149
 150         /* API TCS & TES */
 151         /* Layout of TCS outputs in the offchip buffer
 152          * # 6 bits
 153          *   [0:5] = the number of patches per threadgroup, max = NUM_PATCHES (40)
 154          * # 6 bits
 155          *   [6:11] = the number of output vertices per patch, max = 32
 156          * # 20 bits
 157          *   [12:31] = the offset of per patch attributes in the buffer in bytes.
 158          *             max = NUM_PATCHES*32*32*16
 159          */
 160         int param_tcs_offchip_layout;
 161
 162         /* API TCS */
 163         /* Offsets where TCS outputs and TCS patch outputs live in LDS:
 164          *   [0:15] = TCS output patch0 offset / 16, max = NUM_PATCHES * 32 * 32
 165          *   [16:31] = TCS output patch0 offset for per-patch / 16
 166          *             max = (NUM_PATCHES + 1) * 32*32
 167          */
 168         int param_tcs_out_lds_offsets;
 169         /* Layout of TCS outputs / TES inputs:
 170          *   [0:12] = stride between output patches in DW, num_outputs * num_vertices * 4
 171          *            max = 32*32*4 + 32*4
 172          *   [13:20] = stride between output vertices in DW = num_inputs * 4
 173          *             max = 32*4
 174          *   [26:31] = gl_PatchVerticesIn, max = 32
 175          */
 176         int param_tcs_out_lds_layout;
 177         int param_tcs_offchip_addr_base64k;
 178         int param_tcs_factor_addr_base64k;
 179         int param_tcs_offchip_offset;
 180         int param_tcs_factor_offset;
 181         int param_tcs_patch_id;
 182         int param_tcs_rel_ids;
 183
 184         /* API TES */
 185         int param_tes_u;
 186         int param_tes_v;
 187         int param_tes_rel_patch_id;
 188         int param_tes_patch_id;
 189         /* HW ES */
 190         int param_es2gs_offset;
 191         /* API GS */
 192         int param_gs2vs_offset;
 193         int param_gs_wave_id; /* GFX6 */
 194         int param_gs_vtx0_offset; /* in dwords (GFX6) */
 195         int param_gs_vtx1_offset; /* in dwords (GFX6) */
 196         int param_gs_prim_id;
 197         int param_gs_vtx2_offset; /* in dwords (GFX6) */
 198         int param_gs_vtx3_offset; /* in dwords (GFX6) */
 199         int param_gs_vtx4_offset; /* in dwords (GFX6) */
 200         int param_gs_vtx5_offset; /* in dwords (GFX6) */
 201         int param_gs_instance_id;
 202         int param_gs_vtx01_offset; /* in dwords (GFX9) */
 203         int param_gs_vtx23_offset; /* in dwords (GFX9) */
 204         int param_gs_vtx45_offset; /* in dwords (GFX9) */
 205         /* CS */
 206         int param_grid_size;
 207         int param_block_size;
 208         int param_block_id[3];
 209         int param_thread_id;
 210
 211         LLVMTargetMachineRef tm;
 212
 213         unsigned range_md_kind;
 214         unsigned fpmath_md_kind;
 215         LLVMValueRef fpmath_md_2p5_ulp;
 216
 217         /* Preloaded descriptors. */
 218         LLVMValueRef esgs_ring;
 219         LLVMValueRef gsvs_ring[4];
 220
 221         LLVMValueRef lds;
 222         LLVMValueRef gs_next_vertex[4];
 223         LLVMValueRef postponed_kill;
 224         LLVMValueRef return_value;
 225
 226         LLVMTypeRef voidt;
 227         LLVMTypeRef i1;
 228         LLVMTypeRef i8;
 229         LLVMTypeRef i32;
 230         LLVMTypeRef i64;
 231         LLVMTypeRef i128;
 232         LLVMTypeRef f32;
 233         LLVMTypeRef v2i32;
 234         LLVMTypeRef v4i32;
 235         LLVMTypeRef v4f32;
 236         LLVMTypeRef v8i32;
 237
 238         LLVMValueRef i32_0;
 239         LLVMValueRef i32_1;
 240
 241         LLVMValueRef shared_memory;
 242 };
 243
 244 static inline struct si_shader_context *
 245 si_shader_context(struct lp_build_tgsi_context *bld_base)
 246 {
 247         return (struct si_shader_context*)bld_base;
 248 }
 249
 250 void si_llvm_add_attribute(LLVMValueRef F, const char *name, int value);
 251
 252 unsigned si_llvm_compile(LLVMModuleRef M, struct ac_shader_binary *binary,
 253                          LLVMTargetMachineRef tm,
 254                          struct pipe_debug_callback *debug);
 255
 256 LLVMTypeRef tgsi2llvmtype(struct lp_build_tgsi_context *bld_base,
 257                           enum tgsi_opcode_type type);
 258
 259 LLVMValueRef bitcast(struct lp_build_tgsi_context *bld_base,
 260                      enum tgsi_opcode_type type, LLVMValueRef value);
 261
 262 LLVMValueRef si_llvm_bound_index(struct si_shader_context *ctx,
 263                                  LLVMValueRef index,
 264                                  unsigned num);
 265
 266 void si_llvm_context_init(struct si_shader_context *ctx,
 267                           struct si_screen *sscreen,
 268                           LLVMTargetMachineRef tm);
 269 void si_llvm_context_set_tgsi(struct si_shader_context *ctx,
 270                               struct si_shader *shader);
 271
 272 void si_llvm_create_func(struct si_shader_context *ctx,
 273                          const char *name,
 274                          LLVMTypeRef *return_types, unsigned num_return_elems,
 275                          LLVMTypeRef *ParamTypes, unsigned ParamCount);
 276
 277 void si_llvm_dispose(struct si_shader_context *ctx);
 278
 279 void si_llvm_optimize_module(struct si_shader_context *ctx);
 280
 281 LLVMValueRef si_llvm_emit_fetch_64bit(struct lp_build_tgsi_context *bld_base,
 282                                       enum tgsi_opcode_type type,
 283                                       LLVMValueRef ptr,
 284                                       LLVMValueRef ptr2);
 285
 286 LLVMValueRef si_llvm_emit_fetch(struct lp_build_tgsi_context *bld_base,
 287                                 const struct tgsi_full_src_register *reg,
 288                                 enum tgsi_opcode_type type,
 289                                 unsigned swizzle);
 290
 291 void si_llvm_emit_store(struct lp_build_tgsi_context *bld_base,
 292                         const struct tgsi_full_instruction *inst,
 293                         const struct tgsi_opcode_info *info,
 294                         LLVMValueRef dst[4]);
 295
 296 /* Combine these with & instead of |. */
 297 #define NOOP_WAITCNT 0xf7f
 298 #define LGKM_CNT 0x07f
 299 #define VM_CNT 0xf70
 300
 301 void si_emit_waitcnt(struct si_shader_context *ctx, unsigned simm16);
 302
 303 LLVMValueRef si_get_bounded_indirect_index(struct si_shader_context *ctx,
 304                                            const struct tgsi_ind_register *ind,
 305                                            int rel_index, unsigned num);
 306
 307 LLVMTypeRef si_const_array(LLVMTypeRef elem_type, int num_elements);
 308
 309 void si_shader_context_init_alu(struct lp_build_tgsi_context *bld_base);
 310 void si_shader_context_init_mem(struct si_shader_context *ctx);
 311
 312 #endif