src/gallium/drivers/radeonsi/si_shader_nir.c

   1 /*
   2  * Copyright 2017 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23
  24 #include "si_shader.h"
  25 #include "si_shader_internal.h"
  26
  27 #include "ac_nir_to_llvm.h"
  28
  29 #include "tgsi/tgsi_from_mesa.h"
  30
  31 #include "compiler/nir/nir.h"
  32 #include "compiler/nir_types.h"
  33
  34
  35 static int
  36 type_size(const struct glsl_type *type)
  37 {
  38    return glsl_count_attribute_slots(type, false);
  39 }
  40
  41 static void scan_instruction(struct tgsi_shader_info *info,
  42                              nir_instr *instr)
  43 {
  44         if (instr->type == nir_instr_type_alu) {
  45                 nir_alu_instr *alu = nir_instr_as_alu(instr);
  46
  47                 switch (alu->op) {
  48                 case nir_op_fddx:
  49                 case nir_op_fddy:
  50                 case nir_op_fddx_fine:
  51                 case nir_op_fddy_fine:
  52                 case nir_op_fddx_coarse:
  53                 case nir_op_fddy_coarse:
  54                         info->uses_derivatives = true;
  55                         break;
  56                 default:
  57                         break;
  58                 }
  59         } else if (instr->type == nir_instr_type_tex) {
  60                 nir_tex_instr *tex = nir_instr_as_tex(instr);
  61
  62                 if (!tex->texture) {
  63                         info->samplers_declared |=
  64                                 u_bit_consecutive(tex->sampler_index, 1);
  65                 }
  66
  67                 switch (tex->op) {
  68                 case nir_texop_tex:
  69                 case nir_texop_txb:
  70                 case nir_texop_lod:
  71                         info->uses_derivatives = true;
  72                         break;
  73                 default:
  74                         break;
  75                 }
  76         } else if (instr->type == nir_instr_type_intrinsic) {
  77                 nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
  78
  79                 switch (intr->intrinsic) {
  80                 case nir_intrinsic_load_front_face:
  81                         info->uses_frontface = 1;
  82                         break;
  83                 case nir_intrinsic_load_instance_id:
  84                         info->uses_instanceid = 1;
  85                         break;
  86                 case nir_intrinsic_load_vertex_id:
  87                         info->uses_vertexid = 1;
  88                         break;
  89                 case nir_intrinsic_load_vertex_id_zero_base:
  90                         info->uses_vertexid_nobase = 1;
  91                         break;
  92                 case nir_intrinsic_load_base_vertex:
  93                         info->uses_basevertex = 1;
  94                         break;
  95                 case nir_intrinsic_load_primitive_id:
  96                         info->uses_primid = 1;
  97                         break;
  98                 case nir_intrinsic_image_store:
  99                 case nir_intrinsic_image_atomic_add:
 100                 case nir_intrinsic_image_atomic_min:
 101                 case nir_intrinsic_image_atomic_max:
 102                 case nir_intrinsic_image_atomic_and:
 103                 case nir_intrinsic_image_atomic_or:
 104                 case nir_intrinsic_image_atomic_xor:
 105                 case nir_intrinsic_image_atomic_exchange:
 106                 case nir_intrinsic_image_atomic_comp_swap:
 107                 case nir_intrinsic_store_ssbo:
 108                 case nir_intrinsic_ssbo_atomic_add:
 109                 case nir_intrinsic_ssbo_atomic_imin:
 110                 case nir_intrinsic_ssbo_atomic_umin:
 111                 case nir_intrinsic_ssbo_atomic_imax:
 112                 case nir_intrinsic_ssbo_atomic_umax:
 113                 case nir_intrinsic_ssbo_atomic_and:
 114                 case nir_intrinsic_ssbo_atomic_or:
 115                 case nir_intrinsic_ssbo_atomic_xor:
 116                 case nir_intrinsic_ssbo_atomic_exchange:
 117                 case nir_intrinsic_ssbo_atomic_comp_swap:
 118                         info->writes_memory = true;
 119                         break;
 120                 default:
 121                         break;
 122                 }
 123         }
 124 }
 125
 126 void si_nir_scan_shader(const struct nir_shader *nir,
 127                         struct tgsi_shader_info *info)
 128 {
 129         nir_function *func;
 130         unsigned i;
 131
 132         assert(nir->info.stage == MESA_SHADER_VERTEX ||
 133                nir->info.stage == MESA_SHADER_FRAGMENT);
 134
 135         info->processor = pipe_shader_type_from_mesa(nir->info.stage);
 136         info->num_tokens = 2; /* indicate that the shader is non-empty */
 137         info->num_instructions = 2;
 138
 139         if (nir->info.stage == MESA_SHADER_GEOMETRY) {
 140                 info->properties[TGSI_PROPERTY_GS_INPUT_PRIM] = nir->info.gs.input_primitive;
 141                 info->properties[TGSI_PROPERTY_GS_OUTPUT_PRIM] = nir->info.gs.output_primitive;
 142                 info->properties[TGSI_PROPERTY_GS_MAX_OUTPUT_VERTICES] = nir->info.gs.vertices_out;
 143                 info->properties[TGSI_PROPERTY_GS_INVOCATIONS] = nir->info.gs.invocations;
 144         }
 145
 146         i = 0;
 147         uint64_t processed_inputs = 0;
 148         unsigned num_inputs = 0;
 149         nir_foreach_variable(variable, &nir->inputs) {
 150                 unsigned semantic_name, semantic_index;
 151                 unsigned attrib_count = glsl_count_attribute_slots(variable->type,
 152                                                                    nir->info.stage == MESA_SHADER_VERTEX);
 153
 154                 assert(attrib_count == 1 && "not implemented");
 155
 156                 /* Vertex shader inputs don't have semantics. The state
 157                  * tracker has already mapped them to attributes via
 158                  * variable->data.driver_location.
 159                  */
 160                 if (nir->info.stage == MESA_SHADER_VERTEX)
 161                         continue;
 162
 163                 /* Fragment shader position is a system value. */
 164                 if (nir->info.stage == MESA_SHADER_FRAGMENT &&
 165                     variable->data.location == VARYING_SLOT_POS) {
 166                         if (variable->data.pixel_center_integer)
 167                                 info->properties[TGSI_PROPERTY_FS_COORD_PIXEL_CENTER] =
 168                                         TGSI_FS_COORD_PIXEL_CENTER_INTEGER;
 169
 170                         num_inputs++;
 171                         continue;
 172                 }
 173
 174                 i = variable->data.driver_location;
 175                 if (processed_inputs & ((uint64_t)1 << i))
 176                         continue;
 177
 178                 processed_inputs |= ((uint64_t)1 << i);
 179                 num_inputs++;
 180
 181                 tgsi_get_gl_varying_semantic(variable->data.location, true,
 182                                              &semantic_name, &semantic_index);
 183
 184                 info->input_semantic_name[i] = semantic_name;
 185                 info->input_semantic_index[i] = semantic_index;
 186
 187                 if (variable->data.sample)
 188                         info->input_interpolate_loc[i] = TGSI_INTERPOLATE_LOC_SAMPLE;
 189                 else if (variable->data.centroid)
 190                         info->input_interpolate_loc[i] = TGSI_INTERPOLATE_LOC_CENTROID;
 191                 else
 192                         info->input_interpolate_loc[i] = TGSI_INTERPOLATE_LOC_CENTER;
 193
 194                 enum glsl_base_type base_type =
 195                         glsl_get_base_type(glsl_without_array(variable->type));
 196
 197                 switch (variable->data.interpolation) {
 198                 case INTERP_MODE_NONE:
 199                         if (glsl_base_type_is_integer(base_type)) {
 200                                 info->input_interpolate[i] = TGSI_INTERPOLATE_CONSTANT;
 201                                 break;
 202                         }
 203
 204                         if (semantic_name == TGSI_SEMANTIC_COLOR) {
 205                                 info->input_interpolate[i] = TGSI_INTERPOLATE_COLOR;
 206                                 goto persp_locations;
 207                         }
 208                         /* fall-through */
 209                 case INTERP_MODE_SMOOTH:
 210                         assert(!glsl_base_type_is_integer(base_type));
 211
 212                         info->input_interpolate[i] = TGSI_INTERPOLATE_PERSPECTIVE;
 213
 214                 persp_locations:
 215                         if (variable->data.sample)
 216                                 info->uses_persp_sample = true;
 217                         else if (variable->data.centroid)
 218                                 info->uses_persp_centroid = true;
 219                         else
 220                                 info->uses_persp_center = true;
 221                         break;
 222
 223                 case INTERP_MODE_NOPERSPECTIVE:
 224                         assert(!glsl_base_type_is_integer(base_type));
 225
 226                         info->input_interpolate[i] = TGSI_INTERPOLATE_LINEAR;
 227
 228                         if (variable->data.sample)
 229                                 info->uses_linear_sample = true;
 230                         else if (variable->data.centroid)
 231                                 info->uses_linear_centroid = true;
 232                         else
 233                                 info->uses_linear_center = true;
 234                         break;
 235
 236                 case INTERP_MODE_FLAT:
 237                         info->input_interpolate[i] = TGSI_INTERPOLATE_CONSTANT;
 238                         break;
 239                 }
 240
 241                 /* TODO make this more precise */
 242                 if (variable->data.location == VARYING_SLOT_COL0)
 243                         info->colors_read |= 0x0f;
 244                 else if (variable->data.location == VARYING_SLOT_COL1)
 245                         info->colors_read |= 0xf0;
 246         }
 247
 248         if (nir->info.stage != MESA_SHADER_VERTEX)
 249                 info->num_inputs = num_inputs;
 250         else
 251                 info->num_inputs = nir->num_inputs;
 252
 253         i = 0;
 254         uint64_t processed_outputs = 0;
 255         unsigned num_outputs = 0;
 256         nir_foreach_variable(variable, &nir->outputs) {
 257                 unsigned semantic_name, semantic_index;
 258
 259                 if (nir->info.stage == MESA_SHADER_FRAGMENT) {
 260                         tgsi_get_gl_frag_result_semantic(variable->data.location,
 261                                 &semantic_name, &semantic_index);
 262                 } else {
 263                         tgsi_get_gl_varying_semantic(variable->data.location, true,
 264                                                      &semantic_name, &semantic_index);
 265                 }
 266
 267                 i = variable->data.driver_location;
 268                 if (processed_outputs & ((uint64_t)1 << i))
 269                         continue;
 270
 271                 processed_outputs |= ((uint64_t)1 << i);
 272                 num_outputs++;
 273
 274                 info->output_semantic_name[i] = semantic_name;
 275                 info->output_semantic_index[i] = semantic_index;
 276                 info->output_usagemask[i] = TGSI_WRITEMASK_XYZW;
 277
 278                 unsigned num_components = 4;
 279                 unsigned vector_elements = glsl_get_vector_elements(glsl_without_array(variable->type));
 280                 if (vector_elements)
 281                         num_components = vector_elements;
 282
 283                 unsigned gs_out_streams;
 284                 if (variable->data.stream & (1u << 31)) {
 285                         gs_out_streams = variable->data.stream & ~(1u << 31);
 286                 } else {
 287                         assert(variable->data.stream < 4);
 288                         gs_out_streams = 0;
 289                         for (unsigned j = 0; j < num_components; ++j)
 290                                 gs_out_streams |= variable->data.stream << (2 * (variable->data.location_frac + j));
 291                 }
 292
 293                 unsigned streamx = gs_out_streams & 3;
 294                 unsigned streamy = (gs_out_streams >> 2) & 3;
 295                 unsigned streamz = (gs_out_streams >> 4) & 3;
 296                 unsigned streamw = (gs_out_streams >> 6) & 3;
 297
 298                 if (info->output_usagemask[i] & TGSI_WRITEMASK_X) {
 299                         info->output_streams[i] |= streamx;
 300                         info->num_stream_output_components[streamx]++;
 301                 }
 302                 if (info->output_usagemask[i] & TGSI_WRITEMASK_Y) {
 303                         info->output_streams[i] |= streamy << 2;
 304                         info->num_stream_output_components[streamy]++;
 305                 }
 306                 if (info->output_usagemask[i] & TGSI_WRITEMASK_Z) {
 307                         info->output_streams[i] |= streamz << 4;
 308                         info->num_stream_output_components[streamz]++;
 309                 }
 310                 if (info->output_usagemask[i] & TGSI_WRITEMASK_W) {
 311                         info->output_streams[i] |= streamw << 6;
 312                         info->num_stream_output_components[streamw]++;
 313                 }
 314
 315                 switch (semantic_name) {
 316                 case TGSI_SEMANTIC_PRIMID:
 317                         info->writes_primid = true;
 318                         break;
 319                 case TGSI_SEMANTIC_VIEWPORT_INDEX:
 320                         info->writes_viewport_index = true;
 321                         break;
 322                 case TGSI_SEMANTIC_LAYER:
 323                         info->writes_layer = true;
 324                         break;
 325                 case TGSI_SEMANTIC_PSIZE:
 326                         info->writes_psize = true;
 327                         break;
 328                 case TGSI_SEMANTIC_CLIPVERTEX:
 329                         info->writes_clipvertex = true;
 330                         break;
 331                 case TGSI_SEMANTIC_COLOR:
 332                         info->colors_written |= 1 << semantic_index;
 333                         break;
 334                 case TGSI_SEMANTIC_STENCIL:
 335                         info->writes_stencil = true;
 336                         break;
 337                 case TGSI_SEMANTIC_SAMPLEMASK:
 338                         info->writes_samplemask = true;
 339                         break;
 340                 case TGSI_SEMANTIC_EDGEFLAG:
 341                         info->writes_edgeflag = true;
 342                         break;
 343                 case TGSI_SEMANTIC_POSITION:
 344                         if (info->processor == PIPE_SHADER_FRAGMENT)
 345                                 info->writes_z = true;
 346                         else
 347                                 info->writes_position = true;
 348                         break;
 349                 }
 350         }
 351
 352         info->num_outputs = num_outputs;
 353
 354         nir_foreach_variable(variable, &nir->uniforms) {
 355                 const struct glsl_type *type = variable->type;
 356                 enum glsl_base_type base_type =
 357                         glsl_get_base_type(glsl_without_array(type));
 358                 unsigned aoa_size = MAX2(1, glsl_get_aoa_size(type));
 359
 360                 /* We rely on the fact that nir_lower_samplers_as_deref has
 361                  * eliminated struct dereferences.
 362                  */
 363                 if (base_type == GLSL_TYPE_SAMPLER)
 364                         info->samplers_declared |=
 365                                 u_bit_consecutive(variable->data.binding, aoa_size);
 366                 else if (base_type == GLSL_TYPE_IMAGE)
 367                         info->images_declared |=
 368                                 u_bit_consecutive(variable->data.binding, aoa_size);
 369         }
 370
 371         info->num_written_clipdistance = nir->info.clip_distance_array_size;
 372         info->num_written_culldistance = nir->info.cull_distance_array_size;
 373         info->clipdist_writemask = u_bit_consecutive(0, info->num_written_clipdistance);
 374         info->culldist_writemask = u_bit_consecutive(0, info->num_written_culldistance);
 375
 376         if (info->processor == PIPE_SHADER_FRAGMENT)
 377                 info->uses_kill = nir->info.fs.uses_discard;
 378
 379         /* TODO make this more accurate */
 380         info->const_buffers_declared = u_bit_consecutive(0, SI_NUM_CONST_BUFFERS);
 381         info->shader_buffers_declared = u_bit_consecutive(0, SI_NUM_SHADER_BUFFERS);
 382
 383         func = (struct nir_function *)exec_list_get_head_const(&nir->functions);
 384         nir_foreach_block(block, func->impl) {
 385                 nir_foreach_instr(instr, block)
 386                         scan_instruction(info, instr);
 387         }
 388 }
 389
 390 /**
 391  * Perform "lowering" operations on the NIR that are run once when the shader
 392  * selector is created.
 393  */
 394 void
 395 si_lower_nir(struct si_shader_selector* sel)
 396 {
 397         /* Adjust the driver location of inputs and outputs. The state tracker
 398          * interprets them as slots, while the ac/nir backend interprets them
 399          * as individual components.
 400          */
 401         nir_foreach_variable(variable, &sel->nir->inputs)
 402                 variable->data.driver_location *= 4;
 403
 404         nir_foreach_variable(variable, &sel->nir->outputs) {
 405                 variable->data.driver_location *= 4;
 406
 407                 if (sel->nir->info.stage == MESA_SHADER_FRAGMENT) {
 408                         if (variable->data.location == FRAG_RESULT_DEPTH)
 409                                 variable->data.driver_location += 2;
 410                         else if (variable->data.location == FRAG_RESULT_STENCIL)
 411                                 variable->data.driver_location += 1;
 412                 }
 413         }
 414
 415         /* Perform lowerings (and optimizations) of code.
 416          *
 417          * Performance considerations aside, we must:
 418          * - lower certain ALU operations
 419          * - ensure constant offsets for texture instructions are folded
 420          *   and copy-propagated
 421          */
 422         NIR_PASS_V(sel->nir, nir_lower_io, nir_var_uniform, type_size,
 423                    (nir_lower_io_options)0);
 424         NIR_PASS_V(sel->nir, nir_lower_uniforms_to_ubo);
 425
 426         NIR_PASS_V(sel->nir, nir_lower_returns);
 427         NIR_PASS_V(sel->nir, nir_lower_vars_to_ssa);
 428         NIR_PASS_V(sel->nir, nir_lower_alu_to_scalar);
 429         NIR_PASS_V(sel->nir, nir_lower_phis_to_scalar);
 430
 431         static const struct nir_lower_tex_options lower_tex_options = {
 432                 .lower_txp = ~0u,
 433         };
 434         NIR_PASS_V(sel->nir, nir_lower_tex, &lower_tex_options);
 435
 436         bool progress;
 437         do {
 438                 progress = false;
 439
 440                 /* (Constant) copy propagation is needed for txf with offsets. */
 441                 NIR_PASS(progress, sel->nir, nir_copy_prop);
 442                 NIR_PASS(progress, sel->nir, nir_opt_remove_phis);
 443                 NIR_PASS(progress, sel->nir, nir_opt_dce);
 444                 if (nir_opt_trivial_continues(sel->nir)) {
 445                         progress = true;
 446                         NIR_PASS(progress, sel->nir, nir_copy_prop);
 447                         NIR_PASS(progress, sel->nir, nir_opt_dce);
 448                 }
 449                 NIR_PASS(progress, sel->nir, nir_opt_if);
 450                 NIR_PASS(progress, sel->nir, nir_opt_dead_cf);
 451                 NIR_PASS(progress, sel->nir, nir_opt_cse);
 452                 NIR_PASS(progress, sel->nir, nir_opt_peephole_select, 8);
 453
 454                 /* Needed for algebraic lowering */
 455                 NIR_PASS(progress, sel->nir, nir_opt_algebraic);
 456                 NIR_PASS(progress, sel->nir, nir_opt_constant_folding);
 457
 458                 NIR_PASS(progress, sel->nir, nir_opt_undef);
 459                 NIR_PASS(progress, sel->nir, nir_opt_conditional_discard);
 460                 if (sel->nir->options->max_unroll_iterations) {
 461                         NIR_PASS(progress, sel->nir, nir_opt_loop_unroll, 0);
 462                 }
 463         } while (progress);
 464 }
 465
 466 static void declare_nir_input_vs(struct si_shader_context *ctx,
 467                                  struct nir_variable *variable,
 468                                  LLVMValueRef out[4])
 469 {
 470         si_llvm_load_input_vs(ctx, variable->data.driver_location / 4, out);
 471 }
 472
 473 static void declare_nir_input_fs(struct si_shader_context *ctx,
 474                                  struct nir_variable *variable,
 475                                  unsigned input_index,
 476                                  LLVMValueRef out[4])
 477 {
 478         unsigned slot = variable->data.location;
 479         if (slot == VARYING_SLOT_POS) {
 480                 out[0] = LLVMGetParam(ctx->main_fn, SI_PARAM_POS_X_FLOAT);
 481                 out[1] = LLVMGetParam(ctx->main_fn, SI_PARAM_POS_Y_FLOAT);
 482                 out[2] = LLVMGetParam(ctx->main_fn, SI_PARAM_POS_Z_FLOAT);
 483                 out[3] = ac_build_fdiv(&ctx->ac, ctx->ac.f32_1,
 484                                 LLVMGetParam(ctx->main_fn, SI_PARAM_POS_W_FLOAT));
 485                 return;
 486         }
 487
 488         si_llvm_load_input_fs(ctx, input_index, out);
 489 }
 490
 491 static LLVMValueRef
 492 si_nir_load_sampler_desc(struct ac_shader_abi *abi,
 493                          unsigned descriptor_set, unsigned base_index,
 494                          unsigned constant_index, LLVMValueRef dynamic_index,
 495                          enum ac_descriptor_type desc_type, bool image,
 496                          bool write)
 497 {
 498         struct si_shader_context *ctx = si_shader_context_from_abi(abi);
 499         LLVMBuilderRef builder = ctx->ac.builder;
 500         LLVMValueRef list = LLVMGetParam(ctx->main_fn, ctx->param_samplers_and_images);
 501         LLVMValueRef index = dynamic_index;
 502
 503         assert(!descriptor_set);
 504
 505         if (!index)
 506                 index = ctx->ac.i32_0;
 507
 508         index = LLVMBuildAdd(builder, index,
 509                              LLVMConstInt(ctx->ac.i32, base_index + constant_index, false),
 510                              "");
 511
 512         if (image) {
 513                 assert(desc_type == AC_DESC_IMAGE || desc_type == AC_DESC_BUFFER);
 514                 assert(base_index + constant_index < ctx->num_images);
 515
 516                 if (dynamic_index)
 517                         index = si_llvm_bound_index(ctx, index, ctx->num_images);
 518
 519                 index = LLVMBuildSub(ctx->gallivm.builder,
 520                                      LLVMConstInt(ctx->i32, SI_NUM_IMAGES - 1, 0),
 521                                      index, "");
 522
 523                 /* TODO: be smarter about when we use dcc_off */
 524                 return si_load_image_desc(ctx, list, index, desc_type, write);
 525         }
 526
 527         assert(base_index + constant_index < ctx->num_samplers);
 528
 529         if (dynamic_index)
 530                 index = si_llvm_bound_index(ctx, index, ctx->num_samplers);
 531
 532         index = LLVMBuildAdd(ctx->gallivm.builder, index,
 533                              LLVMConstInt(ctx->i32, SI_NUM_IMAGES / 2, 0), "");
 534
 535         return si_load_sampler_desc(ctx, list, index, desc_type);
 536 }
 537
 538 bool si_nir_build_llvm(struct si_shader_context *ctx, struct nir_shader *nir)
 539 {
 540         struct tgsi_shader_info *info = &ctx->shader->selector->info;
 541
 542         uint64_t processed_inputs = 0;
 543         nir_foreach_variable(variable, &nir->inputs) {
 544                 unsigned attrib_count = glsl_count_attribute_slots(variable->type,
 545                                                                    nir->info.stage == MESA_SHADER_VERTEX);
 546                 unsigned input_idx = variable->data.driver_location;
 547
 548                 assert(attrib_count == 1);
 549
 550                 LLVMValueRef data[4];
 551                 unsigned loc = variable->data.location;
 552
 553                 /* Packed components share the same location so skip
 554                  * them if we have already processed the location.
 555                  */
 556                 if (processed_inputs & ((uint64_t)1 << loc))
 557                         continue;
 558
 559                 if (nir->info.stage == MESA_SHADER_VERTEX)
 560                         declare_nir_input_vs(ctx, variable, data);
 561                 else if (nir->info.stage == MESA_SHADER_FRAGMENT)
 562                         declare_nir_input_fs(ctx, variable, input_idx / 4, data);
 563
 564                 for (unsigned chan = 0; chan < 4; chan++) {
 565                         ctx->inputs[input_idx + chan] =
 566                                 LLVMBuildBitCast(ctx->ac.builder, data[chan], ctx->ac.i32, "");
 567                 }
 568                 processed_inputs |= ((uint64_t)1 << loc);
 569         }
 570
 571         ctx->abi.inputs = &ctx->inputs[0];
 572         ctx->abi.load_sampler_desc = si_nir_load_sampler_desc;
 573         ctx->abi.clamp_shadow_reference = true;
 574
 575         ctx->num_samplers = util_last_bit(info->samplers_declared);
 576         ctx->num_images = util_last_bit(info->images_declared);
 577
 578         ac_nir_translate(&ctx->ac, &ctx->abi, nir, NULL);
 579
 580         return true;
 581 }