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ac: replace ac_build_kill with ac_build_kill_if_false
[mesa.git] / src / gallium / drivers / radeonsi / si_shader_tgsi_alu.c
1 /*
2 * Copyright 2016 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23
24 #include "si_shader_internal.h"
25 #include "gallivm/lp_bld_const.h"
26 #include "gallivm/lp_bld_intr.h"
27 #include "gallivm/lp_bld_gather.h"
28 #include "tgsi/tgsi_parse.h"
29 #include "amd/common/ac_llvm_build.h"
30
31 static void kill_if_fetch_args(struct lp_build_tgsi_context *bld_base,
32 struct lp_build_emit_data *emit_data)
33 {
34 const struct tgsi_full_instruction *inst = emit_data->inst;
35 struct si_shader_context *ctx = si_shader_context(bld_base);
36 LLVMBuilderRef builder = ctx->ac.builder;
37 unsigned i;
38 LLVMValueRef conds[TGSI_NUM_CHANNELS];
39
40 for (i = 0; i < TGSI_NUM_CHANNELS; i++) {
41 LLVMValueRef value = lp_build_emit_fetch(bld_base, inst, 0, i);
42 conds[i] = LLVMBuildFCmp(builder, LLVMRealOGE, value,
43 ctx->ac.f32_0, "");
44 }
45
46 /* And the conditions together */
47 for (i = TGSI_NUM_CHANNELS - 1; i > 0; i--) {
48 conds[i - 1] = LLVMBuildAnd(builder, conds[i], conds[i - 1], "");
49 }
50
51 emit_data->dst_type = ctx->voidt;
52 emit_data->arg_count = 1;
53 emit_data->args[0] = conds[0];
54 }
55
56 static void kil_emit(const struct lp_build_tgsi_action *action,
57 struct lp_build_tgsi_context *bld_base,
58 struct lp_build_emit_data *emit_data)
59 {
60 struct si_shader_context *ctx = si_shader_context(bld_base);
61 LLVMBuilderRef builder = ctx->ac.builder;
62 LLVMValueRef visible;
63
64 if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_KILL_IF) {
65 visible = emit_data->args[0];
66 } else {
67 assert(emit_data->inst->Instruction.Opcode == TGSI_OPCODE_KILL);
68 visible = LLVMConstInt(ctx->i1, false, 0);
69 }
70
71 if (ctx->postponed_kill) {
72 LLVMValueRef mask = LLVMBuildLoad(builder, ctx->postponed_kill, "");
73 mask = LLVMBuildAnd(builder, mask, visible, "");
74 LLVMBuildStore(builder, mask, ctx->postponed_kill);
75 return;
76 }
77
78 ac_build_kill_if_false(&ctx->ac, visible);
79 }
80
81 static void emit_icmp(const struct lp_build_tgsi_action *action,
82 struct lp_build_tgsi_context *bld_base,
83 struct lp_build_emit_data *emit_data)
84 {
85 unsigned pred;
86 struct si_shader_context *ctx = si_shader_context(bld_base);
87
88 switch (emit_data->inst->Instruction.Opcode) {
89 case TGSI_OPCODE_USEQ:
90 case TGSI_OPCODE_U64SEQ: pred = LLVMIntEQ; break;
91 case TGSI_OPCODE_USNE:
92 case TGSI_OPCODE_U64SNE: pred = LLVMIntNE; break;
93 case TGSI_OPCODE_USGE:
94 case TGSI_OPCODE_U64SGE: pred = LLVMIntUGE; break;
95 case TGSI_OPCODE_USLT:
96 case TGSI_OPCODE_U64SLT: pred = LLVMIntULT; break;
97 case TGSI_OPCODE_ISGE:
98 case TGSI_OPCODE_I64SGE: pred = LLVMIntSGE; break;
99 case TGSI_OPCODE_ISLT:
100 case TGSI_OPCODE_I64SLT: pred = LLVMIntSLT; break;
101 default:
102 assert(!"unknown instruction");
103 pred = 0;
104 break;
105 }
106
107 LLVMValueRef v = LLVMBuildICmp(ctx->ac.builder, pred,
108 emit_data->args[0], emit_data->args[1],"");
109
110 v = LLVMBuildSExtOrBitCast(ctx->ac.builder, v, ctx->i32, "");
111
112 emit_data->output[emit_data->chan] = v;
113 }
114
115 static void emit_ucmp(const struct lp_build_tgsi_action *action,
116 struct lp_build_tgsi_context *bld_base,
117 struct lp_build_emit_data *emit_data)
118 {
119 struct si_shader_context *ctx = si_shader_context(bld_base);
120 LLVMValueRef arg0 = ac_to_integer(&ctx->ac, emit_data->args[0]);
121
122 LLVMValueRef v = LLVMBuildICmp(ctx->ac.builder, LLVMIntNE, arg0,
123 ctx->i32_0, "");
124
125 emit_data->output[emit_data->chan] =
126 LLVMBuildSelect(ctx->ac.builder, v, emit_data->args[1], emit_data->args[2], "");
127 }
128
129 static void emit_cmp(const struct lp_build_tgsi_action *action,
130 struct lp_build_tgsi_context *bld_base,
131 struct lp_build_emit_data *emit_data)
132 {
133 struct si_shader_context *ctx = si_shader_context(bld_base);
134 LLVMValueRef cond, *args = emit_data->args;
135
136 cond = LLVMBuildFCmp(ctx->ac.builder, LLVMRealOLT, args[0],
137 ctx->ac.f32_0, "");
138
139 emit_data->output[emit_data->chan] =
140 LLVMBuildSelect(ctx->ac.builder, cond, args[1], args[2], "");
141 }
142
143 static void emit_set_cond(const struct lp_build_tgsi_action *action,
144 struct lp_build_tgsi_context *bld_base,
145 struct lp_build_emit_data *emit_data)
146 {
147 struct si_shader_context *ctx = si_shader_context(bld_base);
148 LLVMRealPredicate pred;
149 LLVMValueRef cond;
150
151 /* Use ordered for everything but NE (which is usual for
152 * float comparisons)
153 */
154 switch (emit_data->inst->Instruction.Opcode) {
155 case TGSI_OPCODE_SGE: pred = LLVMRealOGE; break;
156 case TGSI_OPCODE_SEQ: pred = LLVMRealOEQ; break;
157 case TGSI_OPCODE_SLE: pred = LLVMRealOLE; break;
158 case TGSI_OPCODE_SLT: pred = LLVMRealOLT; break;
159 case TGSI_OPCODE_SNE: pred = LLVMRealUNE; break;
160 case TGSI_OPCODE_SGT: pred = LLVMRealOGT; break;
161 default: assert(!"unknown instruction"); pred = 0; break;
162 }
163
164 cond = LLVMBuildFCmp(ctx->ac.builder,
165 pred, emit_data->args[0], emit_data->args[1], "");
166
167 emit_data->output[emit_data->chan] = LLVMBuildSelect(ctx->ac.builder,
168 cond, ctx->ac.f32_1, ctx->ac.f32_0, "");
169 }
170
171 static void emit_fcmp(const struct lp_build_tgsi_action *action,
172 struct lp_build_tgsi_context *bld_base,
173 struct lp_build_emit_data *emit_data)
174 {
175 struct si_shader_context *ctx = si_shader_context(bld_base);
176 LLVMRealPredicate pred;
177
178 /* Use ordered for everything but NE (which is usual for
179 * float comparisons)
180 */
181 switch (emit_data->inst->Instruction.Opcode) {
182 case TGSI_OPCODE_FSEQ: pred = LLVMRealOEQ; break;
183 case TGSI_OPCODE_FSGE: pred = LLVMRealOGE; break;
184 case TGSI_OPCODE_FSLT: pred = LLVMRealOLT; break;
185 case TGSI_OPCODE_FSNE: pred = LLVMRealUNE; break;
186 default: assert(!"unknown instruction"); pred = 0; break;
187 }
188
189 LLVMValueRef v = LLVMBuildFCmp(ctx->ac.builder, pred,
190 emit_data->args[0], emit_data->args[1],"");
191
192 v = LLVMBuildSExtOrBitCast(ctx->ac.builder, v, ctx->i32, "");
193
194 emit_data->output[emit_data->chan] = v;
195 }
196
197 static void emit_dcmp(const struct lp_build_tgsi_action *action,
198 struct lp_build_tgsi_context *bld_base,
199 struct lp_build_emit_data *emit_data)
200 {
201 struct si_shader_context *ctx = si_shader_context(bld_base);
202 LLVMRealPredicate pred;
203
204 /* Use ordered for everything but NE (which is usual for
205 * float comparisons)
206 */
207 switch (emit_data->inst->Instruction.Opcode) {
208 case TGSI_OPCODE_DSEQ: pred = LLVMRealOEQ; break;
209 case TGSI_OPCODE_DSGE: pred = LLVMRealOGE; break;
210 case TGSI_OPCODE_DSLT: pred = LLVMRealOLT; break;
211 case TGSI_OPCODE_DSNE: pred = LLVMRealUNE; break;
212 default: assert(!"unknown instruction"); pred = 0; break;
213 }
214
215 LLVMValueRef v = LLVMBuildFCmp(ctx->ac.builder, pred,
216 emit_data->args[0], emit_data->args[1],"");
217
218 v = LLVMBuildSExtOrBitCast(ctx->ac.builder, v, ctx->i32, "");
219
220 emit_data->output[emit_data->chan] = v;
221 }
222
223 static void emit_not(const struct lp_build_tgsi_action *action,
224 struct lp_build_tgsi_context *bld_base,
225 struct lp_build_emit_data *emit_data)
226 {
227 struct si_shader_context *ctx = si_shader_context(bld_base);
228 LLVMValueRef v = ac_to_integer(&ctx->ac, emit_data->args[0]);
229 emit_data->output[emit_data->chan] = LLVMBuildNot(ctx->ac.builder, v, "");
230 }
231
232 static void emit_arl(const struct lp_build_tgsi_action *action,
233 struct lp_build_tgsi_context *bld_base,
234 struct lp_build_emit_data *emit_data)
235 {
236 struct si_shader_context *ctx = si_shader_context(bld_base);
237 LLVMValueRef floor_index = lp_build_emit_llvm_unary(bld_base, TGSI_OPCODE_FLR, emit_data->args[0]);
238 emit_data->output[emit_data->chan] = LLVMBuildFPToSI(ctx->ac.builder,
239 floor_index, ctx->i32, "");
240 }
241
242 static void emit_and(const struct lp_build_tgsi_action *action,
243 struct lp_build_tgsi_context *bld_base,
244 struct lp_build_emit_data *emit_data)
245 {
246 struct si_shader_context *ctx = si_shader_context(bld_base);
247 emit_data->output[emit_data->chan] = LLVMBuildAnd(ctx->ac.builder,
248 emit_data->args[0], emit_data->args[1], "");
249 }
250
251 static void emit_or(const struct lp_build_tgsi_action *action,
252 struct lp_build_tgsi_context *bld_base,
253 struct lp_build_emit_data *emit_data)
254 {
255 struct si_shader_context *ctx = si_shader_context(bld_base);
256 emit_data->output[emit_data->chan] = LLVMBuildOr(ctx->ac.builder,
257 emit_data->args[0], emit_data->args[1], "");
258 }
259
260 static void emit_uadd(const struct lp_build_tgsi_action *action,
261 struct lp_build_tgsi_context *bld_base,
262 struct lp_build_emit_data *emit_data)
263 {
264 struct si_shader_context *ctx = si_shader_context(bld_base);
265 emit_data->output[emit_data->chan] = LLVMBuildAdd(ctx->ac.builder,
266 emit_data->args[0], emit_data->args[1], "");
267 }
268
269 static void emit_udiv(const struct lp_build_tgsi_action *action,
270 struct lp_build_tgsi_context *bld_base,
271 struct lp_build_emit_data *emit_data)
272 {
273 struct si_shader_context *ctx = si_shader_context(bld_base);
274 emit_data->output[emit_data->chan] = LLVMBuildUDiv(ctx->ac.builder,
275 emit_data->args[0], emit_data->args[1], "");
276 }
277
278 static void emit_idiv(const struct lp_build_tgsi_action *action,
279 struct lp_build_tgsi_context *bld_base,
280 struct lp_build_emit_data *emit_data)
281 {
282 struct si_shader_context *ctx = si_shader_context(bld_base);
283 emit_data->output[emit_data->chan] = LLVMBuildSDiv(ctx->ac.builder,
284 emit_data->args[0], emit_data->args[1], "");
285 }
286
287 static void emit_mod(const struct lp_build_tgsi_action *action,
288 struct lp_build_tgsi_context *bld_base,
289 struct lp_build_emit_data *emit_data)
290 {
291 struct si_shader_context *ctx = si_shader_context(bld_base);
292 emit_data->output[emit_data->chan] = LLVMBuildSRem(ctx->ac.builder,
293 emit_data->args[0], emit_data->args[1], "");
294 }
295
296 static void emit_umod(const struct lp_build_tgsi_action *action,
297 struct lp_build_tgsi_context *bld_base,
298 struct lp_build_emit_data *emit_data)
299 {
300 struct si_shader_context *ctx = si_shader_context(bld_base);
301 emit_data->output[emit_data->chan] = LLVMBuildURem(ctx->ac.builder,
302 emit_data->args[0], emit_data->args[1], "");
303 }
304
305 static void emit_shl(const struct lp_build_tgsi_action *action,
306 struct lp_build_tgsi_context *bld_base,
307 struct lp_build_emit_data *emit_data)
308 {
309 struct si_shader_context *ctx = si_shader_context(bld_base);
310 emit_data->output[emit_data->chan] = LLVMBuildShl(ctx->ac.builder,
311 emit_data->args[0], emit_data->args[1], "");
312 }
313
314 static void emit_ushr(const struct lp_build_tgsi_action *action,
315 struct lp_build_tgsi_context *bld_base,
316 struct lp_build_emit_data *emit_data)
317 {
318 struct si_shader_context *ctx = si_shader_context(bld_base);
319 emit_data->output[emit_data->chan] = LLVMBuildLShr(ctx->ac.builder,
320 emit_data->args[0], emit_data->args[1], "");
321 }
322 static void emit_ishr(const struct lp_build_tgsi_action *action,
323 struct lp_build_tgsi_context *bld_base,
324 struct lp_build_emit_data *emit_data)
325 {
326 struct si_shader_context *ctx = si_shader_context(bld_base);
327 emit_data->output[emit_data->chan] = LLVMBuildAShr(ctx->ac.builder,
328 emit_data->args[0], emit_data->args[1], "");
329 }
330
331 static void emit_xor(const struct lp_build_tgsi_action *action,
332 struct lp_build_tgsi_context *bld_base,
333 struct lp_build_emit_data *emit_data)
334 {
335 struct si_shader_context *ctx = si_shader_context(bld_base);
336 emit_data->output[emit_data->chan] = LLVMBuildXor(ctx->ac.builder,
337 emit_data->args[0], emit_data->args[1], "");
338 }
339
340 static void emit_ssg(const struct lp_build_tgsi_action *action,
341 struct lp_build_tgsi_context *bld_base,
342 struct lp_build_emit_data *emit_data)
343 {
344 struct si_shader_context *ctx = si_shader_context(bld_base);
345 LLVMBuilderRef builder = ctx->ac.builder;
346
347 LLVMValueRef cmp, val;
348
349 if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_I64SSG) {
350 cmp = LLVMBuildICmp(builder, LLVMIntSGT, emit_data->args[0], bld_base->int64_bld.zero, "");
351 val = LLVMBuildSelect(builder, cmp, bld_base->int64_bld.one, emit_data->args[0], "");
352 cmp = LLVMBuildICmp(builder, LLVMIntSGE, val, bld_base->int64_bld.zero, "");
353 val = LLVMBuildSelect(builder, cmp, val, LLVMConstInt(ctx->i64, -1, true), "");
354 } else if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_ISSG) {
355 cmp = LLVMBuildICmp(builder, LLVMIntSGT, emit_data->args[0], ctx->i32_0, "");
356 val = LLVMBuildSelect(builder, cmp, ctx->i32_1, emit_data->args[0], "");
357 cmp = LLVMBuildICmp(builder, LLVMIntSGE, val, ctx->i32_0, "");
358 val = LLVMBuildSelect(builder, cmp, val, LLVMConstInt(ctx->i32, -1, true), "");
359 } else if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_DSSG) {
360 cmp = LLVMBuildFCmp(builder, LLVMRealOGT, emit_data->args[0], bld_base->dbl_bld.zero, "");
361 val = LLVMBuildSelect(builder, cmp, bld_base->dbl_bld.one, emit_data->args[0], "");
362 cmp = LLVMBuildFCmp(builder, LLVMRealOGE, val, bld_base->dbl_bld.zero, "");
363 val = LLVMBuildSelect(builder, cmp, val, LLVMConstReal(bld_base->dbl_bld.elem_type, -1), "");
364 } else { // float SSG
365 cmp = LLVMBuildFCmp(builder, LLVMRealOGT, emit_data->args[0], ctx->ac.f32_0, "");
366 val = LLVMBuildSelect(builder, cmp, ctx->ac.f32_1, emit_data->args[0], "");
367 cmp = LLVMBuildFCmp(builder, LLVMRealOGE, val, ctx->ac.f32_0, "");
368 val = LLVMBuildSelect(builder, cmp, val, LLVMConstReal(ctx->f32, -1), "");
369 }
370
371 emit_data->output[emit_data->chan] = val;
372 }
373
374 static void emit_ineg(const struct lp_build_tgsi_action *action,
375 struct lp_build_tgsi_context *bld_base,
376 struct lp_build_emit_data *emit_data)
377 {
378 struct si_shader_context *ctx = si_shader_context(bld_base);
379 emit_data->output[emit_data->chan] = LLVMBuildNeg(ctx->ac.builder,
380 emit_data->args[0], "");
381 }
382
383 static void emit_dneg(const struct lp_build_tgsi_action *action,
384 struct lp_build_tgsi_context *bld_base,
385 struct lp_build_emit_data *emit_data)
386 {
387 struct si_shader_context *ctx = si_shader_context(bld_base);
388 emit_data->output[emit_data->chan] = LLVMBuildFNeg(ctx->ac.builder,
389 emit_data->args[0], "");
390 }
391
392 static void emit_frac(const struct lp_build_tgsi_action *action,
393 struct lp_build_tgsi_context *bld_base,
394 struct lp_build_emit_data *emit_data)
395 {
396 struct si_shader_context *ctx = si_shader_context(bld_base);
397 char *intr;
398
399 if (emit_data->info->opcode == TGSI_OPCODE_FRC)
400 intr = "llvm.floor.f32";
401 else if (emit_data->info->opcode == TGSI_OPCODE_DFRAC)
402 intr = "llvm.floor.f64";
403 else {
404 assert(0);
405 return;
406 }
407
408 LLVMValueRef floor = lp_build_intrinsic(ctx->ac.builder, intr, emit_data->dst_type,
409 &emit_data->args[0], 1,
410 LP_FUNC_ATTR_READNONE);
411 emit_data->output[emit_data->chan] = LLVMBuildFSub(ctx->ac.builder,
412 emit_data->args[0], floor, "");
413 }
414
415 static void emit_f2i(const struct lp_build_tgsi_action *action,
416 struct lp_build_tgsi_context *bld_base,
417 struct lp_build_emit_data *emit_data)
418 {
419 struct si_shader_context *ctx = si_shader_context(bld_base);
420 emit_data->output[emit_data->chan] = LLVMBuildFPToSI(ctx->ac.builder,
421 emit_data->args[0], ctx->i32, "");
422 }
423
424 static void emit_f2u(const struct lp_build_tgsi_action *action,
425 struct lp_build_tgsi_context *bld_base,
426 struct lp_build_emit_data *emit_data)
427 {
428 struct si_shader_context *ctx = si_shader_context(bld_base);
429 emit_data->output[emit_data->chan] = LLVMBuildFPToUI(ctx->ac.builder,
430 emit_data->args[0], ctx->i32, "");
431 }
432
433 static void emit_i2f(const struct lp_build_tgsi_action *action,
434 struct lp_build_tgsi_context *bld_base,
435 struct lp_build_emit_data *emit_data)
436 {
437 struct si_shader_context *ctx = si_shader_context(bld_base);
438 emit_data->output[emit_data->chan] = LLVMBuildSIToFP(ctx->ac.builder,
439 emit_data->args[0], ctx->f32, "");
440 }
441
442 static void emit_u2f(const struct lp_build_tgsi_action *action,
443 struct lp_build_tgsi_context *bld_base,
444 struct lp_build_emit_data *emit_data)
445 {
446 struct si_shader_context *ctx = si_shader_context(bld_base);
447 emit_data->output[emit_data->chan] = LLVMBuildUIToFP(ctx->ac.builder,
448 emit_data->args[0], ctx->f32, "");
449 }
450
451 static void
452 build_tgsi_intrinsic_nomem(const struct lp_build_tgsi_action *action,
453 struct lp_build_tgsi_context *bld_base,
454 struct lp_build_emit_data *emit_data)
455 {
456 struct si_shader_context *ctx = si_shader_context(bld_base);
457 emit_data->output[emit_data->chan] =
458 lp_build_intrinsic(ctx->ac.builder, action->intr_name,
459 emit_data->dst_type, emit_data->args,
460 emit_data->arg_count, LP_FUNC_ATTR_READNONE);
461 }
462
463 static void emit_bfi(const struct lp_build_tgsi_action *action,
464 struct lp_build_tgsi_context *bld_base,
465 struct lp_build_emit_data *emit_data)
466 {
467 struct si_shader_context *ctx = si_shader_context(bld_base);
468 LLVMBuilderRef builder = ctx->ac.builder;
469 LLVMValueRef bfi_args[3];
470 LLVMValueRef bfi_sm5;
471 LLVMValueRef cond;
472
473 // Calculate the bitmask: (((1 << src3) - 1) << src2
474 bfi_args[0] = LLVMBuildShl(builder,
475 LLVMBuildSub(builder,
476 LLVMBuildShl(builder,
477 ctx->i32_1,
478 emit_data->args[3], ""),
479 ctx->i32_1, ""),
480 emit_data->args[2], "");
481
482 bfi_args[1] = LLVMBuildShl(builder, emit_data->args[1],
483 emit_data->args[2], "");
484
485 bfi_args[2] = emit_data->args[0];
486
487 /* Calculate:
488 * (arg0 & arg1) | (~arg0 & arg2) = arg2 ^ (arg0 & (arg1 ^ arg2)
489 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
490 */
491 bfi_sm5 =
492 LLVMBuildXor(builder, bfi_args[2],
493 LLVMBuildAnd(builder, bfi_args[0],
494 LLVMBuildXor(builder, bfi_args[1], bfi_args[2],
495 ""), ""), "");
496
497 /* Since shifts of >= 32 bits are undefined in LLVM IR, the backend
498 * uses the convenient V_BFI lowering for the above, which follows SM5
499 * and disagrees with GLSL semantics when bits (src3) is 32.
500 */
501 cond = LLVMBuildICmp(builder, LLVMIntUGE, emit_data->args[3],
502 LLVMConstInt(ctx->i32, 32, 0), "");
503 emit_data->output[emit_data->chan] =
504 LLVMBuildSelect(builder, cond, emit_data->args[1], bfi_sm5, "");
505 }
506
507 static void emit_bfe(const struct lp_build_tgsi_action *action,
508 struct lp_build_tgsi_context *bld_base,
509 struct lp_build_emit_data *emit_data)
510 {
511 struct si_shader_context *ctx = si_shader_context(bld_base);
512 LLVMValueRef bfe_sm5;
513 LLVMValueRef cond;
514
515 bfe_sm5 = ac_build_bfe(&ctx->ac, emit_data->args[0],
516 emit_data->args[1], emit_data->args[2],
517 emit_data->info->opcode == TGSI_OPCODE_IBFE);
518
519 /* Correct for GLSL semantics. */
520 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntUGE, emit_data->args[2],
521 LLVMConstInt(ctx->i32, 32, 0), "");
522 emit_data->output[emit_data->chan] =
523 LLVMBuildSelect(ctx->ac.builder, cond, emit_data->args[0], bfe_sm5, "");
524 }
525
526 /* this is ffs in C */
527 static void emit_lsb(const struct lp_build_tgsi_action *action,
528 struct lp_build_tgsi_context *bld_base,
529 struct lp_build_emit_data *emit_data)
530 {
531 struct si_shader_context *ctx = si_shader_context(bld_base);
532 LLVMValueRef args[2] = {
533 emit_data->args[0],
534
535 /* The value of 1 means that ffs(x=0) = undef, so LLVM won't
536 * add special code to check for x=0. The reason is that
537 * the LLVM behavior for x=0 is different from what we
538 * need here. However, LLVM also assumes that ffs(x) is
539 * in [0, 31], but GLSL expects that ffs(0) = -1, so
540 * a conditional assignment to handle 0 is still required.
541 */
542 LLVMConstInt(ctx->i1, 1, 0)
543 };
544
545 LLVMValueRef lsb =
546 lp_build_intrinsic(ctx->ac.builder, "llvm.cttz.i32",
547 emit_data->dst_type, args, ARRAY_SIZE(args),
548 LP_FUNC_ATTR_READNONE);
549
550 /* TODO: We need an intrinsic to skip this conditional. */
551 /* Check for zero: */
552 emit_data->output[emit_data->chan] =
553 LLVMBuildSelect(ctx->ac.builder,
554 LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, args[0],
555 ctx->i32_0, ""),
556 LLVMConstInt(ctx->i32, -1, 0), lsb, "");
557 }
558
559 /* Find the last bit set. */
560 static void emit_umsb(const struct lp_build_tgsi_action *action,
561 struct lp_build_tgsi_context *bld_base,
562 struct lp_build_emit_data *emit_data)
563 {
564 struct si_shader_context *ctx = si_shader_context(bld_base);
565
566 emit_data->output[emit_data->chan] =
567 ac_build_umsb(&ctx->ac, emit_data->args[0], emit_data->dst_type);
568 }
569
570 /* Find the last bit opposite of the sign bit. */
571 static void emit_imsb(const struct lp_build_tgsi_action *action,
572 struct lp_build_tgsi_context *bld_base,
573 struct lp_build_emit_data *emit_data)
574 {
575 struct si_shader_context *ctx = si_shader_context(bld_base);
576 emit_data->output[emit_data->chan] =
577 ac_build_imsb(&ctx->ac, emit_data->args[0],
578 emit_data->dst_type);
579 }
580
581 static void emit_iabs(const struct lp_build_tgsi_action *action,
582 struct lp_build_tgsi_context *bld_base,
583 struct lp_build_emit_data *emit_data)
584 {
585 struct si_shader_context *ctx = si_shader_context(bld_base);
586
587 emit_data->output[emit_data->chan] =
588 lp_build_emit_llvm_binary(bld_base, TGSI_OPCODE_IMAX,
589 emit_data->args[0],
590 LLVMBuildNeg(ctx->ac.builder,
591 emit_data->args[0], ""));
592 }
593
594 static void emit_minmax_int(const struct lp_build_tgsi_action *action,
595 struct lp_build_tgsi_context *bld_base,
596 struct lp_build_emit_data *emit_data)
597 {
598 struct si_shader_context *ctx = si_shader_context(bld_base);
599 LLVMIntPredicate op;
600
601 switch (emit_data->info->opcode) {
602 default:
603 assert(0);
604 case TGSI_OPCODE_IMAX:
605 case TGSI_OPCODE_I64MAX:
606 op = LLVMIntSGT;
607 break;
608 case TGSI_OPCODE_IMIN:
609 case TGSI_OPCODE_I64MIN:
610 op = LLVMIntSLT;
611 break;
612 case TGSI_OPCODE_UMAX:
613 case TGSI_OPCODE_U64MAX:
614 op = LLVMIntUGT;
615 break;
616 case TGSI_OPCODE_UMIN:
617 case TGSI_OPCODE_U64MIN:
618 op = LLVMIntULT;
619 break;
620 }
621
622 emit_data->output[emit_data->chan] =
623 LLVMBuildSelect(ctx->ac.builder,
624 LLVMBuildICmp(ctx->ac.builder, op, emit_data->args[0],
625 emit_data->args[1], ""),
626 emit_data->args[0],
627 emit_data->args[1], "");
628 }
629
630 static void pk2h_fetch_args(struct lp_build_tgsi_context *bld_base,
631 struct lp_build_emit_data *emit_data)
632 {
633 emit_data->args[0] = lp_build_emit_fetch(bld_base, emit_data->inst,
634 0, TGSI_CHAN_X);
635 emit_data->args[1] = lp_build_emit_fetch(bld_base, emit_data->inst,
636 0, TGSI_CHAN_Y);
637 }
638
639 static void emit_pk2h(const struct lp_build_tgsi_action *action,
640 struct lp_build_tgsi_context *bld_base,
641 struct lp_build_emit_data *emit_data)
642 {
643 /* From the GLSL 4.50 spec:
644 * "The rounding mode cannot be set and is undefined."
645 *
646 * v_cvt_pkrtz_f16 rounds to zero, but it's fastest.
647 */
648 emit_data->output[emit_data->chan] =
649 ac_build_cvt_pkrtz_f16(&si_shader_context(bld_base)->ac,
650 emit_data->args);
651 }
652
653 static void up2h_fetch_args(struct lp_build_tgsi_context *bld_base,
654 struct lp_build_emit_data *emit_data)
655 {
656 emit_data->args[0] = lp_build_emit_fetch(bld_base, emit_data->inst,
657 0, TGSI_CHAN_X);
658 }
659
660 static void emit_up2h(const struct lp_build_tgsi_action *action,
661 struct lp_build_tgsi_context *bld_base,
662 struct lp_build_emit_data *emit_data)
663 {
664 struct si_shader_context *ctx = si_shader_context(bld_base);
665 LLVMTypeRef i16;
666 LLVMValueRef const16, input, val;
667 unsigned i;
668
669 i16 = LLVMInt16TypeInContext(ctx->ac.context);
670 const16 = LLVMConstInt(ctx->i32, 16, 0);
671 input = emit_data->args[0];
672
673 for (i = 0; i < 2; i++) {
674 val = i == 1 ? LLVMBuildLShr(ctx->ac.builder, input, const16, "") : input;
675 val = LLVMBuildTrunc(ctx->ac.builder, val, i16, "");
676 val = ac_to_float(&ctx->ac, val);
677 emit_data->output[i] = LLVMBuildFPExt(ctx->ac.builder, val, ctx->f32, "");
678 }
679 }
680
681 static void emit_fdiv(const struct lp_build_tgsi_action *action,
682 struct lp_build_tgsi_context *bld_base,
683 struct lp_build_emit_data *emit_data)
684 {
685 struct si_shader_context *ctx = si_shader_context(bld_base);
686
687 emit_data->output[emit_data->chan] =
688 LLVMBuildFDiv(ctx->ac.builder,
689 emit_data->args[0], emit_data->args[1], "");
690
691 /* Use v_rcp_f32 instead of precise division. */
692 if (!LLVMIsConstant(emit_data->output[emit_data->chan]))
693 LLVMSetMetadata(emit_data->output[emit_data->chan],
694 ctx->fpmath_md_kind, ctx->fpmath_md_2p5_ulp);
695 }
696
697 /* 1/sqrt is translated to rsq for f32 if fp32 denormals are not enabled in
698 * the target machine. f64 needs global unsafe math flags to get rsq. */
699 static void emit_rsq(const struct lp_build_tgsi_action *action,
700 struct lp_build_tgsi_context *bld_base,
701 struct lp_build_emit_data *emit_data)
702 {
703 struct si_shader_context *ctx = si_shader_context(bld_base);
704
705 LLVMValueRef sqrt =
706 lp_build_emit_llvm_unary(bld_base, TGSI_OPCODE_SQRT,
707 emit_data->args[0]);
708
709 emit_data->output[emit_data->chan] =
710 lp_build_emit_llvm_binary(bld_base, TGSI_OPCODE_DIV,
711 ctx->ac.f32_1, sqrt);
712 }
713
714 static void dfracexp_fetch_args(struct lp_build_tgsi_context *bld_base,
715 struct lp_build_emit_data *emit_data)
716 {
717 emit_data->args[0] = lp_build_emit_fetch(bld_base, emit_data->inst, 0, TGSI_CHAN_X);
718 emit_data->arg_count = 1;
719 }
720
721 static void dfracexp_emit(const struct lp_build_tgsi_action *action,
722 struct lp_build_tgsi_context *bld_base,
723 struct lp_build_emit_data *emit_data)
724 {
725 struct si_shader_context *ctx = si_shader_context(bld_base);
726
727 emit_data->output[emit_data->chan] =
728 lp_build_intrinsic(ctx->ac.builder, "llvm.amdgcn.frexp.mant.f64",
729 ctx->ac.f64, &emit_data->args[0], 1, 0);
730 emit_data->output1[emit_data->chan] =
731 lp_build_intrinsic(ctx->ac.builder, "llvm.amdgcn.frexp.exp.i32.f64",
732 ctx->ac.i32, &emit_data->args[0], 1, 0);
733 }
734
735 void si_shader_context_init_alu(struct lp_build_tgsi_context *bld_base)
736 {
737 lp_set_default_actions(bld_base);
738
739 bld_base->op_actions[TGSI_OPCODE_AND].emit = emit_and;
740 bld_base->op_actions[TGSI_OPCODE_ARL].emit = emit_arl;
741 bld_base->op_actions[TGSI_OPCODE_BFI].emit = emit_bfi;
742 bld_base->op_actions[TGSI_OPCODE_BREV].emit = build_tgsi_intrinsic_nomem;
743 bld_base->op_actions[TGSI_OPCODE_BREV].intr_name = "llvm.bitreverse.i32";
744 bld_base->op_actions[TGSI_OPCODE_CEIL].emit = build_tgsi_intrinsic_nomem;
745 bld_base->op_actions[TGSI_OPCODE_CEIL].intr_name = "llvm.ceil.f32";
746 bld_base->op_actions[TGSI_OPCODE_CMP].emit = emit_cmp;
747 bld_base->op_actions[TGSI_OPCODE_COS].emit = build_tgsi_intrinsic_nomem;
748 bld_base->op_actions[TGSI_OPCODE_COS].intr_name = "llvm.cos.f32";
749 bld_base->op_actions[TGSI_OPCODE_DABS].emit = build_tgsi_intrinsic_nomem;
750 bld_base->op_actions[TGSI_OPCODE_DABS].intr_name = "llvm.fabs.f64";
751 bld_base->op_actions[TGSI_OPCODE_DCEIL].emit = build_tgsi_intrinsic_nomem;
752 bld_base->op_actions[TGSI_OPCODE_DCEIL].intr_name = "llvm.ceil.f64";
753 bld_base->op_actions[TGSI_OPCODE_DFLR].emit = build_tgsi_intrinsic_nomem;
754 bld_base->op_actions[TGSI_OPCODE_DFLR].intr_name = "llvm.floor.f64";
755 bld_base->op_actions[TGSI_OPCODE_DFMA].emit = build_tgsi_intrinsic_nomem;
756 bld_base->op_actions[TGSI_OPCODE_DFMA].intr_name = "llvm.fma.f64";
757 bld_base->op_actions[TGSI_OPCODE_DFRAC].emit = emit_frac;
758 bld_base->op_actions[TGSI_OPCODE_DIV].emit = emit_fdiv;
759 bld_base->op_actions[TGSI_OPCODE_DNEG].emit = emit_dneg;
760 bld_base->op_actions[TGSI_OPCODE_DROUND].emit = build_tgsi_intrinsic_nomem;
761 bld_base->op_actions[TGSI_OPCODE_DROUND].intr_name = "llvm.rint.f64";
762 bld_base->op_actions[TGSI_OPCODE_DSEQ].emit = emit_dcmp;
763 bld_base->op_actions[TGSI_OPCODE_DSGE].emit = emit_dcmp;
764 bld_base->op_actions[TGSI_OPCODE_DSLT].emit = emit_dcmp;
765 bld_base->op_actions[TGSI_OPCODE_DSNE].emit = emit_dcmp;
766 bld_base->op_actions[TGSI_OPCODE_DSSG].emit = emit_ssg;
767 bld_base->op_actions[TGSI_OPCODE_DRSQ].emit = build_tgsi_intrinsic_nomem;
768 bld_base->op_actions[TGSI_OPCODE_DRSQ].intr_name = "llvm.amdgcn.rsq.f64";
769 bld_base->op_actions[TGSI_OPCODE_DSQRT].emit = build_tgsi_intrinsic_nomem;
770 bld_base->op_actions[TGSI_OPCODE_DSQRT].intr_name = "llvm.sqrt.f64";
771 bld_base->op_actions[TGSI_OPCODE_DTRUNC].emit = build_tgsi_intrinsic_nomem;
772 bld_base->op_actions[TGSI_OPCODE_DTRUNC].intr_name = "llvm.trunc.f64";
773 bld_base->op_actions[TGSI_OPCODE_DFRACEXP].fetch_args = dfracexp_fetch_args;
774 bld_base->op_actions[TGSI_OPCODE_DFRACEXP].emit = dfracexp_emit;
775 bld_base->op_actions[TGSI_OPCODE_DLDEXP].emit = build_tgsi_intrinsic_nomem;
776 bld_base->op_actions[TGSI_OPCODE_DLDEXP].intr_name = "llvm.amdgcn.ldexp.f64";
777 bld_base->op_actions[TGSI_OPCODE_EX2].emit = build_tgsi_intrinsic_nomem;
778 bld_base->op_actions[TGSI_OPCODE_EX2].intr_name = "llvm.exp2.f32";
779 bld_base->op_actions[TGSI_OPCODE_FLR].emit = build_tgsi_intrinsic_nomem;
780 bld_base->op_actions[TGSI_OPCODE_FLR].intr_name = "llvm.floor.f32";
781 bld_base->op_actions[TGSI_OPCODE_FMA].emit =
782 bld_base->op_actions[TGSI_OPCODE_MAD].emit;
783 bld_base->op_actions[TGSI_OPCODE_FRC].emit = emit_frac;
784 bld_base->op_actions[TGSI_OPCODE_F2I].emit = emit_f2i;
785 bld_base->op_actions[TGSI_OPCODE_F2U].emit = emit_f2u;
786 bld_base->op_actions[TGSI_OPCODE_FSEQ].emit = emit_fcmp;
787 bld_base->op_actions[TGSI_OPCODE_FSGE].emit = emit_fcmp;
788 bld_base->op_actions[TGSI_OPCODE_FSLT].emit = emit_fcmp;
789 bld_base->op_actions[TGSI_OPCODE_FSNE].emit = emit_fcmp;
790 bld_base->op_actions[TGSI_OPCODE_IABS].emit = emit_iabs;
791 bld_base->op_actions[TGSI_OPCODE_IBFE].emit = emit_bfe;
792 bld_base->op_actions[TGSI_OPCODE_IDIV].emit = emit_idiv;
793 bld_base->op_actions[TGSI_OPCODE_IMAX].emit = emit_minmax_int;
794 bld_base->op_actions[TGSI_OPCODE_IMIN].emit = emit_minmax_int;
795 bld_base->op_actions[TGSI_OPCODE_IMSB].emit = emit_imsb;
796 bld_base->op_actions[TGSI_OPCODE_INEG].emit = emit_ineg;
797 bld_base->op_actions[TGSI_OPCODE_ISHR].emit = emit_ishr;
798 bld_base->op_actions[TGSI_OPCODE_ISGE].emit = emit_icmp;
799 bld_base->op_actions[TGSI_OPCODE_ISLT].emit = emit_icmp;
800 bld_base->op_actions[TGSI_OPCODE_ISSG].emit = emit_ssg;
801 bld_base->op_actions[TGSI_OPCODE_I2F].emit = emit_i2f;
802 bld_base->op_actions[TGSI_OPCODE_KILL_IF].fetch_args = kill_if_fetch_args;
803 bld_base->op_actions[TGSI_OPCODE_KILL_IF].emit = kil_emit;
804 bld_base->op_actions[TGSI_OPCODE_KILL].emit = kil_emit;
805 bld_base->op_actions[TGSI_OPCODE_LDEXP].emit = build_tgsi_intrinsic_nomem;
806 bld_base->op_actions[TGSI_OPCODE_LDEXP].intr_name = "llvm.amdgcn.ldexp.f32";
807 bld_base->op_actions[TGSI_OPCODE_LSB].emit = emit_lsb;
808 bld_base->op_actions[TGSI_OPCODE_LG2].emit = build_tgsi_intrinsic_nomem;
809 bld_base->op_actions[TGSI_OPCODE_LG2].intr_name = "llvm.log2.f32";
810 bld_base->op_actions[TGSI_OPCODE_MAX].emit = build_tgsi_intrinsic_nomem;
811 bld_base->op_actions[TGSI_OPCODE_MAX].intr_name = "llvm.maxnum.f32";
812 bld_base->op_actions[TGSI_OPCODE_MIN].emit = build_tgsi_intrinsic_nomem;
813 bld_base->op_actions[TGSI_OPCODE_MIN].intr_name = "llvm.minnum.f32";
814 bld_base->op_actions[TGSI_OPCODE_MOD].emit = emit_mod;
815 bld_base->op_actions[TGSI_OPCODE_UMSB].emit = emit_umsb;
816 bld_base->op_actions[TGSI_OPCODE_NOT].emit = emit_not;
817 bld_base->op_actions[TGSI_OPCODE_OR].emit = emit_or;
818 bld_base->op_actions[TGSI_OPCODE_PK2H].fetch_args = pk2h_fetch_args;
819 bld_base->op_actions[TGSI_OPCODE_PK2H].emit = emit_pk2h;
820 bld_base->op_actions[TGSI_OPCODE_POPC].emit = build_tgsi_intrinsic_nomem;
821 bld_base->op_actions[TGSI_OPCODE_POPC].intr_name = "llvm.ctpop.i32";
822 bld_base->op_actions[TGSI_OPCODE_POW].emit = build_tgsi_intrinsic_nomem;
823 bld_base->op_actions[TGSI_OPCODE_POW].intr_name = "llvm.pow.f32";
824 bld_base->op_actions[TGSI_OPCODE_ROUND].emit = build_tgsi_intrinsic_nomem;
825 bld_base->op_actions[TGSI_OPCODE_ROUND].intr_name = "llvm.rint.f32";
826 bld_base->op_actions[TGSI_OPCODE_RSQ].emit = emit_rsq;
827 bld_base->op_actions[TGSI_OPCODE_SGE].emit = emit_set_cond;
828 bld_base->op_actions[TGSI_OPCODE_SEQ].emit = emit_set_cond;
829 bld_base->op_actions[TGSI_OPCODE_SHL].emit = emit_shl;
830 bld_base->op_actions[TGSI_OPCODE_SLE].emit = emit_set_cond;
831 bld_base->op_actions[TGSI_OPCODE_SLT].emit = emit_set_cond;
832 bld_base->op_actions[TGSI_OPCODE_SNE].emit = emit_set_cond;
833 bld_base->op_actions[TGSI_OPCODE_SGT].emit = emit_set_cond;
834 bld_base->op_actions[TGSI_OPCODE_SIN].emit = build_tgsi_intrinsic_nomem;
835 bld_base->op_actions[TGSI_OPCODE_SIN].intr_name = "llvm.sin.f32";
836 bld_base->op_actions[TGSI_OPCODE_SQRT].emit = build_tgsi_intrinsic_nomem;
837 bld_base->op_actions[TGSI_OPCODE_SQRT].intr_name = "llvm.sqrt.f32";
838 bld_base->op_actions[TGSI_OPCODE_SSG].emit = emit_ssg;
839 bld_base->op_actions[TGSI_OPCODE_TRUNC].emit = build_tgsi_intrinsic_nomem;
840 bld_base->op_actions[TGSI_OPCODE_TRUNC].intr_name = "llvm.trunc.f32";
841 bld_base->op_actions[TGSI_OPCODE_UADD].emit = emit_uadd;
842 bld_base->op_actions[TGSI_OPCODE_UBFE].emit = emit_bfe;
843 bld_base->op_actions[TGSI_OPCODE_UDIV].emit = emit_udiv;
844 bld_base->op_actions[TGSI_OPCODE_UMAX].emit = emit_minmax_int;
845 bld_base->op_actions[TGSI_OPCODE_UMIN].emit = emit_minmax_int;
846 bld_base->op_actions[TGSI_OPCODE_UMOD].emit = emit_umod;
847 bld_base->op_actions[TGSI_OPCODE_USEQ].emit = emit_icmp;
848 bld_base->op_actions[TGSI_OPCODE_USGE].emit = emit_icmp;
849 bld_base->op_actions[TGSI_OPCODE_USHR].emit = emit_ushr;
850 bld_base->op_actions[TGSI_OPCODE_USLT].emit = emit_icmp;
851 bld_base->op_actions[TGSI_OPCODE_USNE].emit = emit_icmp;
852 bld_base->op_actions[TGSI_OPCODE_U2F].emit = emit_u2f;
853 bld_base->op_actions[TGSI_OPCODE_XOR].emit = emit_xor;
854 bld_base->op_actions[TGSI_OPCODE_UCMP].emit = emit_ucmp;
855 bld_base->op_actions[TGSI_OPCODE_UP2H].fetch_args = up2h_fetch_args;
856 bld_base->op_actions[TGSI_OPCODE_UP2H].emit = emit_up2h;
857
858 bld_base->op_actions[TGSI_OPCODE_I64MAX].emit = emit_minmax_int;
859 bld_base->op_actions[TGSI_OPCODE_I64MIN].emit = emit_minmax_int;
860 bld_base->op_actions[TGSI_OPCODE_U64MAX].emit = emit_minmax_int;
861 bld_base->op_actions[TGSI_OPCODE_U64MIN].emit = emit_minmax_int;
862 bld_base->op_actions[TGSI_OPCODE_I64ABS].emit = emit_iabs;
863 bld_base->op_actions[TGSI_OPCODE_I64SSG].emit = emit_ssg;
864 bld_base->op_actions[TGSI_OPCODE_I64NEG].emit = emit_ineg;
865
866 bld_base->op_actions[TGSI_OPCODE_U64SEQ].emit = emit_icmp;
867 bld_base->op_actions[TGSI_OPCODE_U64SNE].emit = emit_icmp;
868 bld_base->op_actions[TGSI_OPCODE_U64SGE].emit = emit_icmp;
869 bld_base->op_actions[TGSI_OPCODE_U64SLT].emit = emit_icmp;
870 bld_base->op_actions[TGSI_OPCODE_I64SGE].emit = emit_icmp;
871 bld_base->op_actions[TGSI_OPCODE_I64SLT].emit = emit_icmp;
872
873 bld_base->op_actions[TGSI_OPCODE_U64ADD].emit = emit_uadd;
874 bld_base->op_actions[TGSI_OPCODE_U64SHL].emit = emit_shl;
875 bld_base->op_actions[TGSI_OPCODE_U64SHR].emit = emit_ushr;
876 bld_base->op_actions[TGSI_OPCODE_I64SHR].emit = emit_ishr;
877
878 bld_base->op_actions[TGSI_OPCODE_U64MOD].emit = emit_umod;
879 bld_base->op_actions[TGSI_OPCODE_I64MOD].emit = emit_mod;
880 bld_base->op_actions[TGSI_OPCODE_U64DIV].emit = emit_udiv;
881 bld_base->op_actions[TGSI_OPCODE_I64DIV].emit = emit_idiv;
882 }