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amd: remove support for LLVM 6.0
[mesa.git] / src / gallium / drivers / radeonsi / si_shader_tgsi_alu.c
1 /*
2 * Copyright 2016 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE.
23 */
24
25 #include "si_shader_internal.h"
26 #include "ac_llvm_util.h"
27
28 void si_llvm_emit_kill(struct ac_shader_abi *abi, LLVMValueRef visible)
29 {
30 struct si_shader_context *ctx = si_shader_context_from_abi(abi);
31 LLVMBuilderRef builder = ctx->ac.builder;
32
33 if (ctx->shader->selector->force_correct_derivs_after_kill) {
34 /* Kill immediately while maintaining WQM. */
35 ac_build_kill_if_false(&ctx->ac,
36 ac_build_wqm_vote(&ctx->ac, visible));
37
38 LLVMValueRef mask = LLVMBuildLoad(builder, ctx->postponed_kill, "");
39 mask = LLVMBuildAnd(builder, mask, visible, "");
40 LLVMBuildStore(builder, mask, ctx->postponed_kill);
41 return;
42 }
43
44 ac_build_kill_if_false(&ctx->ac, visible);
45 }
46
47 static void kil_emit(const struct lp_build_tgsi_action *action,
48 struct lp_build_tgsi_context *bld_base,
49 struct lp_build_emit_data *emit_data)
50 {
51 struct si_shader_context *ctx = si_shader_context(bld_base);
52 LLVMValueRef visible;
53
54 if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_KILL_IF) {
55 const struct tgsi_full_instruction *inst = emit_data->inst;
56 struct si_shader_context *ctx = si_shader_context(bld_base);
57 LLVMBuilderRef builder = ctx->ac.builder;
58 unsigned i;
59 LLVMValueRef conds[TGSI_NUM_CHANNELS];
60
61 for (i = 0; i < TGSI_NUM_CHANNELS; i++) {
62 LLVMValueRef value = lp_build_emit_fetch(bld_base, inst, 0, i);
63 /* UGE because NaN shouldn't get killed */
64 conds[i] = LLVMBuildFCmp(builder, LLVMRealUGE, value,
65 ctx->ac.f32_0, "");
66 }
67
68 /* And the conditions together */
69 for (i = TGSI_NUM_CHANNELS - 1; i > 0; i--) {
70 conds[i - 1] = LLVMBuildAnd(builder, conds[i], conds[i - 1], "");
71 }
72 visible = conds[0];
73 } else {
74 assert(emit_data->inst->Instruction.Opcode == TGSI_OPCODE_KILL);
75 visible = ctx->i1false;
76 }
77
78 si_llvm_emit_kill(&ctx->abi, visible);
79 }
80
81 static void emit_icmp(const struct lp_build_tgsi_action *action,
82 struct lp_build_tgsi_context *bld_base,
83 struct lp_build_emit_data *emit_data)
84 {
85 unsigned pred;
86 struct si_shader_context *ctx = si_shader_context(bld_base);
87
88 switch (emit_data->inst->Instruction.Opcode) {
89 case TGSI_OPCODE_USEQ:
90 case TGSI_OPCODE_U64SEQ: pred = LLVMIntEQ; break;
91 case TGSI_OPCODE_USNE:
92 case TGSI_OPCODE_U64SNE: pred = LLVMIntNE; break;
93 case TGSI_OPCODE_USGE:
94 case TGSI_OPCODE_U64SGE: pred = LLVMIntUGE; break;
95 case TGSI_OPCODE_USLT:
96 case TGSI_OPCODE_U64SLT: pred = LLVMIntULT; break;
97 case TGSI_OPCODE_ISGE:
98 case TGSI_OPCODE_I64SGE: pred = LLVMIntSGE; break;
99 case TGSI_OPCODE_ISLT:
100 case TGSI_OPCODE_I64SLT: pred = LLVMIntSLT; break;
101 default:
102 assert(!"unknown instruction");
103 pred = 0;
104 break;
105 }
106
107 LLVMValueRef v = LLVMBuildICmp(ctx->ac.builder, pred,
108 emit_data->args[0], emit_data->args[1],"");
109
110 v = LLVMBuildSExtOrBitCast(ctx->ac.builder, v, ctx->i32, "");
111
112 emit_data->output[emit_data->chan] = v;
113 }
114
115 static void emit_ucmp(const struct lp_build_tgsi_action *action,
116 struct lp_build_tgsi_context *bld_base,
117 struct lp_build_emit_data *emit_data)
118 {
119 struct si_shader_context *ctx = si_shader_context(bld_base);
120 LLVMValueRef arg0 = ac_to_integer(&ctx->ac, emit_data->args[0]);
121
122 LLVMValueRef v = LLVMBuildICmp(ctx->ac.builder, LLVMIntNE, arg0,
123 ctx->i32_0, "");
124
125 emit_data->output[emit_data->chan] =
126 LLVMBuildSelect(ctx->ac.builder, v, emit_data->args[1], emit_data->args[2], "");
127 }
128
129 static void emit_cmp(const struct lp_build_tgsi_action *action,
130 struct lp_build_tgsi_context *bld_base,
131 struct lp_build_emit_data *emit_data)
132 {
133 struct si_shader_context *ctx = si_shader_context(bld_base);
134 LLVMValueRef cond, *args = emit_data->args;
135
136 cond = LLVMBuildFCmp(ctx->ac.builder, LLVMRealOLT, args[0],
137 ctx->ac.f32_0, "");
138
139 emit_data->output[emit_data->chan] =
140 LLVMBuildSelect(ctx->ac.builder, cond, args[1], args[2], "");
141 }
142
143 static void emit_set_cond(const struct lp_build_tgsi_action *action,
144 struct lp_build_tgsi_context *bld_base,
145 struct lp_build_emit_data *emit_data)
146 {
147 struct si_shader_context *ctx = si_shader_context(bld_base);
148 LLVMRealPredicate pred;
149 LLVMValueRef cond;
150
151 /* Use ordered for everything but NE (which is usual for
152 * float comparisons)
153 */
154 switch (emit_data->inst->Instruction.Opcode) {
155 case TGSI_OPCODE_SGE: pred = LLVMRealOGE; break;
156 case TGSI_OPCODE_SEQ: pred = LLVMRealOEQ; break;
157 case TGSI_OPCODE_SLE: pred = LLVMRealOLE; break;
158 case TGSI_OPCODE_SLT: pred = LLVMRealOLT; break;
159 case TGSI_OPCODE_SNE: pred = LLVMRealUNE; break;
160 case TGSI_OPCODE_SGT: pred = LLVMRealOGT; break;
161 default: assert(!"unknown instruction"); pred = 0; break;
162 }
163
164 cond = LLVMBuildFCmp(ctx->ac.builder,
165 pred, emit_data->args[0], emit_data->args[1], "");
166
167 emit_data->output[emit_data->chan] = LLVMBuildSelect(ctx->ac.builder,
168 cond, ctx->ac.f32_1, ctx->ac.f32_0, "");
169 }
170
171 static void emit_fcmp(const struct lp_build_tgsi_action *action,
172 struct lp_build_tgsi_context *bld_base,
173 struct lp_build_emit_data *emit_data)
174 {
175 struct si_shader_context *ctx = si_shader_context(bld_base);
176 LLVMRealPredicate pred;
177
178 /* Use ordered for everything but NE (which is usual for
179 * float comparisons)
180 */
181 switch (emit_data->inst->Instruction.Opcode) {
182 case TGSI_OPCODE_FSEQ: pred = LLVMRealOEQ; break;
183 case TGSI_OPCODE_FSGE: pred = LLVMRealOGE; break;
184 case TGSI_OPCODE_FSLT: pred = LLVMRealOLT; break;
185 case TGSI_OPCODE_FSNE: pred = LLVMRealUNE; break;
186 default: assert(!"unknown instruction"); pred = 0; break;
187 }
188
189 LLVMValueRef v = LLVMBuildFCmp(ctx->ac.builder, pred,
190 emit_data->args[0], emit_data->args[1],"");
191
192 v = LLVMBuildSExtOrBitCast(ctx->ac.builder, v, ctx->i32, "");
193
194 emit_data->output[emit_data->chan] = v;
195 }
196
197 static void emit_dcmp(const struct lp_build_tgsi_action *action,
198 struct lp_build_tgsi_context *bld_base,
199 struct lp_build_emit_data *emit_data)
200 {
201 struct si_shader_context *ctx = si_shader_context(bld_base);
202 LLVMRealPredicate pred;
203
204 /* Use ordered for everything but NE (which is usual for
205 * float comparisons)
206 */
207 switch (emit_data->inst->Instruction.Opcode) {
208 case TGSI_OPCODE_DSEQ: pred = LLVMRealOEQ; break;
209 case TGSI_OPCODE_DSGE: pred = LLVMRealOGE; break;
210 case TGSI_OPCODE_DSLT: pred = LLVMRealOLT; break;
211 case TGSI_OPCODE_DSNE: pred = LLVMRealUNE; break;
212 default: assert(!"unknown instruction"); pred = 0; break;
213 }
214
215 LLVMValueRef v = LLVMBuildFCmp(ctx->ac.builder, pred,
216 emit_data->args[0], emit_data->args[1],"");
217
218 v = LLVMBuildSExtOrBitCast(ctx->ac.builder, v, ctx->i32, "");
219
220 emit_data->output[emit_data->chan] = v;
221 }
222
223 static void emit_not(const struct lp_build_tgsi_action *action,
224 struct lp_build_tgsi_context *bld_base,
225 struct lp_build_emit_data *emit_data)
226 {
227 struct si_shader_context *ctx = si_shader_context(bld_base);
228 LLVMValueRef v = ac_to_integer(&ctx->ac, emit_data->args[0]);
229 emit_data->output[emit_data->chan] = LLVMBuildNot(ctx->ac.builder, v, "");
230 }
231
232 static void emit_arl(const struct lp_build_tgsi_action *action,
233 struct lp_build_tgsi_context *bld_base,
234 struct lp_build_emit_data *emit_data)
235 {
236 struct si_shader_context *ctx = si_shader_context(bld_base);
237 LLVMValueRef floor_index =
238 ac_build_intrinsic(&ctx->ac, "llvm.floor.f32", ctx->f32,
239 &emit_data->args[0], 1, AC_FUNC_ATTR_READNONE);
240 emit_data->output[emit_data->chan] = LLVMBuildFPToSI(ctx->ac.builder,
241 floor_index, ctx->i32, "");
242 }
243
244 static void emit_and(const struct lp_build_tgsi_action *action,
245 struct lp_build_tgsi_context *bld_base,
246 struct lp_build_emit_data *emit_data)
247 {
248 struct si_shader_context *ctx = si_shader_context(bld_base);
249 emit_data->output[emit_data->chan] = LLVMBuildAnd(ctx->ac.builder,
250 emit_data->args[0], emit_data->args[1], "");
251 }
252
253 static void emit_or(const struct lp_build_tgsi_action *action,
254 struct lp_build_tgsi_context *bld_base,
255 struct lp_build_emit_data *emit_data)
256 {
257 struct si_shader_context *ctx = si_shader_context(bld_base);
258 emit_data->output[emit_data->chan] = LLVMBuildOr(ctx->ac.builder,
259 emit_data->args[0], emit_data->args[1], "");
260 }
261
262 static void emit_uadd(const struct lp_build_tgsi_action *action,
263 struct lp_build_tgsi_context *bld_base,
264 struct lp_build_emit_data *emit_data)
265 {
266 struct si_shader_context *ctx = si_shader_context(bld_base);
267 emit_data->output[emit_data->chan] = LLVMBuildAdd(ctx->ac.builder,
268 emit_data->args[0], emit_data->args[1], "");
269 }
270
271 static void emit_udiv(const struct lp_build_tgsi_action *action,
272 struct lp_build_tgsi_context *bld_base,
273 struct lp_build_emit_data *emit_data)
274 {
275 struct si_shader_context *ctx = si_shader_context(bld_base);
276 emit_data->output[emit_data->chan] = LLVMBuildUDiv(ctx->ac.builder,
277 emit_data->args[0], emit_data->args[1], "");
278 }
279
280 static void emit_idiv(const struct lp_build_tgsi_action *action,
281 struct lp_build_tgsi_context *bld_base,
282 struct lp_build_emit_data *emit_data)
283 {
284 struct si_shader_context *ctx = si_shader_context(bld_base);
285 emit_data->output[emit_data->chan] = LLVMBuildSDiv(ctx->ac.builder,
286 emit_data->args[0], emit_data->args[1], "");
287 }
288
289 static void emit_mod(const struct lp_build_tgsi_action *action,
290 struct lp_build_tgsi_context *bld_base,
291 struct lp_build_emit_data *emit_data)
292 {
293 struct si_shader_context *ctx = si_shader_context(bld_base);
294 emit_data->output[emit_data->chan] = LLVMBuildSRem(ctx->ac.builder,
295 emit_data->args[0], emit_data->args[1], "");
296 }
297
298 static void emit_umod(const struct lp_build_tgsi_action *action,
299 struct lp_build_tgsi_context *bld_base,
300 struct lp_build_emit_data *emit_data)
301 {
302 struct si_shader_context *ctx = si_shader_context(bld_base);
303 emit_data->output[emit_data->chan] = LLVMBuildURem(ctx->ac.builder,
304 emit_data->args[0], emit_data->args[1], "");
305 }
306
307 static void emit_shl(const struct lp_build_tgsi_action *action,
308 struct lp_build_tgsi_context *bld_base,
309 struct lp_build_emit_data *emit_data)
310 {
311 struct si_shader_context *ctx = si_shader_context(bld_base);
312 emit_data->output[emit_data->chan] = LLVMBuildShl(ctx->ac.builder,
313 emit_data->args[0], emit_data->args[1], "");
314 }
315
316 static void emit_ushr(const struct lp_build_tgsi_action *action,
317 struct lp_build_tgsi_context *bld_base,
318 struct lp_build_emit_data *emit_data)
319 {
320 struct si_shader_context *ctx = si_shader_context(bld_base);
321 emit_data->output[emit_data->chan] = LLVMBuildLShr(ctx->ac.builder,
322 emit_data->args[0], emit_data->args[1], "");
323 }
324 static void emit_ishr(const struct lp_build_tgsi_action *action,
325 struct lp_build_tgsi_context *bld_base,
326 struct lp_build_emit_data *emit_data)
327 {
328 struct si_shader_context *ctx = si_shader_context(bld_base);
329 emit_data->output[emit_data->chan] = LLVMBuildAShr(ctx->ac.builder,
330 emit_data->args[0], emit_data->args[1], "");
331 }
332
333 static void emit_xor(const struct lp_build_tgsi_action *action,
334 struct lp_build_tgsi_context *bld_base,
335 struct lp_build_emit_data *emit_data)
336 {
337 struct si_shader_context *ctx = si_shader_context(bld_base);
338 emit_data->output[emit_data->chan] = LLVMBuildXor(ctx->ac.builder,
339 emit_data->args[0], emit_data->args[1], "");
340 }
341
342 static void emit_ssg(const struct lp_build_tgsi_action *action,
343 struct lp_build_tgsi_context *bld_base,
344 struct lp_build_emit_data *emit_data)
345 {
346 struct si_shader_context *ctx = si_shader_context(bld_base);
347
348 LLVMValueRef val;
349
350 if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_I64SSG) {
351 val = ac_build_isign(&ctx->ac, emit_data->args[0], 64);
352 } else if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_ISSG) {
353 val = ac_build_isign(&ctx->ac, emit_data->args[0], 32);
354 } else if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_DSSG) {
355 val = ac_build_fsign(&ctx->ac, emit_data->args[0], 64);
356 } else {
357 val = ac_build_fsign(&ctx->ac, emit_data->args[0], 32);
358 }
359
360 emit_data->output[emit_data->chan] = val;
361 }
362
363 static void emit_ineg(const struct lp_build_tgsi_action *action,
364 struct lp_build_tgsi_context *bld_base,
365 struct lp_build_emit_data *emit_data)
366 {
367 struct si_shader_context *ctx = si_shader_context(bld_base);
368 emit_data->output[emit_data->chan] = LLVMBuildNeg(ctx->ac.builder,
369 emit_data->args[0], "");
370 }
371
372 static void emit_dneg(const struct lp_build_tgsi_action *action,
373 struct lp_build_tgsi_context *bld_base,
374 struct lp_build_emit_data *emit_data)
375 {
376 struct si_shader_context *ctx = si_shader_context(bld_base);
377 emit_data->output[emit_data->chan] = LLVMBuildFNeg(ctx->ac.builder,
378 emit_data->args[0], "");
379 }
380
381 static void emit_frac(const struct lp_build_tgsi_action *action,
382 struct lp_build_tgsi_context *bld_base,
383 struct lp_build_emit_data *emit_data)
384 {
385 struct si_shader_context *ctx = si_shader_context(bld_base);
386 unsigned bitsize;
387
388 if (emit_data->info->opcode == TGSI_OPCODE_FRC)
389 bitsize = 32;
390 else if (emit_data->info->opcode == TGSI_OPCODE_DFRAC)
391 bitsize = 64;
392 else {
393 assert(0);
394 return;
395 }
396
397 emit_data->output[emit_data->chan] =
398 ac_build_fract(&ctx->ac, emit_data->args[0], bitsize);
399 }
400
401 static void emit_f2i(const struct lp_build_tgsi_action *action,
402 struct lp_build_tgsi_context *bld_base,
403 struct lp_build_emit_data *emit_data)
404 {
405 struct si_shader_context *ctx = si_shader_context(bld_base);
406 emit_data->output[emit_data->chan] = LLVMBuildFPToSI(ctx->ac.builder,
407 emit_data->args[0], ctx->i32, "");
408 }
409
410 static void emit_f2u(const struct lp_build_tgsi_action *action,
411 struct lp_build_tgsi_context *bld_base,
412 struct lp_build_emit_data *emit_data)
413 {
414 struct si_shader_context *ctx = si_shader_context(bld_base);
415 emit_data->output[emit_data->chan] = LLVMBuildFPToUI(ctx->ac.builder,
416 emit_data->args[0], ctx->i32, "");
417 }
418
419 static void emit_i2f(const struct lp_build_tgsi_action *action,
420 struct lp_build_tgsi_context *bld_base,
421 struct lp_build_emit_data *emit_data)
422 {
423 struct si_shader_context *ctx = si_shader_context(bld_base);
424 emit_data->output[emit_data->chan] = LLVMBuildSIToFP(ctx->ac.builder,
425 emit_data->args[0], ctx->f32, "");
426 }
427
428 static void emit_u2f(const struct lp_build_tgsi_action *action,
429 struct lp_build_tgsi_context *bld_base,
430 struct lp_build_emit_data *emit_data)
431 {
432 struct si_shader_context *ctx = si_shader_context(bld_base);
433 emit_data->output[emit_data->chan] = LLVMBuildUIToFP(ctx->ac.builder,
434 emit_data->args[0], ctx->f32, "");
435 }
436
437 static void
438 build_tgsi_intrinsic_nomem(const struct lp_build_tgsi_action *action,
439 struct lp_build_tgsi_context *bld_base,
440 struct lp_build_emit_data *emit_data)
441 {
442 struct si_shader_context *ctx = si_shader_context(bld_base);
443 emit_data->output[emit_data->chan] =
444 ac_build_intrinsic(&ctx->ac, action->intr_name,
445 emit_data->dst_type, emit_data->args,
446 emit_data->arg_count, AC_FUNC_ATTR_READNONE);
447 }
448
449 static void emit_bfi(const struct lp_build_tgsi_action *action,
450 struct lp_build_tgsi_context *bld_base,
451 struct lp_build_emit_data *emit_data)
452 {
453 struct si_shader_context *ctx = si_shader_context(bld_base);
454 LLVMBuilderRef builder = ctx->ac.builder;
455 LLVMValueRef bfi_args[3];
456 LLVMValueRef bfi_sm5;
457 LLVMValueRef cond;
458
459 // Calculate the bitmask: (((1 << src3) - 1) << src2
460 bfi_args[0] = LLVMBuildShl(builder,
461 LLVMBuildSub(builder,
462 LLVMBuildShl(builder,
463 ctx->i32_1,
464 emit_data->args[3], ""),
465 ctx->i32_1, ""),
466 emit_data->args[2], "");
467
468 bfi_args[1] = LLVMBuildShl(builder, emit_data->args[1],
469 emit_data->args[2], "");
470
471 bfi_args[2] = emit_data->args[0];
472
473 /* Calculate:
474 * (arg0 & arg1) | (~arg0 & arg2) = arg2 ^ (arg0 & (arg1 ^ arg2)
475 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
476 */
477 bfi_sm5 =
478 LLVMBuildXor(builder, bfi_args[2],
479 LLVMBuildAnd(builder, bfi_args[0],
480 LLVMBuildXor(builder, bfi_args[1], bfi_args[2],
481 ""), ""), "");
482
483 /* Since shifts of >= 32 bits are undefined in LLVM IR, the backend
484 * uses the convenient V_BFI lowering for the above, which follows SM5
485 * and disagrees with GLSL semantics when bits (src3) is 32.
486 */
487 cond = LLVMBuildICmp(builder, LLVMIntUGE, emit_data->args[3],
488 LLVMConstInt(ctx->i32, 32, 0), "");
489 emit_data->output[emit_data->chan] =
490 LLVMBuildSelect(builder, cond, emit_data->args[1], bfi_sm5, "");
491 }
492
493 static void emit_bfe(const struct lp_build_tgsi_action *action,
494 struct lp_build_tgsi_context *bld_base,
495 struct lp_build_emit_data *emit_data)
496 {
497 struct si_shader_context *ctx = si_shader_context(bld_base);
498
499 /* FIXME: LLVM 7 returns incorrect result when count is 0.
500 * https://bugs.freedesktop.org/show_bug.cgi?id=107276
501 */
502 LLVMValueRef zero = ctx->i32_0;
503 LLVMValueRef bfe_sm5 =
504 ac_build_bfe(&ctx->ac, emit_data->args[0],
505 emit_data->args[1], emit_data->args[2],
506 emit_data->info->opcode == TGSI_OPCODE_IBFE);
507
508 /* Correct for GLSL semantics. */
509 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntUGE, emit_data->args[2],
510 LLVMConstInt(ctx->i32, 32, 0), "");
511 LLVMValueRef cond2 = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, emit_data->args[2],
512 zero, "");
513 bfe_sm5 = LLVMBuildSelect(ctx->ac.builder, cond, emit_data->args[0], bfe_sm5, "");
514 emit_data->output[emit_data->chan] =
515 LLVMBuildSelect(ctx->ac.builder, cond2, zero, bfe_sm5, "");
516 }
517
518 /* this is ffs in C */
519 static void emit_lsb(const struct lp_build_tgsi_action *action,
520 struct lp_build_tgsi_context *bld_base,
521 struct lp_build_emit_data *emit_data)
522 {
523 struct si_shader_context *ctx = si_shader_context(bld_base);
524
525 emit_data->output[emit_data->chan] = ac_find_lsb(&ctx->ac, emit_data->dst_type, emit_data->args[0]);
526 }
527
528 /* Find the last bit set. */
529 static void emit_umsb(const struct lp_build_tgsi_action *action,
530 struct lp_build_tgsi_context *bld_base,
531 struct lp_build_emit_data *emit_data)
532 {
533 struct si_shader_context *ctx = si_shader_context(bld_base);
534
535 emit_data->output[emit_data->chan] =
536 ac_build_umsb(&ctx->ac, emit_data->args[0], emit_data->dst_type);
537 }
538
539 /* Find the last bit opposite of the sign bit. */
540 static void emit_imsb(const struct lp_build_tgsi_action *action,
541 struct lp_build_tgsi_context *bld_base,
542 struct lp_build_emit_data *emit_data)
543 {
544 struct si_shader_context *ctx = si_shader_context(bld_base);
545 emit_data->output[emit_data->chan] =
546 ac_build_imsb(&ctx->ac, emit_data->args[0],
547 emit_data->dst_type);
548 }
549
550 static void emit_iabs(const struct lp_build_tgsi_action *action,
551 struct lp_build_tgsi_context *bld_base,
552 struct lp_build_emit_data *emit_data)
553 {
554 struct si_shader_context *ctx = si_shader_context(bld_base);
555
556 emit_data->output[emit_data->chan] =
557 ac_build_imax(&ctx->ac, emit_data->args[0],
558 LLVMBuildNeg(ctx->ac.builder, emit_data->args[0], ""));
559 }
560
561 static void emit_minmax_int(const struct lp_build_tgsi_action *action,
562 struct lp_build_tgsi_context *bld_base,
563 struct lp_build_emit_data *emit_data)
564 {
565 struct si_shader_context *ctx = si_shader_context(bld_base);
566 LLVMIntPredicate op;
567
568 switch (emit_data->info->opcode) {
569 default:
570 assert(0);
571 case TGSI_OPCODE_IMAX:
572 case TGSI_OPCODE_I64MAX:
573 op = LLVMIntSGT;
574 break;
575 case TGSI_OPCODE_IMIN:
576 case TGSI_OPCODE_I64MIN:
577 op = LLVMIntSLT;
578 break;
579 case TGSI_OPCODE_UMAX:
580 case TGSI_OPCODE_U64MAX:
581 op = LLVMIntUGT;
582 break;
583 case TGSI_OPCODE_UMIN:
584 case TGSI_OPCODE_U64MIN:
585 op = LLVMIntULT;
586 break;
587 }
588
589 emit_data->output[emit_data->chan] =
590 LLVMBuildSelect(ctx->ac.builder,
591 LLVMBuildICmp(ctx->ac.builder, op, emit_data->args[0],
592 emit_data->args[1], ""),
593 emit_data->args[0],
594 emit_data->args[1], "");
595 }
596
597 static void emit_pk2h(const struct lp_build_tgsi_action *action,
598 struct lp_build_tgsi_context *bld_base,
599 struct lp_build_emit_data *emit_data)
600 {
601 struct si_shader_context *ctx = si_shader_context(bld_base);
602 LLVMValueRef v[] = {
603 lp_build_emit_fetch(bld_base, emit_data->inst, 0, TGSI_CHAN_X),
604 lp_build_emit_fetch(bld_base, emit_data->inst, 0, TGSI_CHAN_Y),
605 };
606
607
608 /* From the GLSL 4.50 spec:
609 * "The rounding mode cannot be set and is undefined."
610 *
611 * v_cvt_pkrtz_f16 rounds to zero, but it's fastest.
612 */
613 emit_data->output[emit_data->chan] =
614 LLVMBuildBitCast(ctx->ac.builder, ac_build_cvt_pkrtz_f16(&ctx->ac, v),
615 ctx->i32, "");
616 }
617
618 static void emit_up2h(const struct lp_build_tgsi_action *action,
619 struct lp_build_tgsi_context *bld_base,
620 struct lp_build_emit_data *emit_data)
621 {
622 struct si_shader_context *ctx = si_shader_context(bld_base);
623 LLVMTypeRef i16;
624 LLVMValueRef const16, input, val;
625 unsigned i;
626
627 i16 = LLVMInt16TypeInContext(ctx->ac.context);
628 const16 = LLVMConstInt(ctx->i32, 16, 0);
629 input = lp_build_emit_fetch(bld_base, emit_data->inst, 0, TGSI_CHAN_X);
630
631 for (i = 0; i < 2; i++) {
632 val = i == 1 ? LLVMBuildLShr(ctx->ac.builder, input, const16, "") : input;
633 val = LLVMBuildTrunc(ctx->ac.builder, val, i16, "");
634 val = ac_to_float(&ctx->ac, val);
635 emit_data->output[i] = LLVMBuildFPExt(ctx->ac.builder, val, ctx->f32, "");
636 }
637 }
638
639 static void emit_fdiv(const struct lp_build_tgsi_action *action,
640 struct lp_build_tgsi_context *bld_base,
641 struct lp_build_emit_data *emit_data)
642 {
643 struct si_shader_context *ctx = si_shader_context(bld_base);
644
645 emit_data->output[emit_data->chan] =
646 ac_build_fdiv(&ctx->ac, emit_data->args[0], emit_data->args[1]);
647 }
648
649 /* 1/sqrt is translated to rsq for f32 if fp32 denormals are not enabled in
650 * the target machine. f64 needs global unsafe math flags to get rsq. */
651 static void emit_rsq(const struct lp_build_tgsi_action *action,
652 struct lp_build_tgsi_context *bld_base,
653 struct lp_build_emit_data *emit_data)
654 {
655 struct si_shader_context *ctx = si_shader_context(bld_base);
656
657 LLVMValueRef sqrt =
658 ac_build_intrinsic(&ctx->ac, "llvm.sqrt.f32", ctx->f32,
659 &emit_data->args[0], 1, AC_FUNC_ATTR_READNONE);
660
661 emit_data->output[emit_data->chan] =
662 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1, sqrt);
663 }
664
665 static void dfracexp_emit(const struct lp_build_tgsi_action *action,
666 struct lp_build_tgsi_context *bld_base,
667 struct lp_build_emit_data *emit_data)
668 {
669 struct si_shader_context *ctx = si_shader_context(bld_base);
670 LLVMValueRef in = lp_build_emit_fetch(bld_base, emit_data->inst, 0, TGSI_CHAN_X);
671
672 emit_data->output[emit_data->chan] =
673 ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.frexp.mant.f64",
674 ctx->ac.f64, &in, 1, 0);
675 emit_data->output1[emit_data->chan] =
676 ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.frexp.exp.i32.f64",
677 ctx->ac.i32, &in, 1, 0);
678 }
679
680 void si_shader_context_init_alu(struct lp_build_tgsi_context *bld_base)
681 {
682 lp_set_default_actions(bld_base);
683
684 bld_base->op_actions[TGSI_OPCODE_AND].emit = emit_and;
685 bld_base->op_actions[TGSI_OPCODE_ARL].emit = emit_arl;
686 bld_base->op_actions[TGSI_OPCODE_BFI].emit = emit_bfi;
687 bld_base->op_actions[TGSI_OPCODE_BREV].emit = build_tgsi_intrinsic_nomem;
688 bld_base->op_actions[TGSI_OPCODE_BREV].intr_name = "llvm.bitreverse.i32";
689 bld_base->op_actions[TGSI_OPCODE_CEIL].emit = build_tgsi_intrinsic_nomem;
690 bld_base->op_actions[TGSI_OPCODE_CEIL].intr_name = "llvm.ceil.f32";
691 bld_base->op_actions[TGSI_OPCODE_CMP].emit = emit_cmp;
692 bld_base->op_actions[TGSI_OPCODE_COS].emit = build_tgsi_intrinsic_nomem;
693 bld_base->op_actions[TGSI_OPCODE_COS].intr_name = "llvm.cos.f32";
694 bld_base->op_actions[TGSI_OPCODE_DABS].emit = build_tgsi_intrinsic_nomem;
695 bld_base->op_actions[TGSI_OPCODE_DABS].intr_name = "llvm.fabs.f64";
696 bld_base->op_actions[TGSI_OPCODE_DCEIL].emit = build_tgsi_intrinsic_nomem;
697 bld_base->op_actions[TGSI_OPCODE_DCEIL].intr_name = "llvm.ceil.f64";
698 bld_base->op_actions[TGSI_OPCODE_DFLR].emit = build_tgsi_intrinsic_nomem;
699 bld_base->op_actions[TGSI_OPCODE_DFLR].intr_name = "llvm.floor.f64";
700 bld_base->op_actions[TGSI_OPCODE_DFMA].emit = build_tgsi_intrinsic_nomem;
701 bld_base->op_actions[TGSI_OPCODE_DFMA].intr_name = "llvm.fma.f64";
702 bld_base->op_actions[TGSI_OPCODE_DFRAC].emit = emit_frac;
703 bld_base->op_actions[TGSI_OPCODE_DIV].emit = emit_fdiv;
704 bld_base->op_actions[TGSI_OPCODE_DNEG].emit = emit_dneg;
705 bld_base->op_actions[TGSI_OPCODE_DROUND].emit = build_tgsi_intrinsic_nomem;
706 bld_base->op_actions[TGSI_OPCODE_DROUND].intr_name = "llvm.rint.f64";
707 bld_base->op_actions[TGSI_OPCODE_DSEQ].emit = emit_dcmp;
708 bld_base->op_actions[TGSI_OPCODE_DSGE].emit = emit_dcmp;
709 bld_base->op_actions[TGSI_OPCODE_DSLT].emit = emit_dcmp;
710 bld_base->op_actions[TGSI_OPCODE_DSNE].emit = emit_dcmp;
711 bld_base->op_actions[TGSI_OPCODE_DSSG].emit = emit_ssg;
712 bld_base->op_actions[TGSI_OPCODE_DRSQ].emit = build_tgsi_intrinsic_nomem;
713 bld_base->op_actions[TGSI_OPCODE_DRSQ].intr_name = "llvm.amdgcn.rsq.f64";
714 bld_base->op_actions[TGSI_OPCODE_DSQRT].emit = build_tgsi_intrinsic_nomem;
715 bld_base->op_actions[TGSI_OPCODE_DSQRT].intr_name = "llvm.sqrt.f64";
716 bld_base->op_actions[TGSI_OPCODE_DTRUNC].emit = build_tgsi_intrinsic_nomem;
717 bld_base->op_actions[TGSI_OPCODE_DTRUNC].intr_name = "llvm.trunc.f64";
718 bld_base->op_actions[TGSI_OPCODE_DFRACEXP].emit = dfracexp_emit;
719 bld_base->op_actions[TGSI_OPCODE_DLDEXP].emit = build_tgsi_intrinsic_nomem;
720 bld_base->op_actions[TGSI_OPCODE_DLDEXP].intr_name = "llvm.amdgcn.ldexp.f64";
721 bld_base->op_actions[TGSI_OPCODE_EX2].emit = build_tgsi_intrinsic_nomem;
722 bld_base->op_actions[TGSI_OPCODE_EX2].intr_name = "llvm.exp2.f32";
723 bld_base->op_actions[TGSI_OPCODE_FLR].emit = build_tgsi_intrinsic_nomem;
724 bld_base->op_actions[TGSI_OPCODE_FLR].intr_name = "llvm.floor.f32";
725 bld_base->op_actions[TGSI_OPCODE_FMA].emit =
726 bld_base->op_actions[TGSI_OPCODE_MAD].emit;
727 bld_base->op_actions[TGSI_OPCODE_FRC].emit = emit_frac;
728 bld_base->op_actions[TGSI_OPCODE_F2I].emit = emit_f2i;
729 bld_base->op_actions[TGSI_OPCODE_F2U].emit = emit_f2u;
730 bld_base->op_actions[TGSI_OPCODE_FSEQ].emit = emit_fcmp;
731 bld_base->op_actions[TGSI_OPCODE_FSGE].emit = emit_fcmp;
732 bld_base->op_actions[TGSI_OPCODE_FSLT].emit = emit_fcmp;
733 bld_base->op_actions[TGSI_OPCODE_FSNE].emit = emit_fcmp;
734 bld_base->op_actions[TGSI_OPCODE_IABS].emit = emit_iabs;
735 bld_base->op_actions[TGSI_OPCODE_IBFE].emit = emit_bfe;
736 bld_base->op_actions[TGSI_OPCODE_IDIV].emit = emit_idiv;
737 bld_base->op_actions[TGSI_OPCODE_IMAX].emit = emit_minmax_int;
738 bld_base->op_actions[TGSI_OPCODE_IMIN].emit = emit_minmax_int;
739 bld_base->op_actions[TGSI_OPCODE_IMSB].emit = emit_imsb;
740 bld_base->op_actions[TGSI_OPCODE_INEG].emit = emit_ineg;
741 bld_base->op_actions[TGSI_OPCODE_ISHR].emit = emit_ishr;
742 bld_base->op_actions[TGSI_OPCODE_ISGE].emit = emit_icmp;
743 bld_base->op_actions[TGSI_OPCODE_ISLT].emit = emit_icmp;
744 bld_base->op_actions[TGSI_OPCODE_ISSG].emit = emit_ssg;
745 bld_base->op_actions[TGSI_OPCODE_I2F].emit = emit_i2f;
746 bld_base->op_actions[TGSI_OPCODE_KILL_IF].emit = kil_emit;
747 bld_base->op_actions[TGSI_OPCODE_KILL].emit = kil_emit;
748 bld_base->op_actions[TGSI_OPCODE_LDEXP].emit = build_tgsi_intrinsic_nomem;
749 bld_base->op_actions[TGSI_OPCODE_LDEXP].intr_name = "llvm.amdgcn.ldexp.f32";
750 bld_base->op_actions[TGSI_OPCODE_LSB].emit = emit_lsb;
751 bld_base->op_actions[TGSI_OPCODE_LG2].emit = build_tgsi_intrinsic_nomem;
752 bld_base->op_actions[TGSI_OPCODE_LG2].intr_name = "llvm.log2.f32";
753 bld_base->op_actions[TGSI_OPCODE_MAX].emit = build_tgsi_intrinsic_nomem;
754 bld_base->op_actions[TGSI_OPCODE_MAX].intr_name = "llvm.maxnum.f32";
755 bld_base->op_actions[TGSI_OPCODE_MIN].emit = build_tgsi_intrinsic_nomem;
756 bld_base->op_actions[TGSI_OPCODE_MIN].intr_name = "llvm.minnum.f32";
757 bld_base->op_actions[TGSI_OPCODE_MOD].emit = emit_mod;
758 bld_base->op_actions[TGSI_OPCODE_UMSB].emit = emit_umsb;
759 bld_base->op_actions[TGSI_OPCODE_NOT].emit = emit_not;
760 bld_base->op_actions[TGSI_OPCODE_OR].emit = emit_or;
761 bld_base->op_actions[TGSI_OPCODE_PK2H].emit = emit_pk2h;
762 bld_base->op_actions[TGSI_OPCODE_POPC].emit = build_tgsi_intrinsic_nomem;
763 bld_base->op_actions[TGSI_OPCODE_POPC].intr_name = "llvm.ctpop.i32";
764 bld_base->op_actions[TGSI_OPCODE_POW].emit = build_tgsi_intrinsic_nomem;
765 bld_base->op_actions[TGSI_OPCODE_POW].intr_name = "llvm.pow.f32";
766 bld_base->op_actions[TGSI_OPCODE_ROUND].emit = build_tgsi_intrinsic_nomem;
767 bld_base->op_actions[TGSI_OPCODE_ROUND].intr_name = "llvm.rint.f32";
768 bld_base->op_actions[TGSI_OPCODE_RSQ].emit = emit_rsq;
769 bld_base->op_actions[TGSI_OPCODE_SGE].emit = emit_set_cond;
770 bld_base->op_actions[TGSI_OPCODE_SEQ].emit = emit_set_cond;
771 bld_base->op_actions[TGSI_OPCODE_SHL].emit = emit_shl;
772 bld_base->op_actions[TGSI_OPCODE_SLE].emit = emit_set_cond;
773 bld_base->op_actions[TGSI_OPCODE_SLT].emit = emit_set_cond;
774 bld_base->op_actions[TGSI_OPCODE_SNE].emit = emit_set_cond;
775 bld_base->op_actions[TGSI_OPCODE_SGT].emit = emit_set_cond;
776 bld_base->op_actions[TGSI_OPCODE_SIN].emit = build_tgsi_intrinsic_nomem;
777 bld_base->op_actions[TGSI_OPCODE_SIN].intr_name = "llvm.sin.f32";
778 bld_base->op_actions[TGSI_OPCODE_SQRT].emit = build_tgsi_intrinsic_nomem;
779 bld_base->op_actions[TGSI_OPCODE_SQRT].intr_name = "llvm.sqrt.f32";
780 bld_base->op_actions[TGSI_OPCODE_SSG].emit = emit_ssg;
781 bld_base->op_actions[TGSI_OPCODE_TRUNC].emit = build_tgsi_intrinsic_nomem;
782 bld_base->op_actions[TGSI_OPCODE_TRUNC].intr_name = "llvm.trunc.f32";
783 bld_base->op_actions[TGSI_OPCODE_UADD].emit = emit_uadd;
784 bld_base->op_actions[TGSI_OPCODE_UBFE].emit = emit_bfe;
785 bld_base->op_actions[TGSI_OPCODE_UDIV].emit = emit_udiv;
786 bld_base->op_actions[TGSI_OPCODE_UMAX].emit = emit_minmax_int;
787 bld_base->op_actions[TGSI_OPCODE_UMIN].emit = emit_minmax_int;
788 bld_base->op_actions[TGSI_OPCODE_UMOD].emit = emit_umod;
789 bld_base->op_actions[TGSI_OPCODE_USEQ].emit = emit_icmp;
790 bld_base->op_actions[TGSI_OPCODE_USGE].emit = emit_icmp;
791 bld_base->op_actions[TGSI_OPCODE_USHR].emit = emit_ushr;
792 bld_base->op_actions[TGSI_OPCODE_USLT].emit = emit_icmp;
793 bld_base->op_actions[TGSI_OPCODE_USNE].emit = emit_icmp;
794 bld_base->op_actions[TGSI_OPCODE_U2F].emit = emit_u2f;
795 bld_base->op_actions[TGSI_OPCODE_XOR].emit = emit_xor;
796 bld_base->op_actions[TGSI_OPCODE_UCMP].emit = emit_ucmp;
797 bld_base->op_actions[TGSI_OPCODE_UP2H].emit = emit_up2h;
798
799 bld_base->op_actions[TGSI_OPCODE_I64MAX].emit = emit_minmax_int;
800 bld_base->op_actions[TGSI_OPCODE_I64MIN].emit = emit_minmax_int;
801 bld_base->op_actions[TGSI_OPCODE_U64MAX].emit = emit_minmax_int;
802 bld_base->op_actions[TGSI_OPCODE_U64MIN].emit = emit_minmax_int;
803 bld_base->op_actions[TGSI_OPCODE_I64ABS].emit = emit_iabs;
804 bld_base->op_actions[TGSI_OPCODE_I64SSG].emit = emit_ssg;
805 bld_base->op_actions[TGSI_OPCODE_I64NEG].emit = emit_ineg;
806
807 bld_base->op_actions[TGSI_OPCODE_U64SEQ].emit = emit_icmp;
808 bld_base->op_actions[TGSI_OPCODE_U64SNE].emit = emit_icmp;
809 bld_base->op_actions[TGSI_OPCODE_U64SGE].emit = emit_icmp;
810 bld_base->op_actions[TGSI_OPCODE_U64SLT].emit = emit_icmp;
811 bld_base->op_actions[TGSI_OPCODE_I64SGE].emit = emit_icmp;
812 bld_base->op_actions[TGSI_OPCODE_I64SLT].emit = emit_icmp;
813
814 bld_base->op_actions[TGSI_OPCODE_U64ADD].emit = emit_uadd;
815 bld_base->op_actions[TGSI_OPCODE_U64SHL].emit = emit_shl;
816 bld_base->op_actions[TGSI_OPCODE_U64SHR].emit = emit_ushr;
817 bld_base->op_actions[TGSI_OPCODE_I64SHR].emit = emit_ishr;
818
819 bld_base->op_actions[TGSI_OPCODE_U64MOD].emit = emit_umod;
820 bld_base->op_actions[TGSI_OPCODE_I64MOD].emit = emit_mod;
821 bld_base->op_actions[TGSI_OPCODE_U64DIV].emit = emit_udiv;
822 bld_base->op_actions[TGSI_OPCODE_I64DIV].emit = emit_idiv;
823 }