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amd: remove support for LLVM 5.0
[mesa.git] / src / gallium / drivers / radeonsi / si_shader_tgsi_alu.c
1 /*
2 * Copyright 2016 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE.
23 */
24
25 #include "si_shader_internal.h"
26 #include "ac_llvm_util.h"
27
28 static void kill_if_fetch_args(struct lp_build_tgsi_context *bld_base,
29 struct lp_build_emit_data *emit_data)
30 {
31 const struct tgsi_full_instruction *inst = emit_data->inst;
32 struct si_shader_context *ctx = si_shader_context(bld_base);
33 LLVMBuilderRef builder = ctx->ac.builder;
34 unsigned i;
35 LLVMValueRef conds[TGSI_NUM_CHANNELS];
36
37 for (i = 0; i < TGSI_NUM_CHANNELS; i++) {
38 LLVMValueRef value = lp_build_emit_fetch(bld_base, inst, 0, i);
39 conds[i] = LLVMBuildFCmp(builder, LLVMRealOGE, value,
40 ctx->ac.f32_0, "");
41 }
42
43 /* And the conditions together */
44 for (i = TGSI_NUM_CHANNELS - 1; i > 0; i--) {
45 conds[i - 1] = LLVMBuildAnd(builder, conds[i], conds[i - 1], "");
46 }
47
48 emit_data->dst_type = ctx->voidt;
49 emit_data->arg_count = 1;
50 emit_data->args[0] = conds[0];
51 }
52
53 void si_llvm_emit_kill(struct ac_shader_abi *abi, LLVMValueRef visible)
54 {
55 struct si_shader_context *ctx = si_shader_context_from_abi(abi);
56 LLVMBuilderRef builder = ctx->ac.builder;
57
58 if (ctx->shader->selector->force_correct_derivs_after_kill) {
59 /* Kill immediately while maintaining WQM. */
60 ac_build_kill_if_false(&ctx->ac,
61 ac_build_wqm_vote(&ctx->ac, visible));
62
63 LLVMValueRef mask = LLVMBuildLoad(builder, ctx->postponed_kill, "");
64 mask = LLVMBuildAnd(builder, mask, visible, "");
65 LLVMBuildStore(builder, mask, ctx->postponed_kill);
66 return;
67 }
68
69 ac_build_kill_if_false(&ctx->ac, visible);
70 }
71
72 static void kil_emit(const struct lp_build_tgsi_action *action,
73 struct lp_build_tgsi_context *bld_base,
74 struct lp_build_emit_data *emit_data)
75 {
76 struct si_shader_context *ctx = si_shader_context(bld_base);
77 LLVMValueRef visible;
78
79 if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_KILL_IF) {
80 visible = emit_data->args[0];
81 } else {
82 assert(emit_data->inst->Instruction.Opcode == TGSI_OPCODE_KILL);
83 visible = LLVMConstInt(ctx->i1, false, 0);
84 }
85
86 si_llvm_emit_kill(&ctx->abi, visible);
87 }
88
89 static void emit_icmp(const struct lp_build_tgsi_action *action,
90 struct lp_build_tgsi_context *bld_base,
91 struct lp_build_emit_data *emit_data)
92 {
93 unsigned pred;
94 struct si_shader_context *ctx = si_shader_context(bld_base);
95
96 switch (emit_data->inst->Instruction.Opcode) {
97 case TGSI_OPCODE_USEQ:
98 case TGSI_OPCODE_U64SEQ: pred = LLVMIntEQ; break;
99 case TGSI_OPCODE_USNE:
100 case TGSI_OPCODE_U64SNE: pred = LLVMIntNE; break;
101 case TGSI_OPCODE_USGE:
102 case TGSI_OPCODE_U64SGE: pred = LLVMIntUGE; break;
103 case TGSI_OPCODE_USLT:
104 case TGSI_OPCODE_U64SLT: pred = LLVMIntULT; break;
105 case TGSI_OPCODE_ISGE:
106 case TGSI_OPCODE_I64SGE: pred = LLVMIntSGE; break;
107 case TGSI_OPCODE_ISLT:
108 case TGSI_OPCODE_I64SLT: pred = LLVMIntSLT; break;
109 default:
110 assert(!"unknown instruction");
111 pred = 0;
112 break;
113 }
114
115 LLVMValueRef v = LLVMBuildICmp(ctx->ac.builder, pred,
116 emit_data->args[0], emit_data->args[1],"");
117
118 v = LLVMBuildSExtOrBitCast(ctx->ac.builder, v, ctx->i32, "");
119
120 emit_data->output[emit_data->chan] = v;
121 }
122
123 static void emit_ucmp(const struct lp_build_tgsi_action *action,
124 struct lp_build_tgsi_context *bld_base,
125 struct lp_build_emit_data *emit_data)
126 {
127 struct si_shader_context *ctx = si_shader_context(bld_base);
128 LLVMValueRef arg0 = ac_to_integer(&ctx->ac, emit_data->args[0]);
129
130 LLVMValueRef v = LLVMBuildICmp(ctx->ac.builder, LLVMIntNE, arg0,
131 ctx->i32_0, "");
132
133 emit_data->output[emit_data->chan] =
134 LLVMBuildSelect(ctx->ac.builder, v, emit_data->args[1], emit_data->args[2], "");
135 }
136
137 static void emit_cmp(const struct lp_build_tgsi_action *action,
138 struct lp_build_tgsi_context *bld_base,
139 struct lp_build_emit_data *emit_data)
140 {
141 struct si_shader_context *ctx = si_shader_context(bld_base);
142 LLVMValueRef cond, *args = emit_data->args;
143
144 cond = LLVMBuildFCmp(ctx->ac.builder, LLVMRealOLT, args[0],
145 ctx->ac.f32_0, "");
146
147 emit_data->output[emit_data->chan] =
148 LLVMBuildSelect(ctx->ac.builder, cond, args[1], args[2], "");
149 }
150
151 static void emit_set_cond(const struct lp_build_tgsi_action *action,
152 struct lp_build_tgsi_context *bld_base,
153 struct lp_build_emit_data *emit_data)
154 {
155 struct si_shader_context *ctx = si_shader_context(bld_base);
156 LLVMRealPredicate pred;
157 LLVMValueRef cond;
158
159 /* Use ordered for everything but NE (which is usual for
160 * float comparisons)
161 */
162 switch (emit_data->inst->Instruction.Opcode) {
163 case TGSI_OPCODE_SGE: pred = LLVMRealOGE; break;
164 case TGSI_OPCODE_SEQ: pred = LLVMRealOEQ; break;
165 case TGSI_OPCODE_SLE: pred = LLVMRealOLE; break;
166 case TGSI_OPCODE_SLT: pred = LLVMRealOLT; break;
167 case TGSI_OPCODE_SNE: pred = LLVMRealUNE; break;
168 case TGSI_OPCODE_SGT: pred = LLVMRealOGT; break;
169 default: assert(!"unknown instruction"); pred = 0; break;
170 }
171
172 cond = LLVMBuildFCmp(ctx->ac.builder,
173 pred, emit_data->args[0], emit_data->args[1], "");
174
175 emit_data->output[emit_data->chan] = LLVMBuildSelect(ctx->ac.builder,
176 cond, ctx->ac.f32_1, ctx->ac.f32_0, "");
177 }
178
179 static void emit_fcmp(const struct lp_build_tgsi_action *action,
180 struct lp_build_tgsi_context *bld_base,
181 struct lp_build_emit_data *emit_data)
182 {
183 struct si_shader_context *ctx = si_shader_context(bld_base);
184 LLVMRealPredicate pred;
185
186 /* Use ordered for everything but NE (which is usual for
187 * float comparisons)
188 */
189 switch (emit_data->inst->Instruction.Opcode) {
190 case TGSI_OPCODE_FSEQ: pred = LLVMRealOEQ; break;
191 case TGSI_OPCODE_FSGE: pred = LLVMRealOGE; break;
192 case TGSI_OPCODE_FSLT: pred = LLVMRealOLT; break;
193 case TGSI_OPCODE_FSNE: pred = LLVMRealUNE; break;
194 default: assert(!"unknown instruction"); pred = 0; break;
195 }
196
197 LLVMValueRef v = LLVMBuildFCmp(ctx->ac.builder, pred,
198 emit_data->args[0], emit_data->args[1],"");
199
200 v = LLVMBuildSExtOrBitCast(ctx->ac.builder, v, ctx->i32, "");
201
202 emit_data->output[emit_data->chan] = v;
203 }
204
205 static void emit_dcmp(const struct lp_build_tgsi_action *action,
206 struct lp_build_tgsi_context *bld_base,
207 struct lp_build_emit_data *emit_data)
208 {
209 struct si_shader_context *ctx = si_shader_context(bld_base);
210 LLVMRealPredicate pred;
211
212 /* Use ordered for everything but NE (which is usual for
213 * float comparisons)
214 */
215 switch (emit_data->inst->Instruction.Opcode) {
216 case TGSI_OPCODE_DSEQ: pred = LLVMRealOEQ; break;
217 case TGSI_OPCODE_DSGE: pred = LLVMRealOGE; break;
218 case TGSI_OPCODE_DSLT: pred = LLVMRealOLT; break;
219 case TGSI_OPCODE_DSNE: pred = LLVMRealUNE; break;
220 default: assert(!"unknown instruction"); pred = 0; break;
221 }
222
223 LLVMValueRef v = LLVMBuildFCmp(ctx->ac.builder, pred,
224 emit_data->args[0], emit_data->args[1],"");
225
226 v = LLVMBuildSExtOrBitCast(ctx->ac.builder, v, ctx->i32, "");
227
228 emit_data->output[emit_data->chan] = v;
229 }
230
231 static void emit_not(const struct lp_build_tgsi_action *action,
232 struct lp_build_tgsi_context *bld_base,
233 struct lp_build_emit_data *emit_data)
234 {
235 struct si_shader_context *ctx = si_shader_context(bld_base);
236 LLVMValueRef v = ac_to_integer(&ctx->ac, emit_data->args[0]);
237 emit_data->output[emit_data->chan] = LLVMBuildNot(ctx->ac.builder, v, "");
238 }
239
240 static void emit_arl(const struct lp_build_tgsi_action *action,
241 struct lp_build_tgsi_context *bld_base,
242 struct lp_build_emit_data *emit_data)
243 {
244 struct si_shader_context *ctx = si_shader_context(bld_base);
245 LLVMValueRef floor_index =
246 ac_build_intrinsic(&ctx->ac, "llvm.floor.f32", ctx->f32,
247 &emit_data->args[0], 1, AC_FUNC_ATTR_READNONE);
248 emit_data->output[emit_data->chan] = LLVMBuildFPToSI(ctx->ac.builder,
249 floor_index, ctx->i32, "");
250 }
251
252 static void emit_and(const struct lp_build_tgsi_action *action,
253 struct lp_build_tgsi_context *bld_base,
254 struct lp_build_emit_data *emit_data)
255 {
256 struct si_shader_context *ctx = si_shader_context(bld_base);
257 emit_data->output[emit_data->chan] = LLVMBuildAnd(ctx->ac.builder,
258 emit_data->args[0], emit_data->args[1], "");
259 }
260
261 static void emit_or(const struct lp_build_tgsi_action *action,
262 struct lp_build_tgsi_context *bld_base,
263 struct lp_build_emit_data *emit_data)
264 {
265 struct si_shader_context *ctx = si_shader_context(bld_base);
266 emit_data->output[emit_data->chan] = LLVMBuildOr(ctx->ac.builder,
267 emit_data->args[0], emit_data->args[1], "");
268 }
269
270 static void emit_uadd(const struct lp_build_tgsi_action *action,
271 struct lp_build_tgsi_context *bld_base,
272 struct lp_build_emit_data *emit_data)
273 {
274 struct si_shader_context *ctx = si_shader_context(bld_base);
275 emit_data->output[emit_data->chan] = LLVMBuildAdd(ctx->ac.builder,
276 emit_data->args[0], emit_data->args[1], "");
277 }
278
279 static void emit_udiv(const struct lp_build_tgsi_action *action,
280 struct lp_build_tgsi_context *bld_base,
281 struct lp_build_emit_data *emit_data)
282 {
283 struct si_shader_context *ctx = si_shader_context(bld_base);
284 emit_data->output[emit_data->chan] = LLVMBuildUDiv(ctx->ac.builder,
285 emit_data->args[0], emit_data->args[1], "");
286 }
287
288 static void emit_idiv(const struct lp_build_tgsi_action *action,
289 struct lp_build_tgsi_context *bld_base,
290 struct lp_build_emit_data *emit_data)
291 {
292 struct si_shader_context *ctx = si_shader_context(bld_base);
293 emit_data->output[emit_data->chan] = LLVMBuildSDiv(ctx->ac.builder,
294 emit_data->args[0], emit_data->args[1], "");
295 }
296
297 static void emit_mod(const struct lp_build_tgsi_action *action,
298 struct lp_build_tgsi_context *bld_base,
299 struct lp_build_emit_data *emit_data)
300 {
301 struct si_shader_context *ctx = si_shader_context(bld_base);
302 emit_data->output[emit_data->chan] = LLVMBuildSRem(ctx->ac.builder,
303 emit_data->args[0], emit_data->args[1], "");
304 }
305
306 static void emit_umod(const struct lp_build_tgsi_action *action,
307 struct lp_build_tgsi_context *bld_base,
308 struct lp_build_emit_data *emit_data)
309 {
310 struct si_shader_context *ctx = si_shader_context(bld_base);
311 emit_data->output[emit_data->chan] = LLVMBuildURem(ctx->ac.builder,
312 emit_data->args[0], emit_data->args[1], "");
313 }
314
315 static void emit_shl(const struct lp_build_tgsi_action *action,
316 struct lp_build_tgsi_context *bld_base,
317 struct lp_build_emit_data *emit_data)
318 {
319 struct si_shader_context *ctx = si_shader_context(bld_base);
320 emit_data->output[emit_data->chan] = LLVMBuildShl(ctx->ac.builder,
321 emit_data->args[0], emit_data->args[1], "");
322 }
323
324 static void emit_ushr(const struct lp_build_tgsi_action *action,
325 struct lp_build_tgsi_context *bld_base,
326 struct lp_build_emit_data *emit_data)
327 {
328 struct si_shader_context *ctx = si_shader_context(bld_base);
329 emit_data->output[emit_data->chan] = LLVMBuildLShr(ctx->ac.builder,
330 emit_data->args[0], emit_data->args[1], "");
331 }
332 static void emit_ishr(const struct lp_build_tgsi_action *action,
333 struct lp_build_tgsi_context *bld_base,
334 struct lp_build_emit_data *emit_data)
335 {
336 struct si_shader_context *ctx = si_shader_context(bld_base);
337 emit_data->output[emit_data->chan] = LLVMBuildAShr(ctx->ac.builder,
338 emit_data->args[0], emit_data->args[1], "");
339 }
340
341 static void emit_xor(const struct lp_build_tgsi_action *action,
342 struct lp_build_tgsi_context *bld_base,
343 struct lp_build_emit_data *emit_data)
344 {
345 struct si_shader_context *ctx = si_shader_context(bld_base);
346 emit_data->output[emit_data->chan] = LLVMBuildXor(ctx->ac.builder,
347 emit_data->args[0], emit_data->args[1], "");
348 }
349
350 static void emit_ssg(const struct lp_build_tgsi_action *action,
351 struct lp_build_tgsi_context *bld_base,
352 struct lp_build_emit_data *emit_data)
353 {
354 struct si_shader_context *ctx = si_shader_context(bld_base);
355
356 LLVMValueRef val;
357
358 if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_I64SSG) {
359 val = ac_build_isign(&ctx->ac, emit_data->args[0], 64);
360 } else if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_ISSG) {
361 val = ac_build_isign(&ctx->ac, emit_data->args[0], 32);
362 } else if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_DSSG) {
363 val = ac_build_fsign(&ctx->ac, emit_data->args[0], 64);
364 } else {
365 val = ac_build_fsign(&ctx->ac, emit_data->args[0], 32);
366 }
367
368 emit_data->output[emit_data->chan] = val;
369 }
370
371 static void emit_ineg(const struct lp_build_tgsi_action *action,
372 struct lp_build_tgsi_context *bld_base,
373 struct lp_build_emit_data *emit_data)
374 {
375 struct si_shader_context *ctx = si_shader_context(bld_base);
376 emit_data->output[emit_data->chan] = LLVMBuildNeg(ctx->ac.builder,
377 emit_data->args[0], "");
378 }
379
380 static void emit_dneg(const struct lp_build_tgsi_action *action,
381 struct lp_build_tgsi_context *bld_base,
382 struct lp_build_emit_data *emit_data)
383 {
384 struct si_shader_context *ctx = si_shader_context(bld_base);
385 emit_data->output[emit_data->chan] = LLVMBuildFNeg(ctx->ac.builder,
386 emit_data->args[0], "");
387 }
388
389 static void emit_frac(const struct lp_build_tgsi_action *action,
390 struct lp_build_tgsi_context *bld_base,
391 struct lp_build_emit_data *emit_data)
392 {
393 struct si_shader_context *ctx = si_shader_context(bld_base);
394 unsigned bitsize;
395
396 if (emit_data->info->opcode == TGSI_OPCODE_FRC)
397 bitsize = 32;
398 else if (emit_data->info->opcode == TGSI_OPCODE_DFRAC)
399 bitsize = 64;
400 else {
401 assert(0);
402 return;
403 }
404
405 emit_data->output[emit_data->chan] =
406 ac_build_fract(&ctx->ac, emit_data->args[0], bitsize);
407 }
408
409 static void emit_f2i(const struct lp_build_tgsi_action *action,
410 struct lp_build_tgsi_context *bld_base,
411 struct lp_build_emit_data *emit_data)
412 {
413 struct si_shader_context *ctx = si_shader_context(bld_base);
414 emit_data->output[emit_data->chan] = LLVMBuildFPToSI(ctx->ac.builder,
415 emit_data->args[0], ctx->i32, "");
416 }
417
418 static void emit_f2u(const struct lp_build_tgsi_action *action,
419 struct lp_build_tgsi_context *bld_base,
420 struct lp_build_emit_data *emit_data)
421 {
422 struct si_shader_context *ctx = si_shader_context(bld_base);
423 emit_data->output[emit_data->chan] = LLVMBuildFPToUI(ctx->ac.builder,
424 emit_data->args[0], ctx->i32, "");
425 }
426
427 static void emit_i2f(const struct lp_build_tgsi_action *action,
428 struct lp_build_tgsi_context *bld_base,
429 struct lp_build_emit_data *emit_data)
430 {
431 struct si_shader_context *ctx = si_shader_context(bld_base);
432 emit_data->output[emit_data->chan] = LLVMBuildSIToFP(ctx->ac.builder,
433 emit_data->args[0], ctx->f32, "");
434 }
435
436 static void emit_u2f(const struct lp_build_tgsi_action *action,
437 struct lp_build_tgsi_context *bld_base,
438 struct lp_build_emit_data *emit_data)
439 {
440 struct si_shader_context *ctx = si_shader_context(bld_base);
441 emit_data->output[emit_data->chan] = LLVMBuildUIToFP(ctx->ac.builder,
442 emit_data->args[0], ctx->f32, "");
443 }
444
445 static void
446 build_tgsi_intrinsic_nomem(const struct lp_build_tgsi_action *action,
447 struct lp_build_tgsi_context *bld_base,
448 struct lp_build_emit_data *emit_data)
449 {
450 struct si_shader_context *ctx = si_shader_context(bld_base);
451 emit_data->output[emit_data->chan] =
452 ac_build_intrinsic(&ctx->ac, action->intr_name,
453 emit_data->dst_type, emit_data->args,
454 emit_data->arg_count, AC_FUNC_ATTR_READNONE);
455 }
456
457 static void emit_bfi(const struct lp_build_tgsi_action *action,
458 struct lp_build_tgsi_context *bld_base,
459 struct lp_build_emit_data *emit_data)
460 {
461 struct si_shader_context *ctx = si_shader_context(bld_base);
462 LLVMBuilderRef builder = ctx->ac.builder;
463 LLVMValueRef bfi_args[3];
464 LLVMValueRef bfi_sm5;
465 LLVMValueRef cond;
466
467 // Calculate the bitmask: (((1 << src3) - 1) << src2
468 bfi_args[0] = LLVMBuildShl(builder,
469 LLVMBuildSub(builder,
470 LLVMBuildShl(builder,
471 ctx->i32_1,
472 emit_data->args[3], ""),
473 ctx->i32_1, ""),
474 emit_data->args[2], "");
475
476 bfi_args[1] = LLVMBuildShl(builder, emit_data->args[1],
477 emit_data->args[2], "");
478
479 bfi_args[2] = emit_data->args[0];
480
481 /* Calculate:
482 * (arg0 & arg1) | (~arg0 & arg2) = arg2 ^ (arg0 & (arg1 ^ arg2)
483 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
484 */
485 bfi_sm5 =
486 LLVMBuildXor(builder, bfi_args[2],
487 LLVMBuildAnd(builder, bfi_args[0],
488 LLVMBuildXor(builder, bfi_args[1], bfi_args[2],
489 ""), ""), "");
490
491 /* Since shifts of >= 32 bits are undefined in LLVM IR, the backend
492 * uses the convenient V_BFI lowering for the above, which follows SM5
493 * and disagrees with GLSL semantics when bits (src3) is 32.
494 */
495 cond = LLVMBuildICmp(builder, LLVMIntUGE, emit_data->args[3],
496 LLVMConstInt(ctx->i32, 32, 0), "");
497 emit_data->output[emit_data->chan] =
498 LLVMBuildSelect(builder, cond, emit_data->args[1], bfi_sm5, "");
499 }
500
501 static void emit_bfe(const struct lp_build_tgsi_action *action,
502 struct lp_build_tgsi_context *bld_base,
503 struct lp_build_emit_data *emit_data)
504 {
505 struct si_shader_context *ctx = si_shader_context(bld_base);
506 LLVMValueRef bfe_sm5;
507 LLVMValueRef cond;
508
509 bfe_sm5 = ac_build_bfe(&ctx->ac, emit_data->args[0],
510 emit_data->args[1], emit_data->args[2],
511 emit_data->info->opcode == TGSI_OPCODE_IBFE);
512
513 /* Correct for GLSL semantics. */
514 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntUGE, emit_data->args[2],
515 LLVMConstInt(ctx->i32, 32, 0), "");
516 emit_data->output[emit_data->chan] =
517 LLVMBuildSelect(ctx->ac.builder, cond, emit_data->args[0], bfe_sm5, "");
518 }
519
520 /* this is ffs in C */
521 static void emit_lsb(const struct lp_build_tgsi_action *action,
522 struct lp_build_tgsi_context *bld_base,
523 struct lp_build_emit_data *emit_data)
524 {
525 struct si_shader_context *ctx = si_shader_context(bld_base);
526
527 emit_data->output[emit_data->chan] = ac_find_lsb(&ctx->ac, emit_data->dst_type, emit_data->args[0]);
528 }
529
530 /* Find the last bit set. */
531 static void emit_umsb(const struct lp_build_tgsi_action *action,
532 struct lp_build_tgsi_context *bld_base,
533 struct lp_build_emit_data *emit_data)
534 {
535 struct si_shader_context *ctx = si_shader_context(bld_base);
536
537 emit_data->output[emit_data->chan] =
538 ac_build_umsb(&ctx->ac, emit_data->args[0], emit_data->dst_type);
539 }
540
541 /* Find the last bit opposite of the sign bit. */
542 static void emit_imsb(const struct lp_build_tgsi_action *action,
543 struct lp_build_tgsi_context *bld_base,
544 struct lp_build_emit_data *emit_data)
545 {
546 struct si_shader_context *ctx = si_shader_context(bld_base);
547 emit_data->output[emit_data->chan] =
548 ac_build_imsb(&ctx->ac, emit_data->args[0],
549 emit_data->dst_type);
550 }
551
552 static void emit_iabs(const struct lp_build_tgsi_action *action,
553 struct lp_build_tgsi_context *bld_base,
554 struct lp_build_emit_data *emit_data)
555 {
556 struct si_shader_context *ctx = si_shader_context(bld_base);
557
558 emit_data->output[emit_data->chan] =
559 ac_build_imax(&ctx->ac, emit_data->args[0],
560 LLVMBuildNeg(ctx->ac.builder, emit_data->args[0], ""));
561 }
562
563 static void emit_minmax_int(const struct lp_build_tgsi_action *action,
564 struct lp_build_tgsi_context *bld_base,
565 struct lp_build_emit_data *emit_data)
566 {
567 struct si_shader_context *ctx = si_shader_context(bld_base);
568 LLVMIntPredicate op;
569
570 switch (emit_data->info->opcode) {
571 default:
572 assert(0);
573 case TGSI_OPCODE_IMAX:
574 case TGSI_OPCODE_I64MAX:
575 op = LLVMIntSGT;
576 break;
577 case TGSI_OPCODE_IMIN:
578 case TGSI_OPCODE_I64MIN:
579 op = LLVMIntSLT;
580 break;
581 case TGSI_OPCODE_UMAX:
582 case TGSI_OPCODE_U64MAX:
583 op = LLVMIntUGT;
584 break;
585 case TGSI_OPCODE_UMIN:
586 case TGSI_OPCODE_U64MIN:
587 op = LLVMIntULT;
588 break;
589 }
590
591 emit_data->output[emit_data->chan] =
592 LLVMBuildSelect(ctx->ac.builder,
593 LLVMBuildICmp(ctx->ac.builder, op, emit_data->args[0],
594 emit_data->args[1], ""),
595 emit_data->args[0],
596 emit_data->args[1], "");
597 }
598
599 static void pk2h_fetch_args(struct lp_build_tgsi_context *bld_base,
600 struct lp_build_emit_data *emit_data)
601 {
602 emit_data->args[0] = lp_build_emit_fetch(bld_base, emit_data->inst,
603 0, TGSI_CHAN_X);
604 emit_data->args[1] = lp_build_emit_fetch(bld_base, emit_data->inst,
605 0, TGSI_CHAN_Y);
606 }
607
608 static void emit_pk2h(const struct lp_build_tgsi_action *action,
609 struct lp_build_tgsi_context *bld_base,
610 struct lp_build_emit_data *emit_data)
611 {
612 struct si_shader_context *ctx = si_shader_context(bld_base);
613
614 /* From the GLSL 4.50 spec:
615 * "The rounding mode cannot be set and is undefined."
616 *
617 * v_cvt_pkrtz_f16 rounds to zero, but it's fastest.
618 */
619 emit_data->output[emit_data->chan] =
620 LLVMBuildBitCast(ctx->ac.builder,
621 ac_build_cvt_pkrtz_f16(&ctx->ac, emit_data->args),
622 ctx->i32, "");
623 }
624
625 static void up2h_fetch_args(struct lp_build_tgsi_context *bld_base,
626 struct lp_build_emit_data *emit_data)
627 {
628 emit_data->args[0] = lp_build_emit_fetch(bld_base, emit_data->inst,
629 0, TGSI_CHAN_X);
630 }
631
632 static void emit_up2h(const struct lp_build_tgsi_action *action,
633 struct lp_build_tgsi_context *bld_base,
634 struct lp_build_emit_data *emit_data)
635 {
636 struct si_shader_context *ctx = si_shader_context(bld_base);
637 LLVMTypeRef i16;
638 LLVMValueRef const16, input, val;
639 unsigned i;
640
641 i16 = LLVMInt16TypeInContext(ctx->ac.context);
642 const16 = LLVMConstInt(ctx->i32, 16, 0);
643 input = emit_data->args[0];
644
645 for (i = 0; i < 2; i++) {
646 val = i == 1 ? LLVMBuildLShr(ctx->ac.builder, input, const16, "") : input;
647 val = LLVMBuildTrunc(ctx->ac.builder, val, i16, "");
648 val = ac_to_float(&ctx->ac, val);
649 emit_data->output[i] = LLVMBuildFPExt(ctx->ac.builder, val, ctx->f32, "");
650 }
651 }
652
653 static void emit_fdiv(const struct lp_build_tgsi_action *action,
654 struct lp_build_tgsi_context *bld_base,
655 struct lp_build_emit_data *emit_data)
656 {
657 struct si_shader_context *ctx = si_shader_context(bld_base);
658
659 emit_data->output[emit_data->chan] =
660 ac_build_fdiv(&ctx->ac, emit_data->args[0], emit_data->args[1]);
661 }
662
663 /* 1/sqrt is translated to rsq for f32 if fp32 denormals are not enabled in
664 * the target machine. f64 needs global unsafe math flags to get rsq. */
665 static void emit_rsq(const struct lp_build_tgsi_action *action,
666 struct lp_build_tgsi_context *bld_base,
667 struct lp_build_emit_data *emit_data)
668 {
669 struct si_shader_context *ctx = si_shader_context(bld_base);
670
671 LLVMValueRef sqrt =
672 ac_build_intrinsic(&ctx->ac, "llvm.sqrt.f32", ctx->f32,
673 &emit_data->args[0], 1, AC_FUNC_ATTR_READNONE);
674
675 emit_data->output[emit_data->chan] =
676 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1, sqrt);
677 }
678
679 static void dfracexp_fetch_args(struct lp_build_tgsi_context *bld_base,
680 struct lp_build_emit_data *emit_data)
681 {
682 emit_data->args[0] = lp_build_emit_fetch(bld_base, emit_data->inst, 0, TGSI_CHAN_X);
683 emit_data->arg_count = 1;
684 }
685
686 static void dfracexp_emit(const struct lp_build_tgsi_action *action,
687 struct lp_build_tgsi_context *bld_base,
688 struct lp_build_emit_data *emit_data)
689 {
690 struct si_shader_context *ctx = si_shader_context(bld_base);
691
692 emit_data->output[emit_data->chan] =
693 ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.frexp.mant.f64",
694 ctx->ac.f64, &emit_data->args[0], 1, 0);
695 emit_data->output1[emit_data->chan] =
696 ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.frexp.exp.i32.f64",
697 ctx->ac.i32, &emit_data->args[0], 1, 0);
698 }
699
700 void si_shader_context_init_alu(struct lp_build_tgsi_context *bld_base)
701 {
702 lp_set_default_actions(bld_base);
703
704 bld_base->op_actions[TGSI_OPCODE_AND].emit = emit_and;
705 bld_base->op_actions[TGSI_OPCODE_ARL].emit = emit_arl;
706 bld_base->op_actions[TGSI_OPCODE_BFI].emit = emit_bfi;
707 bld_base->op_actions[TGSI_OPCODE_BREV].emit = build_tgsi_intrinsic_nomem;
708 bld_base->op_actions[TGSI_OPCODE_BREV].intr_name = "llvm.bitreverse.i32";
709 bld_base->op_actions[TGSI_OPCODE_CEIL].emit = build_tgsi_intrinsic_nomem;
710 bld_base->op_actions[TGSI_OPCODE_CEIL].intr_name = "llvm.ceil.f32";
711 bld_base->op_actions[TGSI_OPCODE_CMP].emit = emit_cmp;
712 bld_base->op_actions[TGSI_OPCODE_COS].emit = build_tgsi_intrinsic_nomem;
713 bld_base->op_actions[TGSI_OPCODE_COS].intr_name = "llvm.cos.f32";
714 bld_base->op_actions[TGSI_OPCODE_DABS].emit = build_tgsi_intrinsic_nomem;
715 bld_base->op_actions[TGSI_OPCODE_DABS].intr_name = "llvm.fabs.f64";
716 bld_base->op_actions[TGSI_OPCODE_DCEIL].emit = build_tgsi_intrinsic_nomem;
717 bld_base->op_actions[TGSI_OPCODE_DCEIL].intr_name = "llvm.ceil.f64";
718 bld_base->op_actions[TGSI_OPCODE_DFLR].emit = build_tgsi_intrinsic_nomem;
719 bld_base->op_actions[TGSI_OPCODE_DFLR].intr_name = "llvm.floor.f64";
720 bld_base->op_actions[TGSI_OPCODE_DFMA].emit = build_tgsi_intrinsic_nomem;
721 bld_base->op_actions[TGSI_OPCODE_DFMA].intr_name = "llvm.fma.f64";
722 bld_base->op_actions[TGSI_OPCODE_DFRAC].emit = emit_frac;
723 bld_base->op_actions[TGSI_OPCODE_DIV].emit = emit_fdiv;
724 bld_base->op_actions[TGSI_OPCODE_DNEG].emit = emit_dneg;
725 bld_base->op_actions[TGSI_OPCODE_DROUND].emit = build_tgsi_intrinsic_nomem;
726 bld_base->op_actions[TGSI_OPCODE_DROUND].intr_name = "llvm.rint.f64";
727 bld_base->op_actions[TGSI_OPCODE_DSEQ].emit = emit_dcmp;
728 bld_base->op_actions[TGSI_OPCODE_DSGE].emit = emit_dcmp;
729 bld_base->op_actions[TGSI_OPCODE_DSLT].emit = emit_dcmp;
730 bld_base->op_actions[TGSI_OPCODE_DSNE].emit = emit_dcmp;
731 bld_base->op_actions[TGSI_OPCODE_DSSG].emit = emit_ssg;
732 bld_base->op_actions[TGSI_OPCODE_DRSQ].emit = build_tgsi_intrinsic_nomem;
733 bld_base->op_actions[TGSI_OPCODE_DRSQ].intr_name = "llvm.amdgcn.rsq.f64";
734 bld_base->op_actions[TGSI_OPCODE_DSQRT].emit = build_tgsi_intrinsic_nomem;
735 bld_base->op_actions[TGSI_OPCODE_DSQRT].intr_name = "llvm.sqrt.f64";
736 bld_base->op_actions[TGSI_OPCODE_DTRUNC].emit = build_tgsi_intrinsic_nomem;
737 bld_base->op_actions[TGSI_OPCODE_DTRUNC].intr_name = "llvm.trunc.f64";
738 bld_base->op_actions[TGSI_OPCODE_DFRACEXP].fetch_args = dfracexp_fetch_args;
739 bld_base->op_actions[TGSI_OPCODE_DFRACEXP].emit = dfracexp_emit;
740 bld_base->op_actions[TGSI_OPCODE_DLDEXP].emit = build_tgsi_intrinsic_nomem;
741 bld_base->op_actions[TGSI_OPCODE_DLDEXP].intr_name = "llvm.amdgcn.ldexp.f64";
742 bld_base->op_actions[TGSI_OPCODE_EX2].emit = build_tgsi_intrinsic_nomem;
743 bld_base->op_actions[TGSI_OPCODE_EX2].intr_name = "llvm.exp2.f32";
744 bld_base->op_actions[TGSI_OPCODE_FLR].emit = build_tgsi_intrinsic_nomem;
745 bld_base->op_actions[TGSI_OPCODE_FLR].intr_name = "llvm.floor.f32";
746 bld_base->op_actions[TGSI_OPCODE_FMA].emit =
747 bld_base->op_actions[TGSI_OPCODE_MAD].emit;
748 bld_base->op_actions[TGSI_OPCODE_FRC].emit = emit_frac;
749 bld_base->op_actions[TGSI_OPCODE_F2I].emit = emit_f2i;
750 bld_base->op_actions[TGSI_OPCODE_F2U].emit = emit_f2u;
751 bld_base->op_actions[TGSI_OPCODE_FSEQ].emit = emit_fcmp;
752 bld_base->op_actions[TGSI_OPCODE_FSGE].emit = emit_fcmp;
753 bld_base->op_actions[TGSI_OPCODE_FSLT].emit = emit_fcmp;
754 bld_base->op_actions[TGSI_OPCODE_FSNE].emit = emit_fcmp;
755 bld_base->op_actions[TGSI_OPCODE_IABS].emit = emit_iabs;
756 bld_base->op_actions[TGSI_OPCODE_IBFE].emit = emit_bfe;
757 bld_base->op_actions[TGSI_OPCODE_IDIV].emit = emit_idiv;
758 bld_base->op_actions[TGSI_OPCODE_IMAX].emit = emit_minmax_int;
759 bld_base->op_actions[TGSI_OPCODE_IMIN].emit = emit_minmax_int;
760 bld_base->op_actions[TGSI_OPCODE_IMSB].emit = emit_imsb;
761 bld_base->op_actions[TGSI_OPCODE_INEG].emit = emit_ineg;
762 bld_base->op_actions[TGSI_OPCODE_ISHR].emit = emit_ishr;
763 bld_base->op_actions[TGSI_OPCODE_ISGE].emit = emit_icmp;
764 bld_base->op_actions[TGSI_OPCODE_ISLT].emit = emit_icmp;
765 bld_base->op_actions[TGSI_OPCODE_ISSG].emit = emit_ssg;
766 bld_base->op_actions[TGSI_OPCODE_I2F].emit = emit_i2f;
767 bld_base->op_actions[TGSI_OPCODE_KILL_IF].fetch_args = kill_if_fetch_args;
768 bld_base->op_actions[TGSI_OPCODE_KILL_IF].emit = kil_emit;
769 bld_base->op_actions[TGSI_OPCODE_KILL].emit = kil_emit;
770 bld_base->op_actions[TGSI_OPCODE_LDEXP].emit = build_tgsi_intrinsic_nomem;
771 bld_base->op_actions[TGSI_OPCODE_LDEXP].intr_name = "llvm.amdgcn.ldexp.f32";
772 bld_base->op_actions[TGSI_OPCODE_LSB].emit = emit_lsb;
773 bld_base->op_actions[TGSI_OPCODE_LG2].emit = build_tgsi_intrinsic_nomem;
774 bld_base->op_actions[TGSI_OPCODE_LG2].intr_name = "llvm.log2.f32";
775 bld_base->op_actions[TGSI_OPCODE_MAX].emit = build_tgsi_intrinsic_nomem;
776 bld_base->op_actions[TGSI_OPCODE_MAX].intr_name = "llvm.maxnum.f32";
777 bld_base->op_actions[TGSI_OPCODE_MIN].emit = build_tgsi_intrinsic_nomem;
778 bld_base->op_actions[TGSI_OPCODE_MIN].intr_name = "llvm.minnum.f32";
779 bld_base->op_actions[TGSI_OPCODE_MOD].emit = emit_mod;
780 bld_base->op_actions[TGSI_OPCODE_UMSB].emit = emit_umsb;
781 bld_base->op_actions[TGSI_OPCODE_NOT].emit = emit_not;
782 bld_base->op_actions[TGSI_OPCODE_OR].emit = emit_or;
783 bld_base->op_actions[TGSI_OPCODE_PK2H].fetch_args = pk2h_fetch_args;
784 bld_base->op_actions[TGSI_OPCODE_PK2H].emit = emit_pk2h;
785 bld_base->op_actions[TGSI_OPCODE_POPC].emit = build_tgsi_intrinsic_nomem;
786 bld_base->op_actions[TGSI_OPCODE_POPC].intr_name = "llvm.ctpop.i32";
787 bld_base->op_actions[TGSI_OPCODE_POW].emit = build_tgsi_intrinsic_nomem;
788 bld_base->op_actions[TGSI_OPCODE_POW].intr_name = "llvm.pow.f32";
789 bld_base->op_actions[TGSI_OPCODE_ROUND].emit = build_tgsi_intrinsic_nomem;
790 bld_base->op_actions[TGSI_OPCODE_ROUND].intr_name = "llvm.rint.f32";
791 bld_base->op_actions[TGSI_OPCODE_RSQ].emit = emit_rsq;
792 bld_base->op_actions[TGSI_OPCODE_SGE].emit = emit_set_cond;
793 bld_base->op_actions[TGSI_OPCODE_SEQ].emit = emit_set_cond;
794 bld_base->op_actions[TGSI_OPCODE_SHL].emit = emit_shl;
795 bld_base->op_actions[TGSI_OPCODE_SLE].emit = emit_set_cond;
796 bld_base->op_actions[TGSI_OPCODE_SLT].emit = emit_set_cond;
797 bld_base->op_actions[TGSI_OPCODE_SNE].emit = emit_set_cond;
798 bld_base->op_actions[TGSI_OPCODE_SGT].emit = emit_set_cond;
799 bld_base->op_actions[TGSI_OPCODE_SIN].emit = build_tgsi_intrinsic_nomem;
800 bld_base->op_actions[TGSI_OPCODE_SIN].intr_name = "llvm.sin.f32";
801 bld_base->op_actions[TGSI_OPCODE_SQRT].emit = build_tgsi_intrinsic_nomem;
802 bld_base->op_actions[TGSI_OPCODE_SQRT].intr_name = "llvm.sqrt.f32";
803 bld_base->op_actions[TGSI_OPCODE_SSG].emit = emit_ssg;
804 bld_base->op_actions[TGSI_OPCODE_TRUNC].emit = build_tgsi_intrinsic_nomem;
805 bld_base->op_actions[TGSI_OPCODE_TRUNC].intr_name = "llvm.trunc.f32";
806 bld_base->op_actions[TGSI_OPCODE_UADD].emit = emit_uadd;
807 bld_base->op_actions[TGSI_OPCODE_UBFE].emit = emit_bfe;
808 bld_base->op_actions[TGSI_OPCODE_UDIV].emit = emit_udiv;
809 bld_base->op_actions[TGSI_OPCODE_UMAX].emit = emit_minmax_int;
810 bld_base->op_actions[TGSI_OPCODE_UMIN].emit = emit_minmax_int;
811 bld_base->op_actions[TGSI_OPCODE_UMOD].emit = emit_umod;
812 bld_base->op_actions[TGSI_OPCODE_USEQ].emit = emit_icmp;
813 bld_base->op_actions[TGSI_OPCODE_USGE].emit = emit_icmp;
814 bld_base->op_actions[TGSI_OPCODE_USHR].emit = emit_ushr;
815 bld_base->op_actions[TGSI_OPCODE_USLT].emit = emit_icmp;
816 bld_base->op_actions[TGSI_OPCODE_USNE].emit = emit_icmp;
817 bld_base->op_actions[TGSI_OPCODE_U2F].emit = emit_u2f;
818 bld_base->op_actions[TGSI_OPCODE_XOR].emit = emit_xor;
819 bld_base->op_actions[TGSI_OPCODE_UCMP].emit = emit_ucmp;
820 bld_base->op_actions[TGSI_OPCODE_UP2H].fetch_args = up2h_fetch_args;
821 bld_base->op_actions[TGSI_OPCODE_UP2H].emit = emit_up2h;
822
823 bld_base->op_actions[TGSI_OPCODE_I64MAX].emit = emit_minmax_int;
824 bld_base->op_actions[TGSI_OPCODE_I64MIN].emit = emit_minmax_int;
825 bld_base->op_actions[TGSI_OPCODE_U64MAX].emit = emit_minmax_int;
826 bld_base->op_actions[TGSI_OPCODE_U64MIN].emit = emit_minmax_int;
827 bld_base->op_actions[TGSI_OPCODE_I64ABS].emit = emit_iabs;
828 bld_base->op_actions[TGSI_OPCODE_I64SSG].emit = emit_ssg;
829 bld_base->op_actions[TGSI_OPCODE_I64NEG].emit = emit_ineg;
830
831 bld_base->op_actions[TGSI_OPCODE_U64SEQ].emit = emit_icmp;
832 bld_base->op_actions[TGSI_OPCODE_U64SNE].emit = emit_icmp;
833 bld_base->op_actions[TGSI_OPCODE_U64SGE].emit = emit_icmp;
834 bld_base->op_actions[TGSI_OPCODE_U64SLT].emit = emit_icmp;
835 bld_base->op_actions[TGSI_OPCODE_I64SGE].emit = emit_icmp;
836 bld_base->op_actions[TGSI_OPCODE_I64SLT].emit = emit_icmp;
837
838 bld_base->op_actions[TGSI_OPCODE_U64ADD].emit = emit_uadd;
839 bld_base->op_actions[TGSI_OPCODE_U64SHL].emit = emit_shl;
840 bld_base->op_actions[TGSI_OPCODE_U64SHR].emit = emit_ushr;
841 bld_base->op_actions[TGSI_OPCODE_I64SHR].emit = emit_ishr;
842
843 bld_base->op_actions[TGSI_OPCODE_U64MOD].emit = emit_umod;
844 bld_base->op_actions[TGSI_OPCODE_I64MOD].emit = emit_mod;
845 bld_base->op_actions[TGSI_OPCODE_U64DIV].emit = emit_udiv;
846 bld_base->op_actions[TGSI_OPCODE_I64DIV].emit = emit_idiv;
847 }