src/gallium/drivers/radeonsi/si_uvd.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2011 Advanced Micro Devices, Inc.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #include "si_pipe.h"
  29 #include "radeon/radeon_video.h"
  30 #include "radeon/radeon_uvd.h"
  31 #include "radeon/radeon_vce.h"
  32 #include "radeon/radeon_vcn_dec.h"
  33 #include "radeon/radeon_vcn_enc.h"
  34
  35 /**
  36  * creates an video buffer with an UVD compatible memory layout
  37  */
  38 struct pipe_video_buffer *si_video_buffer_create(struct pipe_context *pipe,
  39                                                  const struct pipe_video_buffer *tmpl)
  40 {
  41         struct si_context *ctx = (struct si_context *)pipe;
  42         struct r600_texture *resources[VL_NUM_COMPONENTS] = {};
  43         struct radeon_surf *surfaces[VL_NUM_COMPONENTS] = {};
  44         struct pb_buffer **pbs[VL_NUM_COMPONENTS] = {};
  45         const enum pipe_format *resource_formats;
  46         struct pipe_video_buffer vidtemplate;
  47         struct pipe_resource templ;
  48         unsigned i, array_size;
  49
  50         assert(pipe);
  51
  52         /* first create the needed resources as "normal" textures */
  53         resource_formats = vl_video_buffer_formats(pipe->screen, tmpl->buffer_format);
  54         if (!resource_formats)
  55                 return NULL;
  56
  57         array_size = tmpl->interlaced ? 2 : 1;
  58         vidtemplate = *tmpl;
  59         vidtemplate.width = align(tmpl->width, VL_MACROBLOCK_WIDTH);
  60         vidtemplate.height = align(tmpl->height / array_size, VL_MACROBLOCK_HEIGHT);
  61
  62         assert(resource_formats[0] != PIPE_FORMAT_NONE);
  63
  64         for (i = 0; i < VL_NUM_COMPONENTS; ++i) {
  65                 if (resource_formats[i] != PIPE_FORMAT_NONE) {
  66                         vl_video_buffer_template(&templ, &vidtemplate,
  67                                                  resource_formats[i], 1,
  68                                                  array_size, PIPE_USAGE_DEFAULT, i);
  69                         /* Set PIPE_BIND_SHARED to avoid reallocation in r600_texture_get_handle,
  70                          * which can't handle joined surfaces. */
  71                         /* TODO: get tiling working */
  72                         templ.bind = PIPE_BIND_LINEAR | PIPE_BIND_SHARED;
  73                         resources[i] = (struct r600_texture *)
  74                                         pipe->screen->resource_create(pipe->screen, &templ);
  75                         if (!resources[i])
  76                                 goto error;
  77                 }
  78         }
  79
  80         for (i = 0; i < VL_NUM_COMPONENTS; ++i) {
  81                 if (!resources[i])
  82                         continue;
  83
  84                 surfaces[i] = & resources[i]->surface;
  85                 pbs[i] = &resources[i]->resource.buf;
  86         }
  87
  88         si_vid_join_surfaces(&ctx->b, pbs, surfaces);
  89
  90         for (i = 0; i < VL_NUM_COMPONENTS; ++i) {
  91                 if (!resources[i])
  92                         continue;
  93
  94                 /* reset the address */
  95                 resources[i]->resource.gpu_address = ctx->b.ws->buffer_get_virtual_address(
  96                         resources[i]->resource.buf);
  97         }
  98
  99         vidtemplate.height *= array_size;
 100         return vl_video_buffer_create_ex2(pipe, &vidtemplate, (struct pipe_resource **)resources);
 101
 102 error:
 103         for (i = 0; i < VL_NUM_COMPONENTS; ++i)
 104                 r600_texture_reference(&resources[i], NULL);
 105
 106         return NULL;
 107 }
 108
 109 /* set the decoding target buffer offsets */
 110 static struct pb_buffer* si_uvd_set_dtb(struct ruvd_msg *msg, struct vl_video_buffer *buf)
 111 {
 112         struct si_screen *sscreen = (struct si_screen*)buf->base.context->screen;
 113         struct r600_texture *luma = (struct r600_texture *)buf->resources[0];
 114         struct r600_texture *chroma = (struct r600_texture *)buf->resources[1];
 115         enum ruvd_surface_type type =  (sscreen->info.chip_class >= GFX9) ?
 116                                         RUVD_SURFACE_TYPE_GFX9 :
 117                                         RUVD_SURFACE_TYPE_LEGACY;
 118
 119         msg->body.decode.dt_field_mode = buf->base.interlaced;
 120
 121         si_uvd_set_dt_surfaces(msg, &luma->surface, (chroma) ? &chroma->surface : NULL, type);
 122
 123         return luma->resource.buf;
 124 }
 125
 126 /* get the radeon resources for VCE */
 127 static void si_vce_get_buffer(struct pipe_resource *resource,
 128                               struct pb_buffer **handle,
 129                               struct radeon_surf **surface)
 130 {
 131         struct r600_texture *res = (struct r600_texture *)resource;
 132
 133         if (handle)
 134                 *handle = res->resource.buf;
 135
 136         if (surface)
 137                 *surface = &res->surface;
 138 }
 139
 140 /**
 141  * creates an UVD compatible decoder
 142  */
 143 struct pipe_video_codec *si_uvd_create_decoder(struct pipe_context *context,
 144                                                const struct pipe_video_codec *templ)
 145 {
 146         struct si_context *ctx = (struct si_context *)context;
 147         bool vcn = (ctx->b.family == CHIP_RAVEN) ? true : false;
 148
 149         if (templ->entrypoint == PIPE_VIDEO_ENTRYPOINT_ENCODE)
 150                 return (vcn) ? radeon_create_encoder(context, templ, ctx->b.ws, si_vce_get_buffer) :
 151                si_vce_create_encoder(context, templ, ctx->b.ws, si_vce_get_buffer);
 152
 153         return (vcn) ?  radeon_create_decoder(context, templ) :
 154                 si_common_uvd_create_decoder(context, templ, si_uvd_set_dtb);
 155 }