Merge branch 'master' into pipe-video
[mesa.git] / src / gallium / drivers / softpipe / sp_tex_tile_cache.c
1 /**************************************************************************
2 *
3 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 /**
29 * Texture tile caching.
30 *
31 * Author:
32 * Brian Paul
33 */
34
35 #include "util/u_inlines.h"
36 #include "util/u_memory.h"
37 #include "util/u_tile.h"
38 #include "util/u_math.h"
39 #include "sp_context.h"
40 #include "sp_texture.h"
41 #include "sp_tex_tile_cache.h"
42
43
44
45 struct softpipe_tex_tile_cache *
46 sp_create_tex_tile_cache( struct pipe_context *pipe )
47 {
48 struct softpipe_tex_tile_cache *tc;
49 uint pos;
50
51 tc = CALLOC_STRUCT( softpipe_tex_tile_cache );
52 if (tc) {
53 tc->pipe = pipe;
54 for (pos = 0; pos < NUM_ENTRIES; pos++) {
55 tc->entries[pos].addr.bits.invalid = 1;
56 }
57 tc->last_tile = &tc->entries[0]; /* any tile */
58 }
59 return tc;
60 }
61
62
63 void
64 sp_destroy_tex_tile_cache(struct softpipe_tex_tile_cache *tc)
65 {
66 if (tc) {
67 uint pos;
68
69 for (pos = 0; pos < NUM_ENTRIES; pos++) {
70 /*assert(tc->entries[pos].x < 0);*/
71 }
72 if (tc->transfer) {
73 tc->pipe->transfer_destroy(tc->pipe, tc->transfer);
74 }
75 if (tc->tex_trans) {
76 tc->pipe->transfer_destroy(tc->pipe, tc->tex_trans);
77 }
78
79 FREE( tc );
80 }
81 }
82
83
84
85
86 void
87 sp_tex_tile_cache_map_transfers(struct softpipe_tex_tile_cache *tc)
88 {
89 if (tc->tex_trans && !tc->tex_trans_map)
90 tc->tex_trans_map = tc->pipe->transfer_map(tc->pipe, tc->tex_trans);
91 }
92
93
94 void
95 sp_tex_tile_cache_unmap_transfers(struct softpipe_tex_tile_cache *tc)
96 {
97 if (tc->tex_trans_map) {
98 tc->pipe->transfer_unmap(tc->pipe, tc->tex_trans);
99 tc->tex_trans_map = NULL;
100 }
101 }
102
103 /**
104 * Invalidate all cached tiles for the cached texture.
105 * Should be called when the texture is modified.
106 */
107 void
108 sp_tex_tile_cache_validate_texture(struct softpipe_tex_tile_cache *tc)
109 {
110 unsigned i;
111
112 assert(tc);
113 assert(tc->texture);
114
115 for (i = 0; i < NUM_ENTRIES; i++) {
116 tc->entries[i].addr.bits.invalid = 1;
117 }
118 }
119
120 static boolean
121 sp_tex_tile_is_compat_view(struct softpipe_tex_tile_cache *tc,
122 struct pipe_sampler_view *view)
123 {
124 if (!view)
125 return FALSE;
126 return (tc->texture == view->texture &&
127 tc->format == view->format &&
128 tc->swizzle_r == view->swizzle_r &&
129 tc->swizzle_g == view->swizzle_g &&
130 tc->swizzle_b == view->swizzle_b &&
131 tc->swizzle_a == view->swizzle_a);
132 }
133
134 /**
135 * Specify the sampler view to cache.
136 */
137 void
138 sp_tex_tile_cache_set_sampler_view(struct softpipe_tex_tile_cache *tc,
139 struct pipe_sampler_view *view)
140 {
141 struct pipe_resource *texture = view ? view->texture : NULL;
142 uint i;
143
144 assert(!tc->transfer);
145
146 if (!sp_tex_tile_is_compat_view(tc, view)) {
147 pipe_resource_reference(&tc->texture, texture);
148
149 if (tc->tex_trans) {
150 if (tc->tex_trans_map) {
151 tc->pipe->transfer_unmap(tc->pipe, tc->tex_trans);
152 tc->tex_trans_map = NULL;
153 }
154
155 tc->pipe->transfer_destroy(tc->pipe, tc->tex_trans);
156 tc->tex_trans = NULL;
157 }
158
159 if (view) {
160 tc->swizzle_r = view->swizzle_r;
161 tc->swizzle_g = view->swizzle_g;
162 tc->swizzle_b = view->swizzle_b;
163 tc->swizzle_a = view->swizzle_a;
164 tc->format = view->format;
165 }
166
167 /* mark as entries as invalid/empty */
168 /* XXX we should try to avoid this when the teximage hasn't changed */
169 for (i = 0; i < NUM_ENTRIES; i++) {
170 tc->entries[i].addr.bits.invalid = 1;
171 }
172
173 tc->tex_face = -1; /* any invalid value here */
174 }
175 }
176
177
178
179
180 /**
181 * Flush the tile cache: write all dirty tiles back to the transfer.
182 * any tiles "flagged" as cleared will be "really" cleared.
183 */
184 void
185 sp_flush_tex_tile_cache(struct softpipe_tex_tile_cache *tc)
186 {
187 int pos;
188
189 if (tc->texture) {
190 /* caching a texture, mark all entries as empty */
191 for (pos = 0; pos < NUM_ENTRIES; pos++) {
192 tc->entries[pos].addr.bits.invalid = 1;
193 }
194 tc->tex_face = -1;
195 }
196
197 }
198
199
200 /**
201 * Given the texture face, level, zslice, x and y values, compute
202 * the cache entry position/index where we'd hope to find the
203 * cached texture tile.
204 * This is basically a direct-map cache.
205 * XXX There's probably lots of ways in which we can improve this.
206 */
207 static INLINE uint
208 tex_cache_pos( union tex_tile_address addr )
209 {
210 uint entry = (addr.bits.x +
211 addr.bits.y * 9 +
212 addr.bits.z * 3 +
213 addr.bits.face +
214 addr.bits.level * 7);
215
216 return entry % NUM_ENTRIES;
217 }
218
219 /**
220 * Similar to sp_get_cached_tile() but for textures.
221 * Tiles are read-only and indexed with more params.
222 */
223 const struct softpipe_tex_cached_tile *
224 sp_find_cached_tile_tex(struct softpipe_tex_tile_cache *tc,
225 union tex_tile_address addr )
226 {
227 struct softpipe_tex_cached_tile *tile;
228
229 tile = tc->entries + tex_cache_pos( addr );
230
231 if (addr.value != tile->addr.value) {
232
233 /* cache miss. Most misses are because we've invaldiated the
234 * texture cache previously -- most commonly on binding a new
235 * texture. Currently we effectively flush the cache on texture
236 * bind.
237 */
238 #if 0
239 _debug_printf("miss at %u: x=%d y=%d z=%d face=%d level=%d\n"
240 " tile %u: x=%d y=%d z=%d face=%d level=%d\n",
241 pos, x/TILE_SIZE, y/TILE_SIZE, z, face, level,
242 pos, tile->addr.bits.x, tile->addr.bits.y, tile->z, tile->face, tile->level);
243 #endif
244
245 /* check if we need to get a new transfer */
246 if (!tc->tex_trans ||
247 tc->tex_face != addr.bits.face ||
248 tc->tex_level != addr.bits.level ||
249 tc->tex_z != addr.bits.z) {
250 /* get new transfer (view into texture) */
251
252 if (tc->tex_trans) {
253 if (tc->tex_trans_map) {
254 tc->pipe->transfer_unmap(tc->pipe, tc->tex_trans);
255 tc->tex_trans_map = NULL;
256 }
257
258 tc->pipe->transfer_destroy(tc->pipe, tc->tex_trans);
259 tc->tex_trans = NULL;
260 }
261
262 tc->tex_trans =
263 pipe_get_transfer(tc->pipe, tc->texture,
264 addr.bits.face,
265 addr.bits.level,
266 addr.bits.z,
267 PIPE_TRANSFER_READ | PIPE_TRANSFER_UNSYNCHRONIZED,
268 0, 0,
269 u_minify(tc->texture->width0, addr.bits.level),
270 u_minify(tc->texture->height0, addr.bits.level));
271
272 tc->tex_trans_map = tc->pipe->transfer_map(tc->pipe, tc->tex_trans);
273
274 tc->tex_face = addr.bits.face;
275 tc->tex_level = addr.bits.level;
276 tc->tex_z = addr.bits.z;
277 }
278
279 /* get tile from the transfer (view into texture) */
280 pipe_get_tile_swizzle(tc->pipe,
281 tc->tex_trans,
282 addr.bits.x * TILE_SIZE,
283 addr.bits.y * TILE_SIZE,
284 TILE_SIZE,
285 TILE_SIZE,
286 tc->swizzle_r,
287 tc->swizzle_g,
288 tc->swizzle_b,
289 tc->swizzle_a,
290 tc->format,
291 (float *) tile->data.color);
292 tile->addr = addr;
293 }
294
295 tc->last_tile = tile;
296 return tile;
297 }
298
299
300
301 /**
302 * Return the swizzled border color.
303 */
304 const float *
305 sp_tex_tile_cache_border_color(struct softpipe_tex_tile_cache *tc,
306 const float border_color[4])
307 {
308 float rgba01[6];
309
310 COPY_4V(rgba01, border_color);
311 rgba01[PIPE_SWIZZLE_ZERO] = 0.0f;
312 rgba01[PIPE_SWIZZLE_ONE] = 1.0f;
313
314 tc->swz_border_color[0] = rgba01[tc->swizzle_r];
315 tc->swz_border_color[1] = rgba01[tc->swizzle_g];
316 tc->swz_border_color[2] = rgba01[tc->swizzle_b];
317 tc->swz_border_color[3] = rgba01[tc->swizzle_a];
318
319 return tc->swz_border_color;
320 }