softpipe: invalidate cache view when swizzles are different.
[mesa.git] / src / gallium / drivers / softpipe / sp_tex_tile_cache.c
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2 *
3 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
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16 * of the Software.
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27
28 /**
29 * Texture tile caching.
30 *
31 * Author:
32 * Brian Paul
33 */
34
35 #include "util/u_inlines.h"
36 #include "util/u_memory.h"
37 #include "util/u_tile.h"
38 #include "util/u_math.h"
39 #include "sp_context.h"
40 #include "sp_texture.h"
41 #include "sp_tex_tile_cache.h"
42
43
44
45 struct softpipe_tex_tile_cache *
46 sp_create_tex_tile_cache( struct pipe_context *pipe )
47 {
48 struct softpipe_tex_tile_cache *tc;
49 uint pos;
50
51 tc = CALLOC_STRUCT( softpipe_tex_tile_cache );
52 if (tc) {
53 tc->pipe = pipe;
54 for (pos = 0; pos < NUM_ENTRIES; pos++) {
55 tc->entries[pos].addr.bits.invalid = 1;
56 }
57 tc->last_tile = &tc->entries[0]; /* any tile */
58 }
59 return tc;
60 }
61
62
63 void
64 sp_destroy_tex_tile_cache(struct softpipe_tex_tile_cache *tc)
65 {
66 uint pos;
67
68 for (pos = 0; pos < NUM_ENTRIES; pos++) {
69 /*assert(tc->entries[pos].x < 0);*/
70 }
71 if (tc->transfer) {
72 tc->pipe->transfer_destroy(tc->pipe, tc->transfer);
73 }
74 if (tc->tex_trans) {
75 tc->pipe->transfer_destroy(tc->pipe, tc->tex_trans);
76 }
77
78 FREE( tc );
79 }
80
81
82
83
84 void
85 sp_tex_tile_cache_map_transfers(struct softpipe_tex_tile_cache *tc)
86 {
87 if (tc->tex_trans && !tc->tex_trans_map)
88 tc->tex_trans_map = tc->pipe->transfer_map(tc->pipe, tc->tex_trans);
89 }
90
91
92 void
93 sp_tex_tile_cache_unmap_transfers(struct softpipe_tex_tile_cache *tc)
94 {
95 if (tc->tex_trans_map) {
96 tc->pipe->transfer_unmap(tc->pipe, tc->tex_trans);
97 tc->tex_trans_map = NULL;
98 }
99 }
100
101 /**
102 * Invalidate all cached tiles for the cached texture.
103 * Should be called when the texture is modified.
104 */
105 void
106 sp_tex_tile_cache_validate_texture(struct softpipe_tex_tile_cache *tc)
107 {
108 unsigned i;
109
110 assert(tc);
111 assert(tc->texture);
112
113 for (i = 0; i < NUM_ENTRIES; i++) {
114 tc->entries[i].addr.bits.invalid = 1;
115 }
116 }
117
118 static boolean
119 sp_tex_tile_is_compat_view(struct softpipe_tex_tile_cache *tc,
120 struct pipe_sampler_view *view)
121 {
122 if (!view)
123 return FALSE;
124 return (tc->texture == view->texture &&
125 tc->format == view->format &&
126 tc->swizzle_r == view->swizzle_r &&
127 tc->swizzle_g == view->swizzle_g &&
128 tc->swizzle_b == view->swizzle_b &&
129 tc->swizzle_a == view->swizzle_a);
130 }
131
132 /**
133 * Specify the sampler view to cache.
134 */
135 void
136 sp_tex_tile_cache_set_sampler_view(struct softpipe_tex_tile_cache *tc,
137 struct pipe_sampler_view *view)
138 {
139 struct pipe_resource *texture = view ? view->texture : NULL;
140 uint i;
141
142 assert(!tc->transfer);
143
144 if (!sp_tex_tile_is_compat_view(tc, view)) {
145 pipe_resource_reference(&tc->texture, texture);
146
147 if (tc->tex_trans) {
148 if (tc->tex_trans_map) {
149 tc->pipe->transfer_unmap(tc->pipe, tc->tex_trans);
150 tc->tex_trans_map = NULL;
151 }
152
153 tc->pipe->transfer_destroy(tc->pipe, tc->tex_trans);
154 tc->tex_trans = NULL;
155 }
156
157 if (view) {
158 tc->swizzle_r = view->swizzle_r;
159 tc->swizzle_g = view->swizzle_g;
160 tc->swizzle_b = view->swizzle_b;
161 tc->swizzle_a = view->swizzle_a;
162 tc->format = view->format;
163 }
164
165 /* mark as entries as invalid/empty */
166 /* XXX we should try to avoid this when the teximage hasn't changed */
167 for (i = 0; i < NUM_ENTRIES; i++) {
168 tc->entries[i].addr.bits.invalid = 1;
169 }
170
171 tc->tex_face = -1; /* any invalid value here */
172 }
173 }
174
175
176
177
178 /**
179 * Flush the tile cache: write all dirty tiles back to the transfer.
180 * any tiles "flagged" as cleared will be "really" cleared.
181 */
182 void
183 sp_flush_tex_tile_cache(struct softpipe_tex_tile_cache *tc)
184 {
185 int pos;
186
187 if (tc->texture) {
188 /* caching a texture, mark all entries as empty */
189 for (pos = 0; pos < NUM_ENTRIES; pos++) {
190 tc->entries[pos].addr.bits.invalid = 1;
191 }
192 tc->tex_face = -1;
193 }
194
195 }
196
197
198 /**
199 * Given the texture face, level, zslice, x and y values, compute
200 * the cache entry position/index where we'd hope to find the
201 * cached texture tile.
202 * This is basically a direct-map cache.
203 * XXX There's probably lots of ways in which we can improve this.
204 */
205 static INLINE uint
206 tex_cache_pos( union tex_tile_address addr )
207 {
208 uint entry = (addr.bits.x +
209 addr.bits.y * 9 +
210 addr.bits.z * 3 +
211 addr.bits.face +
212 addr.bits.level * 7);
213
214 return entry % NUM_ENTRIES;
215 }
216
217 /**
218 * Similar to sp_get_cached_tile() but for textures.
219 * Tiles are read-only and indexed with more params.
220 */
221 const struct softpipe_tex_cached_tile *
222 sp_find_cached_tile_tex(struct softpipe_tex_tile_cache *tc,
223 union tex_tile_address addr )
224 {
225 struct softpipe_tex_cached_tile *tile;
226
227 tile = tc->entries + tex_cache_pos( addr );
228
229 if (addr.value != tile->addr.value) {
230
231 /* cache miss. Most misses are because we've invaldiated the
232 * texture cache previously -- most commonly on binding a new
233 * texture. Currently we effectively flush the cache on texture
234 * bind.
235 */
236 #if 0
237 _debug_printf("miss at %u: x=%d y=%d z=%d face=%d level=%d\n"
238 " tile %u: x=%d y=%d z=%d face=%d level=%d\n",
239 pos, x/TILE_SIZE, y/TILE_SIZE, z, face, level,
240 pos, tile->addr.bits.x, tile->addr.bits.y, tile->z, tile->face, tile->level);
241 #endif
242
243 /* check if we need to get a new transfer */
244 if (!tc->tex_trans ||
245 tc->tex_face != addr.bits.face ||
246 tc->tex_level != addr.bits.level ||
247 tc->tex_z != addr.bits.z) {
248 /* get new transfer (view into texture) */
249
250 if (tc->tex_trans) {
251 if (tc->tex_trans_map) {
252 tc->pipe->transfer_unmap(tc->pipe, tc->tex_trans);
253 tc->tex_trans_map = NULL;
254 }
255
256 tc->pipe->transfer_destroy(tc->pipe, tc->tex_trans);
257 tc->tex_trans = NULL;
258 }
259
260 tc->tex_trans =
261 pipe_get_transfer(tc->pipe, tc->texture,
262 addr.bits.face,
263 addr.bits.level,
264 addr.bits.z,
265 PIPE_TRANSFER_READ | PIPE_TRANSFER_UNSYNCHRONIZED,
266 0, 0,
267 u_minify(tc->texture->width0, addr.bits.level),
268 u_minify(tc->texture->height0, addr.bits.level));
269
270 tc->tex_trans_map = tc->pipe->transfer_map(tc->pipe, tc->tex_trans);
271
272 tc->tex_face = addr.bits.face;
273 tc->tex_level = addr.bits.level;
274 tc->tex_z = addr.bits.z;
275 }
276
277 /* get tile from the transfer (view into texture) */
278 pipe_get_tile_swizzle(tc->pipe,
279 tc->tex_trans,
280 addr.bits.x * TILE_SIZE,
281 addr.bits.y * TILE_SIZE,
282 TILE_SIZE,
283 TILE_SIZE,
284 tc->swizzle_r,
285 tc->swizzle_g,
286 tc->swizzle_b,
287 tc->swizzle_a,
288 tc->format,
289 (float *) tile->data.color);
290 tile->addr = addr;
291 }
292
293 tc->last_tile = tile;
294 return tile;
295 }
296
297
298