src/gallium/drivers/softpipe/sp_tex_tile_cache.h

   1 /**************************************************************************
   2  *
   3  * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
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  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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  26  **************************************************************************/
  27
  28 #ifndef SP_TEX_TILE_CACHE_H
  29 #define SP_TEX_TILE_CACHE_H
  30
  31
  32 #include "pipe/p_compiler.h"
  33 #include "sp_limits.h"
  34
  35
  36 struct softpipe_context;
  37 struct softpipe_tex_tile_cache;
  38
  39
  40 /**
  41  * Cache tile size (width and height). This needs to be a power of two.
  42  */
  43 #define TILE_SIZE_LOG2 6
  44 #define TILE_SIZE (1 << TILE_SIZE_LOG2)
  45
  46
  47 #define TEX_ADDR_BITS (SP_MAX_TEXTURE_2D_LEVELS - 1 - TILE_SIZE_LOG2)
  48 #define TEX_Z_BITS (SP_MAX_TEXTURE_2D_LEVELS - 1)
  49
  50 /**
  51  * Texture tile address as a union for fast compares.
  52  */
  53 union tex_tile_address {
  54    struct {
  55       unsigned x:TEX_ADDR_BITS;  /* 16K / TILE_SIZE */
  56       unsigned y:TEX_ADDR_BITS;  /* 16K / TILE_SIZE */
  57       unsigned z:TEX_Z_BITS;     /* 16K -- z not tiled */
  58       unsigned face:3;
  59       unsigned level:4;
  60       unsigned invalid:1;
  61    } bits;
  62    uint64_t value;
  63 };
  64
  65
  66 struct softpipe_tex_cached_tile
  67 {
  68    union tex_tile_address addr;
  69    union {
  70       float color[TILE_SIZE][TILE_SIZE][4];
  71    } data;
  72 };
  73
  74 #define NUM_ENTRIES 50
  75
  76 struct softpipe_tex_tile_cache
  77 {
  78    struct pipe_context *pipe;
  79    struct pipe_transfer *transfer;
  80    void *transfer_map;
  81
  82    struct pipe_resource *texture;  /**< if caching a texture */
  83    unsigned timestamp;
  84
  85    struct softpipe_tex_cached_tile entries[NUM_ENTRIES];
  86
  87    struct pipe_transfer *tex_trans;
  88    void *tex_trans_map;
  89    int tex_face, tex_level, tex_z;
  90
  91    unsigned swizzle_r;
  92    unsigned swizzle_g;
  93    unsigned swizzle_b;
  94    unsigned swizzle_a;
  95    unsigned format;
  96
  97    struct softpipe_tex_cached_tile *last_tile;  /**< most recently retrieved tile */
  98 };
  99
 100
 101 extern struct softpipe_tex_tile_cache *
 102 sp_create_tex_tile_cache( struct pipe_context *pipe );
 103
 104 extern void
 105 sp_destroy_tex_tile_cache(struct softpipe_tex_tile_cache *tc);
 106
 107
 108 extern void
 109 sp_tex_tile_cache_map_transfers(struct softpipe_tex_tile_cache *tc);
 110
 111 extern void
 112 sp_tex_tile_cache_unmap_transfers(struct softpipe_tex_tile_cache *tc);
 113
 114 extern void
 115 sp_tex_tile_cache_set_sampler_view(struct softpipe_tex_tile_cache *tc,
 116                                    struct pipe_sampler_view *view);
 117
 118 void
 119 sp_tex_tile_cache_validate_texture(struct softpipe_tex_tile_cache *tc);
 120
 121 extern void
 122 sp_flush_tex_tile_cache(struct softpipe_tex_tile_cache *tc);
 123
 124
 125
 126 extern const struct softpipe_tex_cached_tile *
 127 sp_find_cached_tile_tex(struct softpipe_tex_tile_cache *tc,
 128                          union tex_tile_address addr );
 129
 130 static INLINE union tex_tile_address
 131 tex_tile_address( unsigned x,
 132                   unsigned y,
 133                   unsigned z,
 134                   unsigned face,
 135                   unsigned level )
 136 {
 137    union tex_tile_address addr;
 138
 139    addr.value = 0;
 140    addr.bits.x = x / TILE_SIZE;
 141    addr.bits.y = y / TILE_SIZE;
 142    addr.bits.z = z;
 143    addr.bits.face = face;
 144    addr.bits.level = level;
 145
 146    return addr;
 147 }
 148
 149 /* Quickly retrieve tile if it matches last lookup.
 150  */
 151 static INLINE const struct softpipe_tex_cached_tile *
 152 sp_get_cached_tile_tex(struct softpipe_tex_tile_cache *tc,
 153                          union tex_tile_address addr )
 154 {
 155    if (tc->last_tile->addr.value == addr.value)
 156       return tc->last_tile;
 157
 158    return sp_find_cached_tile_tex( tc, addr );
 159 }
 160
 161
 162 #endif /* SP_TEX_TILE_CACHE_H */
 163