src/gallium/drivers/svga/svga_context.h

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #ifndef SVGA_CONTEXT_H
  27 #define SVGA_CONTEXT_H
  28
  29
  30 #include "pipe/p_context.h"
  31 #include "pipe/p_defines.h"
  32 #include "pipe/p_state.h"
  33
  34 #include "util/u_blitter.h"
  35 #include "util/list.h"
  36
  37 #include "tgsi/tgsi_scan.h"
  38
  39 #include "svga_screen.h"
  40 #include "svga_state.h"
  41 #include "svga_winsys.h"
  42 #include "svga_hw_reg.h"
  43 #include "svga3d_shaderdefs.h"
  44
  45
  46 /** Non-GPU queries for gallium HUD */
  47 /* per-frame counters */
  48 #define SVGA_QUERY_NUM_DRAW_CALLS          (PIPE_QUERY_DRIVER_SPECIFIC + 0)
  49 #define SVGA_QUERY_NUM_FALLBACKS           (PIPE_QUERY_DRIVER_SPECIFIC + 1)
  50 #define SVGA_QUERY_NUM_FLUSHES             (PIPE_QUERY_DRIVER_SPECIFIC + 2)
  51 #define SVGA_QUERY_NUM_VALIDATIONS         (PIPE_QUERY_DRIVER_SPECIFIC + 3)
  52 #define SVGA_QUERY_MAP_BUFFER_TIME         (PIPE_QUERY_DRIVER_SPECIFIC + 4)
  53 #define SVGA_QUERY_NUM_RESOURCES_MAPPED    (PIPE_QUERY_DRIVER_SPECIFIC + 5)
  54 #define SVGA_QUERY_NUM_BYTES_UPLOADED      (PIPE_QUERY_DRIVER_SPECIFIC + 6)
  55 #define SVGA_QUERY_COMMAND_BUFFER_SIZE     (PIPE_QUERY_DRIVER_SPECIFIC + 7)
  56 #define SVGA_QUERY_FLUSH_TIME              (PIPE_QUERY_DRIVER_SPECIFIC + 8)
  57 #define SVGA_QUERY_SURFACE_WRITE_FLUSHES   (PIPE_QUERY_DRIVER_SPECIFIC + 9)
  58 #define SVGA_QUERY_NUM_READBACKS           (PIPE_QUERY_DRIVER_SPECIFIC + 10)
  59 #define SVGA_QUERY_NUM_RESOURCE_UPDATES    (PIPE_QUERY_DRIVER_SPECIFIC + 11)
  60 #define SVGA_QUERY_NUM_BUFFER_UPLOADS      (PIPE_QUERY_DRIVER_SPECIFIC + 12)
  61 #define SVGA_QUERY_NUM_CONST_BUF_UPDATES   (PIPE_QUERY_DRIVER_SPECIFIC + 13)
  62 #define SVGA_QUERY_NUM_CONST_UPDATES       (PIPE_QUERY_DRIVER_SPECIFIC + 14)
  63
  64 /* running total counters */
  65 #define SVGA_QUERY_MEMORY_USED             (PIPE_QUERY_DRIVER_SPECIFIC + 15)
  66 #define SVGA_QUERY_NUM_SHADERS             (PIPE_QUERY_DRIVER_SPECIFIC + 16)
  67 #define SVGA_QUERY_NUM_RESOURCES           (PIPE_QUERY_DRIVER_SPECIFIC + 17)
  68 #define SVGA_QUERY_NUM_STATE_OBJECTS       (PIPE_QUERY_DRIVER_SPECIFIC + 18)
  69 #define SVGA_QUERY_NUM_SURFACE_VIEWS       (PIPE_QUERY_DRIVER_SPECIFIC + 19)
  70 #define SVGA_QUERY_NUM_GENERATE_MIPMAP     (PIPE_QUERY_DRIVER_SPECIFIC + 20)
  71 /*SVGA_QUERY_MAX has to be last because it is size of an array*/
  72 #define SVGA_QUERY_MAX                     (PIPE_QUERY_DRIVER_SPECIFIC + 21)
  73
  74 /**
  75  * Maximum supported number of constant buffers per shader
  76  */
  77 #define SVGA_MAX_CONST_BUFS 14
  78
  79 /**
  80  * Maximum constant buffer size that can be set in the
  81  * DXSetSingleConstantBuffer command is
  82  * DX10 constant buffer element count * 4 4-bytes components
  83  */
  84 #define SVGA_MAX_CONST_BUF_SIZE (4096 * 4 * sizeof(int))
  85
  86 #define CONST0_UPLOAD_ALIGNMENT 256
  87
  88 struct draw_vertex_shader;
  89 struct draw_fragment_shader;
  90 struct svga_shader_variant;
  91 struct SVGACmdMemory;
  92 struct util_bitmask;
  93
  94
  95 struct svga_cache_context;
  96 struct svga_tracked_state;
  97
  98 struct svga_blend_state {
  99    unsigned need_white_fragments:1;
 100    unsigned independent_blend_enable:1;
 101    unsigned alpha_to_coverage:1;
 102    unsigned blend_color_alpha:1;  /**< set blend color to alpha value */
 103
 104    /** Per-render target state */
 105    struct {
 106       uint8_t writemask;
 107
 108       boolean blend_enable;
 109       uint8_t srcblend;
 110       uint8_t dstblend;
 111       uint8_t blendeq;
 112
 113       boolean separate_alpha_blend_enable;
 114       uint8_t srcblend_alpha;
 115       uint8_t dstblend_alpha;
 116       uint8_t blendeq_alpha;
 117    } rt[PIPE_MAX_COLOR_BUFS];
 118
 119    SVGA3dBlendStateId id;  /**< vgpu10 */
 120 };
 121
 122 struct svga_depth_stencil_state {
 123    unsigned zfunc:8;
 124    unsigned zenable:1;
 125    unsigned zwriteenable:1;
 126
 127    unsigned alphatestenable:1;
 128    unsigned alphafunc:8;
 129
 130    struct {
 131       unsigned enabled:1;
 132       unsigned func:8;
 133       unsigned fail:8;
 134       unsigned zfail:8;
 135       unsigned pass:8;
 136    } stencil[2];
 137
 138    /* SVGA3D has one ref/mask/writemask triple shared between front &
 139     * back face stencil.  We really need two:
 140     */
 141    unsigned stencil_mask:8;
 142    unsigned stencil_writemask:8;
 143
 144    float    alpharef;
 145
 146    SVGA3dDepthStencilStateId id;  /**< vgpu10 */
 147 };
 148
 149 #define SVGA_UNFILLED_DISABLE 0
 150 #define SVGA_UNFILLED_LINE    1
 151 #define SVGA_UNFILLED_POINT   2
 152
 153 #define SVGA_PIPELINE_FLAG_POINTS   (1<<PIPE_PRIM_POINTS)
 154 #define SVGA_PIPELINE_FLAG_LINES    (1<<PIPE_PRIM_LINES)
 155 #define SVGA_PIPELINE_FLAG_TRIS     (1<<PIPE_PRIM_TRIANGLES)
 156
 157 struct svga_rasterizer_state {
 158    struct pipe_rasterizer_state templ; /* needed for draw module */
 159
 160    unsigned shademode:8;
 161    unsigned cullmode:8;
 162    unsigned scissortestenable:1;
 163    unsigned multisampleantialias:1;
 164    unsigned antialiasedlineenable:1;
 165    unsigned lastpixel:1;
 166    unsigned pointsprite:1;
 167
 168    unsigned linepattern;
 169
 170    float slopescaledepthbias;
 171    float depthbias;
 172    float pointsize;
 173    float linewidth;
 174
 175    unsigned hw_fillmode:2;         /* PIPE_POLYGON_MODE_x */
 176
 177    /** Which prims do we need help for?  Bitmask of (1 << PIPE_PRIM_x) flags */
 178    unsigned need_pipeline:16;
 179
 180    SVGA3dRasterizerStateId id;    /**< vgpu10 */
 181
 182    /** For debugging: */
 183    const char* need_pipeline_tris_str;
 184    const char* need_pipeline_lines_str;
 185    const char* need_pipeline_points_str;
 186 };
 187
 188 struct svga_sampler_state {
 189    unsigned mipfilter;
 190    unsigned magfilter;
 191    unsigned minfilter;
 192    unsigned aniso_level;
 193    float lod_bias;
 194    unsigned addressu;
 195    unsigned addressv;
 196    unsigned addressw;
 197    unsigned bordercolor;
 198    unsigned normalized_coords:1;
 199    unsigned compare_mode:1;
 200    unsigned compare_func:3;
 201
 202    unsigned min_lod;
 203    unsigned view_min_lod;
 204    unsigned view_max_lod;
 205
 206    SVGA3dSamplerId id;
 207 };
 208
 209
 210 struct svga_pipe_sampler_view
 211 {
 212    struct pipe_sampler_view base;
 213
 214    SVGA3dShaderResourceViewId id;
 215 };
 216
 217
 218 static inline struct svga_pipe_sampler_view *
 219 svga_pipe_sampler_view(struct pipe_sampler_view *v)
 220 {
 221    return (struct svga_pipe_sampler_view *) v;
 222 }
 223
 224
 225 struct svga_velems_state {
 226    unsigned count;
 227    struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS];
 228    SVGA3dDeclType decl_type[PIPE_MAX_ATTRIBS]; /**< vertex attrib formats */
 229
 230    /** Bitmasks indicating which attributes need format conversion */
 231    unsigned adjust_attrib_range;     /**< range adjustment */
 232    unsigned attrib_is_pure_int;      /**< pure int */
 233    unsigned adjust_attrib_w_1;       /**< set w = 1 */
 234    unsigned adjust_attrib_itof;      /**< int->float */
 235    unsigned adjust_attrib_utof;      /**< uint->float */
 236    unsigned attrib_is_bgra;          /**< R / B swizzling */
 237    unsigned attrib_puint_to_snorm;   /**< 10_10_10_2 packed uint -> snorm */
 238    unsigned attrib_puint_to_uscaled; /**< 10_10_10_2 packed uint -> uscaled */
 239    unsigned attrib_puint_to_sscaled; /**< 10_10_10_2 packed uint -> sscaled */
 240
 241    boolean need_swvfetch;
 242
 243    SVGA3dElementLayoutId id; /**< VGPU10 */
 244 };
 245
 246 /* Use to calculate differences between state emitted to hardware and
 247  * current driver-calculated state.
 248  */
 249 struct svga_state
 250 {
 251    const struct svga_blend_state *blend;
 252    const struct svga_depth_stencil_state *depth;
 253    const struct svga_rasterizer_state *rast;
 254    const struct svga_sampler_state *sampler[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
 255    const struct svga_velems_state *velems;
 256
 257    struct pipe_sampler_view *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS]; /* or texture ID's? */
 258    struct svga_fragment_shader *fs;
 259    struct svga_vertex_shader *vs;
 260    struct svga_geometry_shader *user_gs; /* user-specified GS */
 261    struct svga_geometry_shader *gs;      /* derived GS */
 262
 263    struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
 264    struct pipe_index_buffer ib;
 265    /** Constant buffers for each shader.
 266     * The size should probably always match with that of
 267     * svga_shader_emitter_v10.num_shader_consts.
 268     */
 269    struct pipe_constant_buffer constbufs[PIPE_SHADER_TYPES][SVGA_MAX_CONST_BUFS];
 270
 271    struct pipe_framebuffer_state framebuffer;
 272    float depthscale;
 273
 274    /* Hack to limit the number of different render targets between
 275     * flushes.  Helps avoid blowing out our surface cache in EXA.
 276     */
 277    int nr_fbs;
 278
 279    struct pipe_poly_stipple poly_stipple;
 280    struct pipe_scissor_state scissor;
 281    struct pipe_blend_color blend_color;
 282    struct pipe_stencil_ref stencil_ref;
 283    struct pipe_clip_state clip;
 284    struct pipe_viewport_state viewport;
 285
 286    unsigned num_samplers[PIPE_SHADER_TYPES];
 287    unsigned num_sampler_views[PIPE_SHADER_TYPES];
 288    unsigned num_vertex_buffers;
 289    unsigned reduced_prim;
 290
 291    struct {
 292       unsigned flag_1d;
 293       unsigned flag_srgb;
 294       unsigned flag_rect;  /* sampler views with rectangular texture target */
 295       unsigned flag_buf;   /* sampler views with texture buffer target */
 296    } tex_flags;
 297
 298    unsigned sample_mask;
 299 };
 300
 301 struct svga_prescale {
 302    float translate[4];
 303    float scale[4];
 304    boolean enabled;
 305 };
 306
 307
 308 /* Updated by calling svga_update_state( SVGA_STATE_HW_CLEAR )
 309  */
 310 struct svga_hw_clear_state
 311 {
 312    SVGA3dRect viewport;
 313
 314    struct {
 315       float zmin, zmax;
 316    } depthrange;
 317
 318    struct pipe_framebuffer_state framebuffer;
 319    struct svga_prescale prescale;
 320 };
 321
 322 struct svga_hw_view_state
 323 {
 324    struct pipe_resource *texture;
 325    struct svga_sampler_view *v;
 326    unsigned min_lod;
 327    unsigned max_lod;
 328    boolean dirty;
 329 };
 330
 331 /* Updated by calling svga_update_state( SVGA_STATE_HW_DRAW )
 332  */
 333 struct svga_hw_draw_state
 334 {
 335    /** VGPU9 rasterization state */
 336    unsigned rs[SVGA3D_RS_MAX];
 337    /** VGPU9 texture sampler and bindings state */
 338    unsigned ts[SVGA3D_PIXEL_SAMPLERREG_MAX][SVGA3D_TS_MAX];
 339    /** VGPU9 texture views */
 340    unsigned num_views;
 341    struct svga_hw_view_state views[PIPE_MAX_SAMPLERS];
 342    /** VGPU9 constant buffer values */
 343    float cb[PIPE_SHADER_TYPES][SVGA3D_CONSTREG_MAX][4];
 344
 345    /** Currently bound shaders */
 346    struct svga_shader_variant *fs;
 347    struct svga_shader_variant *vs;
 348    struct svga_shader_variant *gs;
 349
 350    /** Currently bound constant buffer, per shader stage */
 351    struct pipe_resource *constbuf[PIPE_SHADER_TYPES];
 352
 353    /** Bitmask of enabled constant buffers */
 354    unsigned enabled_constbufs[PIPE_SHADER_TYPES];
 355
 356    /** VGPU10 HW state (used to prevent emitting redundant state) */
 357    SVGA3dDepthStencilStateId depth_stencil_id;
 358    unsigned stencil_ref;
 359    SVGA3dBlendStateId blend_id;
 360    float blend_factor[4];
 361    unsigned blend_sample_mask;
 362    SVGA3dRasterizerStateId rasterizer_id;
 363    SVGA3dElementLayoutId layout_id;
 364    SVGA3dPrimitiveType topology;
 365
 366    /** Vertex buffer state */
 367    SVGA3dVertexBuffer vbuffer_attrs[PIPE_MAX_ATTRIBS];
 368    struct pipe_resource *vbuffers[PIPE_MAX_ATTRIBS];
 369    unsigned num_vbuffers;
 370
 371    struct pipe_resource *ib;  /**< index buffer for drawing */
 372    SVGA3dSurfaceFormat ib_format;
 373    unsigned ib_offset;
 374
 375    unsigned num_samplers[PIPE_SHADER_TYPES];
 376    SVGA3dSamplerId samplers[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
 377
 378    unsigned num_rendertargets;
 379    struct pipe_surface *rtv[SVGA3D_MAX_RENDER_TARGETS];
 380    struct pipe_surface *dsv;
 381
 382    /* used for rebinding */
 383    unsigned num_sampler_views[PIPE_SHADER_TYPES];
 384    unsigned default_constbuf_size[PIPE_SHADER_TYPES];
 385 };
 386
 387
 388 /* Updated by calling svga_update_state( SVGA_STATE_NEED_SWTNL )
 389  */
 390 struct svga_sw_state
 391 {
 392    /* which parts we need */
 393    boolean need_swvfetch;
 394    boolean need_pipeline;
 395    boolean need_swtnl;
 396
 397    /* Flag to make sure that need sw is on while
 398     * updating state within a swtnl call.
 399     */
 400    boolean in_swtnl_draw;
 401 };
 402
 403
 404 /* Queue some state updates (like rss) and submit them to hardware in
 405  * a single packet.
 406  */
 407 struct svga_hw_queue;
 408
 409 struct svga_query;
 410 struct svga_qmem_alloc_entry;
 411
 412 struct svga_context
 413 {
 414    struct pipe_context pipe;
 415    struct svga_winsys_context *swc;
 416    struct blitter_context *blitter;
 417    struct u_upload_mgr *const0_upload;
 418
 419    struct {
 420       boolean no_swtnl;
 421       boolean force_swtnl;
 422       boolean use_min_mipmap;
 423
 424       /* incremented for each shader */
 425       unsigned shader_id;
 426
 427       unsigned disable_shader;
 428
 429       boolean no_line_width;
 430       boolean force_hw_line_stipple;
 431
 432       /** To report perf/conformance/etc issues to the state tracker */
 433       struct pipe_debug_callback callback;
 434    } debug;
 435
 436    struct {
 437       struct draw_context *draw;
 438       struct vbuf_render *backend;
 439       unsigned hw_prim;
 440       boolean new_vbuf;
 441       boolean new_vdecl;
 442    } swtnl;
 443
 444    /* Bitmask of blend state objects IDs */
 445    struct util_bitmask *blend_object_id_bm;
 446
 447    /* Bitmask of depth/stencil state objects IDs */
 448    struct util_bitmask *ds_object_id_bm;
 449
 450    /* Bitmaks of input element object IDs */
 451    struct util_bitmask *input_element_object_id_bm;
 452
 453    /* Bitmask of rasterizer object IDs */
 454    struct util_bitmask *rast_object_id_bm;
 455
 456    /* Bitmask of sampler state objects IDs */
 457    struct util_bitmask *sampler_object_id_bm;
 458
 459    /* Bitmask of sampler view IDs */
 460    struct util_bitmask *sampler_view_id_bm;
 461
 462    /* Bitmask of used shader IDs */
 463    struct util_bitmask *shader_id_bm;
 464
 465    /* Bitmask of used surface view IDs */
 466    struct util_bitmask *surface_view_id_bm;
 467
 468    /* Bitmask of used stream output IDs */
 469    struct util_bitmask *stream_output_id_bm;
 470
 471    /* Bitmask of used query IDs */
 472    struct util_bitmask *query_id_bm;
 473
 474    struct {
 475       unsigned dirty[SVGA_STATE_MAX];
 476
 477       /** bitmasks of which const buffers are changed */
 478       unsigned dirty_constbufs[PIPE_SHADER_TYPES];
 479
 480       unsigned texture_timestamp;
 481
 482       /*
 483        */
 484       struct svga_sw_state          sw;
 485       struct svga_hw_draw_state     hw_draw;
 486       struct svga_hw_clear_state    hw_clear;
 487    } state;
 488
 489    struct svga_state curr;      /* state from the state tracker */
 490    unsigned dirty;              /* statechanges since last update_state() */
 491
 492    union {
 493       struct {
 494          unsigned rendertargets:1;
 495          unsigned texture_samplers:1;
 496          unsigned constbufs:1;
 497          unsigned vs:1;
 498          unsigned fs:1;
 499          unsigned gs:1;
 500          unsigned query:1;
 501       } flags;
 502       unsigned val;
 503    } rebind;
 504
 505    struct svga_hwtnl *hwtnl;
 506
 507    /** Queries states */
 508    struct svga_winsys_gb_query *gb_query;     /**< gb query object, one per context */
 509    unsigned gb_query_len;                     /**< gb query object size */
 510    struct util_bitmask *gb_query_alloc_mask;  /**< gb query object allocation mask */
 511    struct svga_qmem_alloc_entry *gb_query_map[SVGA_QUERY_MAX];
 512                                               /**< query mem block mapping */
 513    struct svga_query *sq[SVGA_QUERY_MAX];     /**< queries currently in progress */
 514
 515    /** List of buffers with queued transfers */
 516    struct list_head dirty_buffers;
 517
 518    /** performance / info queries for HUD */
 519    struct {
 520       uint64_t num_draw_calls;          /**< SVGA_QUERY_DRAW_CALLS */
 521       uint64_t num_fallbacks;           /**< SVGA_QUERY_NUM_FALLBACKS */
 522       uint64_t num_flushes;             /**< SVGA_QUERY_NUM_FLUSHES */
 523       uint64_t num_validations;         /**< SVGA_QUERY_NUM_VALIDATIONS */
 524       uint64_t map_buffer_time;         /**< SVGA_QUERY_MAP_BUFFER_TIME */
 525       uint64_t num_resources_mapped;    /**< SVGA_QUERY_NUM_RESOURCES_MAPPED */
 526       uint64_t command_buffer_size;     /**< SVGA_QUERY_COMMAND_BUFFER_SIZE */
 527       uint64_t flush_time;              /**< SVGA_QUERY_FLUSH_TIME */
 528       uint64_t surface_write_flushes;   /**< SVGA_QUERY_SURFACE_WRITE_FLUSHES */
 529       uint64_t num_readbacks;           /**< SVGA_QUERY_NUM_READBACKS */
 530       uint64_t num_resource_updates;    /**< SVGA_QUERY_NUM_RESOURCE_UPDATES */
 531       uint64_t num_buffer_uploads;      /**< SVGA_QUERY_NUM_BUFFER_UPLOADS */
 532       uint64_t num_const_buf_updates;   /**< SVGA_QUERY_NUM_CONST_BUF_UPDATES */
 533       uint64_t num_const_updates;       /**< SVGA_QUERY_NUM_CONST_UPDATES */
 534       uint64_t num_shaders;             /**< SVGA_QUERY_NUM_SHADERS */
 535
 536       /** The following are summed for SVGA_QUERY_NUM_STATE_OBJECTS */
 537       uint64_t num_blend_objects;
 538       uint64_t num_depthstencil_objects;
 539       uint64_t num_rasterizer_objects;
 540       uint64_t num_sampler_objects;
 541       uint64_t num_samplerview_objects;
 542       uint64_t num_vertexelement_objects;
 543
 544       uint64_t num_surface_views;       /**< SVGA_QUERY_NUM_SURFACE_VIEWS */
 545       uint64_t num_bytes_uploaded;      /**< SVGA_QUERY_NUM_BYTES_UPLOADED */
 546       uint64_t num_generate_mipmap;     /**< SVGA_QUERY_NUM_GENERATE_MIPMAP */
 547    } hud;
 548
 549    /** The currently bound stream output targets */
 550    unsigned num_so_targets;
 551    struct svga_winsys_surface *so_surfaces[SVGA3D_DX_MAX_SOTARGETS];
 552    struct pipe_stream_output_target *so_targets[SVGA3D_DX_MAX_SOTARGETS];
 553    struct svga_stream_output *current_so;
 554
 555    /** A blend state with blending disabled, for falling back to when blending
 556     * is illegal (e.g. an integer texture is bound)
 557     */
 558    struct svga_blend_state *noop_blend;
 559
 560    struct {
 561       struct pipe_resource *texture;
 562       struct svga_pipe_sampler_view *sampler_view;
 563       void *sampler;
 564    } polygon_stipple;
 565
 566    /** Alternate rasterizer states created for point sprite */
 567    struct svga_rasterizer_state *rasterizer_no_cull[2];
 568 };
 569
 570 /* A flag for each state_tracker state object:
 571  */
 572 #define SVGA_NEW_BLEND               0x1
 573 #define SVGA_NEW_DEPTH_STENCIL_ALPHA 0x2
 574 #define SVGA_NEW_RAST                0x4
 575 #define SVGA_NEW_SAMPLER             0x8
 576 #define SVGA_NEW_TEXTURE             0x10
 577 #define SVGA_NEW_VBUFFER             0x20
 578 #define SVGA_NEW_VELEMENT            0x40
 579 #define SVGA_NEW_FS                  0x80
 580 #define SVGA_NEW_VS                  0x100
 581 #define SVGA_NEW_FS_CONST_BUFFER     0x200
 582 #define SVGA_NEW_VS_CONST_BUFFER     0x400
 583 #define SVGA_NEW_FRAME_BUFFER        0x800
 584 #define SVGA_NEW_STIPPLE             0x1000
 585 #define SVGA_NEW_SCISSOR             0x2000
 586 #define SVGA_NEW_BLEND_COLOR         0x4000
 587 #define SVGA_NEW_CLIP                0x8000
 588 #define SVGA_NEW_VIEWPORT            0x10000
 589 #define SVGA_NEW_PRESCALE            0x20000
 590 #define SVGA_NEW_REDUCED_PRIMITIVE   0x40000
 591 #define SVGA_NEW_TEXTURE_BINDING     0x80000
 592 #define SVGA_NEW_NEED_PIPELINE       0x100000
 593 #define SVGA_NEW_NEED_SWVFETCH       0x200000
 594 #define SVGA_NEW_NEED_SWTNL          0x400000
 595 #define SVGA_NEW_FS_VARIANT          0x800000
 596 #define SVGA_NEW_VS_VARIANT          0x1000000
 597 #define SVGA_NEW_TEXTURE_FLAGS       0x4000000
 598 #define SVGA_NEW_STENCIL_REF         0x8000000
 599 #define SVGA_NEW_GS                  0x10000000
 600 #define SVGA_NEW_GS_CONST_BUFFER     0x20000000
 601 #define SVGA_NEW_GS_VARIANT          0x40000000
 602 #define SVGA_NEW_TEXTURE_CONSTS      0x80000000
 603
 604
 605
 606
 607 /***********************************************************************
 608  * svga_clear.c:
 609  */
 610 void svga_clear(struct pipe_context *pipe,
 611                 unsigned buffers,
 612                 const union pipe_color_union *color,
 613                 double depth,
 614                 unsigned stencil);
 615
 616
 617 /***********************************************************************
 618  * svga_screen_texture.c:
 619  */
 620 void svga_mark_surfaces_dirty(struct svga_context *svga);
 621
 622
 623
 624
 625 void svga_init_state_functions( struct svga_context *svga );
 626 void svga_init_flush_functions( struct svga_context *svga );
 627 void svga_init_string_functions( struct svga_context *svga );
 628 void svga_init_blit_functions(struct svga_context *svga);
 629
 630 void svga_init_blend_functions( struct svga_context *svga );
 631 void svga_init_depth_stencil_functions( struct svga_context *svga );
 632 void svga_init_misc_functions( struct svga_context *svga );
 633 void svga_init_rasterizer_functions( struct svga_context *svga );
 634 void svga_init_sampler_functions( struct svga_context *svga );
 635 void svga_init_fs_functions( struct svga_context *svga );
 636 void svga_init_vs_functions( struct svga_context *svga );
 637 void svga_init_gs_functions( struct svga_context *svga );
 638 void svga_init_vertex_functions( struct svga_context *svga );
 639 void svga_init_constbuffer_functions( struct svga_context *svga );
 640 void svga_init_draw_functions( struct svga_context *svga );
 641 void svga_init_query_functions( struct svga_context *svga );
 642 void svga_init_surface_functions(struct svga_context *svga);
 643 void svga_init_stream_output_functions( struct svga_context *svga );
 644
 645 void svga_cleanup_vertex_state( struct svga_context *svga );
 646 void svga_cleanup_tss_binding( struct svga_context *svga );
 647 void svga_cleanup_framebuffer( struct svga_context *svga );
 648
 649 void svga_context_flush( struct svga_context *svga,
 650                          struct pipe_fence_handle **pfence );
 651
 652 void svga_context_finish(struct svga_context *svga);
 653
 654 void svga_hwtnl_flush_retry( struct svga_context *svga );
 655 void svga_hwtnl_flush_buffer( struct svga_context *svga,
 656                               struct pipe_resource *buffer );
 657
 658 void svga_surfaces_flush(struct svga_context *svga);
 659
 660 struct pipe_context *
 661 svga_context_create(struct pipe_screen *screen,
 662                     void *priv, unsigned flags);
 663
 664
 665 /***********************************************************************
 666  * Inline conversion functions.  These are better-typed than the
 667  * macros used previously:
 668  */
 669 static inline struct svga_context *
 670 svga_context( struct pipe_context *pipe )
 671 {
 672    return (struct svga_context *)pipe;
 673 }
 674
 675
 676 static inline boolean
 677 svga_have_gb_objects(const struct svga_context *svga)
 678 {
 679    return svga_screen(svga->pipe.screen)->sws->have_gb_objects;
 680 }
 681
 682 static inline boolean
 683 svga_have_gb_dma(const struct svga_context *svga)
 684 {
 685    return svga_screen(svga->pipe.screen)->sws->have_gb_dma;
 686 }
 687
 688 static inline boolean
 689 svga_have_vgpu10(const struct svga_context *svga)
 690 {
 691    return svga_screen(svga->pipe.screen)->sws->have_vgpu10;
 692 }
 693
 694 static inline boolean
 695 svga_need_to_rebind_resources(const struct svga_context *svga)
 696 {
 697    return svga_screen(svga->pipe.screen)->sws->need_to_rebind_resources;
 698 }
 699
 700 static inline boolean
 701 svga_rects_equal(const SVGA3dRect *r1, const SVGA3dRect *r2)
 702 {
 703    return memcmp(r1, r2, sizeof(*r1)) == 0;
 704 }
 705
 706 #endif