svga: avoid emitting redundant SetShaderResource command
[mesa.git] / src / gallium / drivers / svga / svga_context.h
1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
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25
26 #ifndef SVGA_CONTEXT_H
27 #define SVGA_CONTEXT_H
28
29
30 #include "pipe/p_context.h"
31 #include "pipe/p_defines.h"
32 #include "pipe/p_state.h"
33
34 #include "os/os_time.h"
35
36 #include "util/u_blitter.h"
37 #include "util/list.h"
38
39 #include "tgsi/tgsi_scan.h"
40
41 #include "svga_screen.h"
42 #include "svga_state.h"
43 #include "svga_winsys.h"
44 #include "svga_hw_reg.h"
45 #include "svga3d_shaderdefs.h"
46
47
48 /** Non-GPU queries for gallium HUD */
49 /* per-frame counters */
50 #define SVGA_QUERY_NUM_DRAW_CALLS (PIPE_QUERY_DRIVER_SPECIFIC + 0)
51 #define SVGA_QUERY_NUM_FALLBACKS (PIPE_QUERY_DRIVER_SPECIFIC + 1)
52 #define SVGA_QUERY_NUM_FLUSHES (PIPE_QUERY_DRIVER_SPECIFIC + 2)
53 #define SVGA_QUERY_NUM_VALIDATIONS (PIPE_QUERY_DRIVER_SPECIFIC + 3)
54 #define SVGA_QUERY_MAP_BUFFER_TIME (PIPE_QUERY_DRIVER_SPECIFIC + 4)
55 #define SVGA_QUERY_NUM_RESOURCES_MAPPED (PIPE_QUERY_DRIVER_SPECIFIC + 5)
56 #define SVGA_QUERY_NUM_BYTES_UPLOADED (PIPE_QUERY_DRIVER_SPECIFIC + 6)
57 #define SVGA_QUERY_COMMAND_BUFFER_SIZE (PIPE_QUERY_DRIVER_SPECIFIC + 7)
58 #define SVGA_QUERY_FLUSH_TIME (PIPE_QUERY_DRIVER_SPECIFIC + 8)
59 #define SVGA_QUERY_SURFACE_WRITE_FLUSHES (PIPE_QUERY_DRIVER_SPECIFIC + 9)
60 #define SVGA_QUERY_NUM_READBACKS (PIPE_QUERY_DRIVER_SPECIFIC + 10)
61 #define SVGA_QUERY_NUM_RESOURCE_UPDATES (PIPE_QUERY_DRIVER_SPECIFIC + 11)
62 #define SVGA_QUERY_NUM_BUFFER_UPLOADS (PIPE_QUERY_DRIVER_SPECIFIC + 12)
63 #define SVGA_QUERY_NUM_CONST_BUF_UPDATES (PIPE_QUERY_DRIVER_SPECIFIC + 13)
64 #define SVGA_QUERY_NUM_CONST_UPDATES (PIPE_QUERY_DRIVER_SPECIFIC + 14)
65
66 /* running total counters */
67 #define SVGA_QUERY_MEMORY_USED (PIPE_QUERY_DRIVER_SPECIFIC + 15)
68 #define SVGA_QUERY_NUM_SHADERS (PIPE_QUERY_DRIVER_SPECIFIC + 16)
69 #define SVGA_QUERY_NUM_RESOURCES (PIPE_QUERY_DRIVER_SPECIFIC + 17)
70 #define SVGA_QUERY_NUM_STATE_OBJECTS (PIPE_QUERY_DRIVER_SPECIFIC + 18)
71 #define SVGA_QUERY_NUM_SURFACE_VIEWS (PIPE_QUERY_DRIVER_SPECIFIC + 19)
72 #define SVGA_QUERY_NUM_GENERATE_MIPMAP (PIPE_QUERY_DRIVER_SPECIFIC + 20)
73 /*SVGA_QUERY_MAX has to be last because it is size of an array*/
74 #define SVGA_QUERY_MAX (PIPE_QUERY_DRIVER_SPECIFIC + 21)
75
76 /**
77 * Maximum supported number of constant buffers per shader
78 */
79 #define SVGA_MAX_CONST_BUFS 14
80
81 /**
82 * Maximum constant buffer size that can be set in the
83 * DXSetSingleConstantBuffer command is
84 * DX10 constant buffer element count * 4 4-bytes components
85 */
86 #define SVGA_MAX_CONST_BUF_SIZE (4096 * 4 * sizeof(int))
87
88 #define CONST0_UPLOAD_ALIGNMENT 256
89
90 struct draw_vertex_shader;
91 struct draw_fragment_shader;
92 struct svga_shader_variant;
93 struct SVGACmdMemory;
94 struct util_bitmask;
95
96
97 struct svga_cache_context;
98 struct svga_tracked_state;
99
100 struct svga_blend_state {
101 unsigned need_white_fragments:1;
102 unsigned independent_blend_enable:1;
103 unsigned alpha_to_coverage:1;
104 unsigned blend_color_alpha:1; /**< set blend color to alpha value */
105
106 /** Per-render target state */
107 struct {
108 uint8_t writemask;
109
110 boolean blend_enable;
111 uint8_t srcblend;
112 uint8_t dstblend;
113 uint8_t blendeq;
114
115 boolean separate_alpha_blend_enable;
116 uint8_t srcblend_alpha;
117 uint8_t dstblend_alpha;
118 uint8_t blendeq_alpha;
119 } rt[PIPE_MAX_COLOR_BUFS];
120
121 SVGA3dBlendStateId id; /**< vgpu10 */
122 };
123
124 struct svga_depth_stencil_state {
125 unsigned zfunc:8;
126 unsigned zenable:1;
127 unsigned zwriteenable:1;
128
129 unsigned alphatestenable:1;
130 unsigned alphafunc:8;
131
132 struct {
133 unsigned enabled:1;
134 unsigned func:8;
135 unsigned fail:8;
136 unsigned zfail:8;
137 unsigned pass:8;
138 } stencil[2];
139
140 /* SVGA3D has one ref/mask/writemask triple shared between front &
141 * back face stencil. We really need two:
142 */
143 unsigned stencil_mask:8;
144 unsigned stencil_writemask:8;
145
146 float alpharef;
147
148 SVGA3dDepthStencilStateId id; /**< vgpu10 */
149 };
150
151 #define SVGA_UNFILLED_DISABLE 0
152 #define SVGA_UNFILLED_LINE 1
153 #define SVGA_UNFILLED_POINT 2
154
155 #define SVGA_PIPELINE_FLAG_POINTS (1<<PIPE_PRIM_POINTS)
156 #define SVGA_PIPELINE_FLAG_LINES (1<<PIPE_PRIM_LINES)
157 #define SVGA_PIPELINE_FLAG_TRIS (1<<PIPE_PRIM_TRIANGLES)
158
159 struct svga_rasterizer_state {
160 struct pipe_rasterizer_state templ; /* needed for draw module */
161
162 unsigned shademode:8;
163 unsigned cullmode:8;
164 unsigned scissortestenable:1;
165 unsigned multisampleantialias:1;
166 unsigned antialiasedlineenable:1;
167 unsigned lastpixel:1;
168 unsigned pointsprite:1;
169
170 unsigned linepattern;
171
172 float slopescaledepthbias;
173 float depthbias;
174 float pointsize;
175 float linewidth;
176
177 unsigned hw_fillmode:2; /* PIPE_POLYGON_MODE_x */
178
179 /** Which prims do we need help for? Bitmask of (1 << PIPE_PRIM_x) flags */
180 unsigned need_pipeline:16;
181
182 SVGA3dRasterizerStateId id; /**< vgpu10 */
183
184 /** For debugging: */
185 const char* need_pipeline_tris_str;
186 const char* need_pipeline_lines_str;
187 const char* need_pipeline_points_str;
188 };
189
190 struct svga_sampler_state {
191 unsigned mipfilter;
192 unsigned magfilter;
193 unsigned minfilter;
194 unsigned aniso_level;
195 float lod_bias;
196 unsigned addressu;
197 unsigned addressv;
198 unsigned addressw;
199 unsigned bordercolor;
200 unsigned normalized_coords:1;
201 unsigned compare_mode:1;
202 unsigned compare_func:3;
203
204 unsigned min_lod;
205 unsigned view_min_lod;
206 unsigned view_max_lod;
207
208 SVGA3dSamplerId id;
209 };
210
211
212 struct svga_pipe_sampler_view
213 {
214 struct pipe_sampler_view base;
215
216 SVGA3dShaderResourceViewId id;
217 };
218
219
220 static inline struct svga_pipe_sampler_view *
221 svga_pipe_sampler_view(struct pipe_sampler_view *v)
222 {
223 return (struct svga_pipe_sampler_view *) v;
224 }
225
226
227 struct svga_velems_state {
228 unsigned count;
229 struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS];
230 SVGA3dDeclType decl_type[PIPE_MAX_ATTRIBS]; /**< vertex attrib formats */
231
232 /** Bitmasks indicating which attributes need format conversion */
233 unsigned adjust_attrib_range; /**< range adjustment */
234 unsigned attrib_is_pure_int; /**< pure int */
235 unsigned adjust_attrib_w_1; /**< set w = 1 */
236 unsigned adjust_attrib_itof; /**< int->float */
237 unsigned adjust_attrib_utof; /**< uint->float */
238 unsigned attrib_is_bgra; /**< R / B swizzling */
239 unsigned attrib_puint_to_snorm; /**< 10_10_10_2 packed uint -> snorm */
240 unsigned attrib_puint_to_uscaled; /**< 10_10_10_2 packed uint -> uscaled */
241 unsigned attrib_puint_to_sscaled; /**< 10_10_10_2 packed uint -> sscaled */
242
243 boolean need_swvfetch;
244
245 SVGA3dElementLayoutId id; /**< VGPU10 */
246 };
247
248 /* Use to calculate differences between state emitted to hardware and
249 * current driver-calculated state.
250 */
251 struct svga_state
252 {
253 const struct svga_blend_state *blend;
254 const struct svga_depth_stencil_state *depth;
255 const struct svga_rasterizer_state *rast;
256 const struct svga_sampler_state *sampler[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
257 const struct svga_velems_state *velems;
258
259 struct pipe_sampler_view *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS]; /* or texture ID's? */
260 struct svga_fragment_shader *fs;
261 struct svga_vertex_shader *vs;
262 struct svga_geometry_shader *user_gs; /* user-specified GS */
263 struct svga_geometry_shader *gs; /* derived GS */
264
265 struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
266 struct pipe_index_buffer ib;
267 /** Constant buffers for each shader.
268 * The size should probably always match with that of
269 * svga_shader_emitter_v10.num_shader_consts.
270 */
271 struct pipe_constant_buffer constbufs[PIPE_SHADER_TYPES][SVGA_MAX_CONST_BUFS];
272
273 struct pipe_framebuffer_state framebuffer;
274 float depthscale;
275
276 /* Hack to limit the number of different render targets between
277 * flushes. Helps avoid blowing out our surface cache in EXA.
278 */
279 int nr_fbs;
280
281 struct pipe_poly_stipple poly_stipple;
282 struct pipe_scissor_state scissor;
283 struct pipe_blend_color blend_color;
284 struct pipe_stencil_ref stencil_ref;
285 struct pipe_clip_state clip;
286 struct pipe_viewport_state viewport;
287
288 unsigned num_samplers[PIPE_SHADER_TYPES];
289 unsigned num_sampler_views[PIPE_SHADER_TYPES];
290 unsigned num_vertex_buffers;
291 unsigned reduced_prim;
292
293 struct {
294 unsigned flag_1d;
295 unsigned flag_srgb;
296 unsigned flag_rect; /* sampler views with rectangular texture target */
297 unsigned flag_buf; /* sampler views with texture buffer target */
298 } tex_flags;
299
300 unsigned sample_mask;
301 };
302
303 struct svga_prescale {
304 float translate[4];
305 float scale[4];
306 boolean enabled;
307 };
308
309
310 /* Updated by calling svga_update_state( SVGA_STATE_HW_CLEAR )
311 */
312 struct svga_hw_clear_state
313 {
314 SVGA3dRect viewport;
315
316 struct {
317 float zmin, zmax;
318 } depthrange;
319
320 struct pipe_framebuffer_state framebuffer;
321 struct svga_prescale prescale;
322 };
323
324 struct svga_hw_view_state
325 {
326 struct pipe_resource *texture;
327 struct svga_sampler_view *v;
328 unsigned min_lod;
329 unsigned max_lod;
330 boolean dirty;
331 };
332
333 /* Updated by calling svga_update_state( SVGA_STATE_HW_DRAW )
334 */
335 struct svga_hw_draw_state
336 {
337 /** VGPU9 rasterization state */
338 unsigned rs[SVGA3D_RS_MAX];
339 /** VGPU9 texture sampler and bindings state */
340 unsigned ts[SVGA3D_PIXEL_SAMPLERREG_MAX][SVGA3D_TS_MAX];
341 /** VGPU9 texture views */
342 unsigned num_views;
343 struct svga_hw_view_state views[PIPE_MAX_SAMPLERS];
344 /** VGPU9 constant buffer values */
345 float cb[PIPE_SHADER_TYPES][SVGA3D_CONSTREG_MAX][4];
346
347 /** Currently bound shaders */
348 struct svga_shader_variant *fs;
349 struct svga_shader_variant *vs;
350 struct svga_shader_variant *gs;
351
352 /** Currently bound constant buffer, per shader stage */
353 struct pipe_resource *constbuf[PIPE_SHADER_TYPES];
354
355 /** Bitmask of enabled constant buffers */
356 unsigned enabled_constbufs[PIPE_SHADER_TYPES];
357
358 /** VGPU10 HW state (used to prevent emitting redundant state) */
359 SVGA3dDepthStencilStateId depth_stencil_id;
360 unsigned stencil_ref;
361 SVGA3dBlendStateId blend_id;
362 float blend_factor[4];
363 unsigned blend_sample_mask;
364 SVGA3dRasterizerStateId rasterizer_id;
365 SVGA3dElementLayoutId layout_id;
366 SVGA3dPrimitiveType topology;
367
368 /** Vertex buffer state */
369 SVGA3dVertexBuffer vbuffer_attrs[PIPE_MAX_ATTRIBS];
370 struct pipe_resource *vbuffers[PIPE_MAX_ATTRIBS];
371 unsigned num_vbuffers;
372
373 struct pipe_resource *ib; /**< index buffer for drawing */
374 SVGA3dSurfaceFormat ib_format;
375 unsigned ib_offset;
376
377 unsigned num_samplers[PIPE_SHADER_TYPES];
378 SVGA3dSamplerId samplers[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
379
380 unsigned num_sampler_views[PIPE_SHADER_TYPES];
381 struct pipe_sampler_view
382 *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
383
384 unsigned num_rendertargets;
385 struct pipe_surface *rtv[SVGA3D_MAX_RENDER_TARGETS];
386 struct pipe_surface *dsv;
387
388 /* used for rebinding */
389 unsigned default_constbuf_size[PIPE_SHADER_TYPES];
390 };
391
392
393 /* Updated by calling svga_update_state( SVGA_STATE_NEED_SWTNL )
394 */
395 struct svga_sw_state
396 {
397 /* which parts we need */
398 boolean need_swvfetch;
399 boolean need_pipeline;
400 boolean need_swtnl;
401
402 /* Flag to make sure that need sw is on while
403 * updating state within a swtnl call.
404 */
405 boolean in_swtnl_draw;
406 };
407
408
409 /* Queue some state updates (like rss) and submit them to hardware in
410 * a single packet.
411 */
412 struct svga_hw_queue;
413
414 struct svga_query;
415 struct svga_qmem_alloc_entry;
416
417 struct svga_context
418 {
419 struct pipe_context pipe;
420 struct svga_winsys_context *swc;
421 struct blitter_context *blitter;
422 struct u_upload_mgr *const0_upload;
423
424 struct {
425 boolean no_swtnl;
426 boolean force_swtnl;
427 boolean use_min_mipmap;
428
429 /* incremented for each shader */
430 unsigned shader_id;
431
432 unsigned disable_shader;
433
434 boolean no_line_width;
435 boolean force_hw_line_stipple;
436
437 /** To report perf/conformance/etc issues to the state tracker */
438 struct pipe_debug_callback callback;
439 } debug;
440
441 struct {
442 struct draw_context *draw;
443 struct vbuf_render *backend;
444 unsigned hw_prim;
445 boolean new_vbuf;
446 boolean new_vdecl;
447 } swtnl;
448
449 /* Bitmask of blend state objects IDs */
450 struct util_bitmask *blend_object_id_bm;
451
452 /* Bitmask of depth/stencil state objects IDs */
453 struct util_bitmask *ds_object_id_bm;
454
455 /* Bitmaks of input element object IDs */
456 struct util_bitmask *input_element_object_id_bm;
457
458 /* Bitmask of rasterizer object IDs */
459 struct util_bitmask *rast_object_id_bm;
460
461 /* Bitmask of sampler state objects IDs */
462 struct util_bitmask *sampler_object_id_bm;
463
464 /* Bitmask of sampler view IDs */
465 struct util_bitmask *sampler_view_id_bm;
466
467 /* Bitmask of used shader IDs */
468 struct util_bitmask *shader_id_bm;
469
470 /* Bitmask of used surface view IDs */
471 struct util_bitmask *surface_view_id_bm;
472
473 /* Bitmask of used stream output IDs */
474 struct util_bitmask *stream_output_id_bm;
475
476 /* Bitmask of used query IDs */
477 struct util_bitmask *query_id_bm;
478
479 struct {
480 unsigned dirty[SVGA_STATE_MAX];
481
482 /** bitmasks of which const buffers are changed */
483 unsigned dirty_constbufs[PIPE_SHADER_TYPES];
484
485 unsigned texture_timestamp;
486
487 /*
488 */
489 struct svga_sw_state sw;
490 struct svga_hw_draw_state hw_draw;
491 struct svga_hw_clear_state hw_clear;
492 } state;
493
494 struct svga_state curr; /* state from the state tracker */
495 unsigned dirty; /* statechanges since last update_state() */
496
497 union {
498 struct {
499 unsigned rendertargets:1;
500 unsigned texture_samplers:1;
501 unsigned constbufs:1;
502 unsigned vs:1;
503 unsigned fs:1;
504 unsigned gs:1;
505 unsigned query:1;
506 } flags;
507 unsigned val;
508 } rebind;
509
510 struct svga_hwtnl *hwtnl;
511
512 /** Queries states */
513 struct svga_winsys_gb_query *gb_query; /**< gb query object, one per context */
514 unsigned gb_query_len; /**< gb query object size */
515 struct util_bitmask *gb_query_alloc_mask; /**< gb query object allocation mask */
516 struct svga_qmem_alloc_entry *gb_query_map[SVGA_QUERY_MAX];
517 /**< query mem block mapping */
518 struct svga_query *sq[SVGA_QUERY_MAX]; /**< queries currently in progress */
519
520 /** List of buffers with queued transfers */
521 struct list_head dirty_buffers;
522
523 /** performance / info queries for HUD */
524 struct {
525 uint64_t num_draw_calls; /**< SVGA_QUERY_DRAW_CALLS */
526 uint64_t num_fallbacks; /**< SVGA_QUERY_NUM_FALLBACKS */
527 uint64_t num_flushes; /**< SVGA_QUERY_NUM_FLUSHES */
528 uint64_t num_validations; /**< SVGA_QUERY_NUM_VALIDATIONS */
529 uint64_t map_buffer_time; /**< SVGA_QUERY_MAP_BUFFER_TIME */
530 uint64_t num_resources_mapped; /**< SVGA_QUERY_NUM_RESOURCES_MAPPED */
531 uint64_t command_buffer_size; /**< SVGA_QUERY_COMMAND_BUFFER_SIZE */
532 uint64_t flush_time; /**< SVGA_QUERY_FLUSH_TIME */
533 uint64_t surface_write_flushes; /**< SVGA_QUERY_SURFACE_WRITE_FLUSHES */
534 uint64_t num_readbacks; /**< SVGA_QUERY_NUM_READBACKS */
535 uint64_t num_resource_updates; /**< SVGA_QUERY_NUM_RESOURCE_UPDATES */
536 uint64_t num_buffer_uploads; /**< SVGA_QUERY_NUM_BUFFER_UPLOADS */
537 uint64_t num_const_buf_updates; /**< SVGA_QUERY_NUM_CONST_BUF_UPDATES */
538 uint64_t num_const_updates; /**< SVGA_QUERY_NUM_CONST_UPDATES */
539 uint64_t num_shaders; /**< SVGA_QUERY_NUM_SHADERS */
540
541 /** The following are summed for SVGA_QUERY_NUM_STATE_OBJECTS */
542 uint64_t num_blend_objects;
543 uint64_t num_depthstencil_objects;
544 uint64_t num_rasterizer_objects;
545 uint64_t num_sampler_objects;
546 uint64_t num_samplerview_objects;
547 uint64_t num_vertexelement_objects;
548
549 uint64_t num_surface_views; /**< SVGA_QUERY_NUM_SURFACE_VIEWS */
550 uint64_t num_bytes_uploaded; /**< SVGA_QUERY_NUM_BYTES_UPLOADED */
551 uint64_t num_generate_mipmap; /**< SVGA_QUERY_NUM_GENERATE_MIPMAP */
552
553 boolean uses_time; /**< os_time_get() calls needed? */
554 } hud;
555
556 /** The currently bound stream output targets */
557 unsigned num_so_targets;
558 struct svga_winsys_surface *so_surfaces[SVGA3D_DX_MAX_SOTARGETS];
559 struct pipe_stream_output_target *so_targets[SVGA3D_DX_MAX_SOTARGETS];
560 struct svga_stream_output *current_so;
561
562 /** A blend state with blending disabled, for falling back to when blending
563 * is illegal (e.g. an integer texture is bound)
564 */
565 struct svga_blend_state *noop_blend;
566
567 struct {
568 struct pipe_resource *texture;
569 struct svga_pipe_sampler_view *sampler_view;
570 void *sampler;
571 } polygon_stipple;
572
573 /** Alternate rasterizer states created for point sprite */
574 struct svga_rasterizer_state *rasterizer_no_cull[2];
575 };
576
577 /* A flag for each state_tracker state object:
578 */
579 #define SVGA_NEW_BLEND 0x1
580 #define SVGA_NEW_DEPTH_STENCIL_ALPHA 0x2
581 #define SVGA_NEW_RAST 0x4
582 #define SVGA_NEW_SAMPLER 0x8
583 #define SVGA_NEW_TEXTURE 0x10
584 #define SVGA_NEW_VBUFFER 0x20
585 #define SVGA_NEW_VELEMENT 0x40
586 #define SVGA_NEW_FS 0x80
587 #define SVGA_NEW_VS 0x100
588 #define SVGA_NEW_FS_CONST_BUFFER 0x200
589 #define SVGA_NEW_VS_CONST_BUFFER 0x400
590 #define SVGA_NEW_FRAME_BUFFER 0x800
591 #define SVGA_NEW_STIPPLE 0x1000
592 #define SVGA_NEW_SCISSOR 0x2000
593 #define SVGA_NEW_BLEND_COLOR 0x4000
594 #define SVGA_NEW_CLIP 0x8000
595 #define SVGA_NEW_VIEWPORT 0x10000
596 #define SVGA_NEW_PRESCALE 0x20000
597 #define SVGA_NEW_REDUCED_PRIMITIVE 0x40000
598 #define SVGA_NEW_TEXTURE_BINDING 0x80000
599 #define SVGA_NEW_NEED_PIPELINE 0x100000
600 #define SVGA_NEW_NEED_SWVFETCH 0x200000
601 #define SVGA_NEW_NEED_SWTNL 0x400000
602 #define SVGA_NEW_FS_VARIANT 0x800000
603 #define SVGA_NEW_VS_VARIANT 0x1000000
604 #define SVGA_NEW_TEXTURE_FLAGS 0x4000000
605 #define SVGA_NEW_STENCIL_REF 0x8000000
606 #define SVGA_NEW_GS 0x10000000
607 #define SVGA_NEW_GS_CONST_BUFFER 0x20000000
608 #define SVGA_NEW_GS_VARIANT 0x40000000
609 #define SVGA_NEW_TEXTURE_CONSTS 0x80000000
610
611
612
613
614
615 /***********************************************************************
616 * svga_screen_texture.c:
617 */
618 void svga_mark_surfaces_dirty(struct svga_context *svga);
619
620
621
622
623 void svga_init_state_functions( struct svga_context *svga );
624 void svga_init_flush_functions( struct svga_context *svga );
625 void svga_init_string_functions( struct svga_context *svga );
626 void svga_init_blit_functions(struct svga_context *svga);
627
628 void svga_init_blend_functions( struct svga_context *svga );
629 void svga_init_depth_stencil_functions( struct svga_context *svga );
630 void svga_init_misc_functions( struct svga_context *svga );
631 void svga_init_rasterizer_functions( struct svga_context *svga );
632 void svga_init_sampler_functions( struct svga_context *svga );
633 void svga_init_fs_functions( struct svga_context *svga );
634 void svga_init_vs_functions( struct svga_context *svga );
635 void svga_init_gs_functions( struct svga_context *svga );
636 void svga_init_vertex_functions( struct svga_context *svga );
637 void svga_init_constbuffer_functions( struct svga_context *svga );
638 void svga_init_draw_functions( struct svga_context *svga );
639 void svga_init_query_functions( struct svga_context *svga );
640 void svga_init_surface_functions(struct svga_context *svga);
641 void svga_init_stream_output_functions( struct svga_context *svga );
642 void svga_init_clear_functions( struct svga_context *svga );
643
644 void svga_cleanup_vertex_state( struct svga_context *svga );
645 void svga_cleanup_sampler_state( struct svga_context *svga );
646 void svga_cleanup_tss_binding( struct svga_context *svga );
647 void svga_cleanup_framebuffer( struct svga_context *svga );
648
649 void svga_context_flush( struct svga_context *svga,
650 struct pipe_fence_handle **pfence );
651
652 void svga_context_finish(struct svga_context *svga);
653
654 void svga_hwtnl_flush_retry( struct svga_context *svga );
655 void svga_hwtnl_flush_buffer( struct svga_context *svga,
656 struct pipe_resource *buffer );
657
658 void svga_surfaces_flush(struct svga_context *svga);
659
660 struct pipe_context *
661 svga_context_create(struct pipe_screen *screen,
662 void *priv, unsigned flags);
663
664
665 /***********************************************************************
666 * Inline conversion functions. These are better-typed than the
667 * macros used previously:
668 */
669 static inline struct svga_context *
670 svga_context( struct pipe_context *pipe )
671 {
672 return (struct svga_context *)pipe;
673 }
674
675 static inline struct svga_winsys_screen *
676 svga_sws(struct svga_context *svga)
677 {
678 return svga_screen(svga->pipe.screen)->sws;
679 }
680
681 static inline boolean
682 svga_have_gb_objects(const struct svga_context *svga)
683 {
684 return svga_screen(svga->pipe.screen)->sws->have_gb_objects;
685 }
686
687 static inline boolean
688 svga_have_gb_dma(const struct svga_context *svga)
689 {
690 return svga_screen(svga->pipe.screen)->sws->have_gb_dma;
691 }
692
693 static inline boolean
694 svga_have_vgpu10(const struct svga_context *svga)
695 {
696 return svga_screen(svga->pipe.screen)->sws->have_vgpu10;
697 }
698
699 static inline boolean
700 svga_need_to_rebind_resources(const struct svga_context *svga)
701 {
702 return svga_screen(svga->pipe.screen)->sws->need_to_rebind_resources;
703 }
704
705 static inline boolean
706 svga_rects_equal(const SVGA3dRect *r1, const SVGA3dRect *r2)
707 {
708 return memcmp(r1, r2, sizeof(*r1)) == 0;
709 }
710
711 /**
712 * If the Gallium HUD is enabled, this will return the current time.
713 * Otherwise, just return zero.
714 */
715 static inline int64_t
716 svga_get_time(struct svga_context *svga)
717 {
718 return svga->hud.uses_time ? os_time_get() : 0;
719 }
720
721
722 #endif