src/gallium/drivers/svga/svga_context.h

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #ifndef SVGA_CONTEXT_H
  27 #define SVGA_CONTEXT_H
  28
  29
  30 #include "pipe/p_context.h"
  31 #include "pipe/p_defines.h"
  32 #include "pipe/p_state.h"
  33
  34 #include "os/os_time.h"
  35
  36 #include "util/u_blitter.h"
  37 #include "util/list.h"
  38
  39 #include "tgsi/tgsi_scan.h"
  40
  41 #include "svga_screen.h"
  42 #include "svga_state.h"
  43 #include "svga_winsys.h"
  44 #include "svga_hw_reg.h"
  45 #include "svga3d_shaderdefs.h"
  46
  47
  48 /** Non-GPU queries for gallium HUD */
  49 enum svga_hud {
  50 /* per-frame counters */
  51    SVGA_QUERY_NUM_DRAW_CALLS = PIPE_QUERY_DRIVER_SPECIFIC,
  52    SVGA_QUERY_NUM_FALLBACKS,
  53    SVGA_QUERY_NUM_FLUSHES,
  54    SVGA_QUERY_NUM_VALIDATIONS,
  55    SVGA_QUERY_MAP_BUFFER_TIME,
  56    SVGA_QUERY_NUM_BUFFERS_MAPPED,
  57    SVGA_QUERY_NUM_TEXTURES_MAPPED,
  58    SVGA_QUERY_NUM_BYTES_UPLOADED,
  59    SVGA_QUERY_COMMAND_BUFFER_SIZE,
  60    SVGA_QUERY_FLUSH_TIME,
  61    SVGA_QUERY_SURFACE_WRITE_FLUSHES,
  62    SVGA_QUERY_NUM_READBACKS,
  63    SVGA_QUERY_NUM_RESOURCE_UPDATES,
  64    SVGA_QUERY_NUM_BUFFER_UPLOADS,
  65    SVGA_QUERY_NUM_CONST_BUF_UPDATES,
  66    SVGA_QUERY_NUM_CONST_UPDATES,
  67
  68 /* running total counters */
  69    SVGA_QUERY_MEMORY_USED,
  70    SVGA_QUERY_NUM_SHADERS,
  71    SVGA_QUERY_NUM_RESOURCES,
  72    SVGA_QUERY_NUM_STATE_OBJECTS,
  73    SVGA_QUERY_NUM_SURFACE_VIEWS,
  74    SVGA_QUERY_NUM_GENERATE_MIPMAP,
  75
  76 /*SVGA_QUERY_MAX has to be last because it is size of an array*/
  77    SVGA_QUERY_MAX
  78 };
  79
  80 /**
  81  * Maximum supported number of constant buffers per shader
  82  */
  83 #define SVGA_MAX_CONST_BUFS 14
  84
  85 /**
  86  * Maximum constant buffer size that can be set in the
  87  * DXSetSingleConstantBuffer command is
  88  * DX10 constant buffer element count * 4 4-bytes components
  89  */
  90 #define SVGA_MAX_CONST_BUF_SIZE (4096 * 4 * sizeof(int))
  91
  92 #define CONST0_UPLOAD_ALIGNMENT 256
  93
  94 struct draw_vertex_shader;
  95 struct draw_fragment_shader;
  96 struct svga_shader_variant;
  97 struct SVGACmdMemory;
  98 struct util_bitmask;
  99
 100
 101 struct svga_cache_context;
 102 struct svga_tracked_state;
 103
 104 struct svga_blend_state {
 105    unsigned need_white_fragments:1;
 106    unsigned independent_blend_enable:1;
 107    unsigned alpha_to_coverage:1;
 108    unsigned blend_color_alpha:1;  /**< set blend color to alpha value */
 109
 110    /** Per-render target state */
 111    struct {
 112       uint8_t writemask;
 113
 114       boolean blend_enable;
 115       uint8_t srcblend;
 116       uint8_t dstblend;
 117       uint8_t blendeq;
 118
 119       boolean separate_alpha_blend_enable;
 120       uint8_t srcblend_alpha;
 121       uint8_t dstblend_alpha;
 122       uint8_t blendeq_alpha;
 123    } rt[PIPE_MAX_COLOR_BUFS];
 124
 125    SVGA3dBlendStateId id;  /**< vgpu10 */
 126 };
 127
 128 struct svga_depth_stencil_state {
 129    unsigned zfunc:8;
 130    unsigned zenable:1;
 131    unsigned zwriteenable:1;
 132
 133    unsigned alphatestenable:1;
 134    unsigned alphafunc:8;
 135
 136    struct {
 137       unsigned enabled:1;
 138       unsigned func:8;
 139       unsigned fail:8;
 140       unsigned zfail:8;
 141       unsigned pass:8;
 142    } stencil[2];
 143
 144    /* SVGA3D has one ref/mask/writemask triple shared between front &
 145     * back face stencil.  We really need two:
 146     */
 147    unsigned stencil_mask:8;
 148    unsigned stencil_writemask:8;
 149
 150    float    alpharef;
 151
 152    SVGA3dDepthStencilStateId id;  /**< vgpu10 */
 153 };
 154
 155 #define SVGA_UNFILLED_DISABLE 0
 156 #define SVGA_UNFILLED_LINE    1
 157 #define SVGA_UNFILLED_POINT   2
 158
 159 #define SVGA_PIPELINE_FLAG_POINTS   (1<<PIPE_PRIM_POINTS)
 160 #define SVGA_PIPELINE_FLAG_LINES    (1<<PIPE_PRIM_LINES)
 161 #define SVGA_PIPELINE_FLAG_TRIS     (1<<PIPE_PRIM_TRIANGLES)
 162
 163 struct svga_rasterizer_state {
 164    struct pipe_rasterizer_state templ; /* needed for draw module */
 165
 166    unsigned shademode:8;
 167    unsigned cullmode:8;
 168    unsigned scissortestenable:1;
 169    unsigned multisampleantialias:1;
 170    unsigned antialiasedlineenable:1;
 171    unsigned lastpixel:1;
 172    unsigned pointsprite:1;
 173
 174    unsigned linepattern;
 175
 176    float slopescaledepthbias;
 177    float depthbias;
 178    float pointsize;
 179    float linewidth;
 180
 181    unsigned hw_fillmode:2;         /* PIPE_POLYGON_MODE_x */
 182
 183    /** Which prims do we need help for?  Bitmask of (1 << PIPE_PRIM_x) flags */
 184    unsigned need_pipeline:16;
 185
 186    SVGA3dRasterizerStateId id;    /**< vgpu10 */
 187
 188    /** For debugging: */
 189    const char* need_pipeline_tris_str;
 190    const char* need_pipeline_lines_str;
 191    const char* need_pipeline_points_str;
 192 };
 193
 194 struct svga_sampler_state {
 195    unsigned mipfilter;
 196    unsigned magfilter;
 197    unsigned minfilter;
 198    unsigned aniso_level;
 199    float lod_bias;
 200    unsigned addressu;
 201    unsigned addressv;
 202    unsigned addressw;
 203    unsigned bordercolor;
 204    unsigned normalized_coords:1;
 205    unsigned compare_mode:1;
 206    unsigned compare_func:3;
 207
 208    unsigned min_lod;
 209    unsigned view_min_lod;
 210    unsigned view_max_lod;
 211
 212    SVGA3dSamplerId id;
 213 };
 214
 215
 216 struct svga_pipe_sampler_view
 217 {
 218    struct pipe_sampler_view base;
 219
 220    SVGA3dShaderResourceViewId id;
 221 };
 222
 223
 224 static inline struct svga_pipe_sampler_view *
 225 svga_pipe_sampler_view(struct pipe_sampler_view *v)
 226 {
 227    return (struct svga_pipe_sampler_view *) v;
 228 }
 229
 230
 231 struct svga_velems_state {
 232    unsigned count;
 233    struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS];
 234    SVGA3dDeclType decl_type[PIPE_MAX_ATTRIBS]; /**< vertex attrib formats */
 235
 236    /** Bitmasks indicating which attributes need format conversion */
 237    unsigned adjust_attrib_range;     /**< range adjustment */
 238    unsigned attrib_is_pure_int;      /**< pure int */
 239    unsigned adjust_attrib_w_1;       /**< set w = 1 */
 240    unsigned adjust_attrib_itof;      /**< int->float */
 241    unsigned adjust_attrib_utof;      /**< uint->float */
 242    unsigned attrib_is_bgra;          /**< R / B swizzling */
 243    unsigned attrib_puint_to_snorm;   /**< 10_10_10_2 packed uint -> snorm */
 244    unsigned attrib_puint_to_uscaled; /**< 10_10_10_2 packed uint -> uscaled */
 245    unsigned attrib_puint_to_sscaled; /**< 10_10_10_2 packed uint -> sscaled */
 246
 247    boolean need_swvfetch;
 248
 249    SVGA3dElementLayoutId id; /**< VGPU10 */
 250 };
 251
 252
 253 /* Use to calculate differences between state emitted to hardware and
 254  * current driver-calculated state.
 255  */
 256 struct svga_state
 257 {
 258    const struct svga_blend_state *blend;
 259    const struct svga_depth_stencil_state *depth;
 260    const struct svga_rasterizer_state *rast;
 261    const struct svga_sampler_state *sampler[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
 262    const struct svga_velems_state *velems;
 263
 264    struct pipe_sampler_view *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS]; /* or texture ID's? */
 265    struct svga_fragment_shader *fs;
 266    struct svga_vertex_shader *vs;
 267    struct svga_geometry_shader *user_gs; /* user-specified GS */
 268    struct svga_geometry_shader *gs;      /* derived GS */
 269
 270    struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
 271    /** Constant buffers for each shader.
 272     * The size should probably always match with that of
 273     * svga_shader_emitter_v10.num_shader_consts.
 274     */
 275    struct pipe_constant_buffer constbufs[PIPE_SHADER_TYPES][SVGA_MAX_CONST_BUFS];
 276
 277    struct pipe_framebuffer_state framebuffer;
 278    float depthscale;
 279
 280    /* Hack to limit the number of different render targets between
 281     * flushes.  Helps avoid blowing out our surface cache in EXA.
 282     */
 283    int nr_fbs;
 284
 285    struct pipe_poly_stipple poly_stipple;
 286    struct pipe_scissor_state scissor;
 287    struct pipe_blend_color blend_color;
 288    struct pipe_stencil_ref stencil_ref;
 289    struct pipe_clip_state clip;
 290    struct pipe_viewport_state viewport;
 291
 292    unsigned num_samplers[PIPE_SHADER_TYPES];
 293    unsigned num_sampler_views[PIPE_SHADER_TYPES];
 294    unsigned num_vertex_buffers;
 295    enum pipe_prim_type reduced_prim;
 296
 297    struct {
 298       unsigned flag_1d;
 299       unsigned flag_srgb;
 300       unsigned flag_rect;  /* sampler views with rectangular texture target */
 301       unsigned flag_buf;   /* sampler views with texture buffer target */
 302    } tex_flags;
 303
 304    unsigned sample_mask;
 305 };
 306
 307 struct svga_prescale {
 308    float translate[4];
 309    float scale[4];
 310    boolean enabled;
 311 };
 312
 313
 314 /* Updated by calling svga_update_state( SVGA_STATE_HW_CLEAR )
 315  */
 316 struct svga_hw_clear_state
 317 {
 318    SVGA3dRect viewport;
 319
 320    struct {
 321       float zmin, zmax;
 322    } depthrange;
 323
 324    struct pipe_framebuffer_state framebuffer;
 325    struct svga_prescale prescale;
 326
 327    /* VGPU10 state */
 328    unsigned num_rendertargets;
 329    struct pipe_surface *rtv[SVGA3D_MAX_RENDER_TARGETS];
 330    struct pipe_surface *dsv;
 331 };
 332
 333 struct svga_hw_view_state
 334 {
 335    struct pipe_resource *texture;
 336    struct svga_sampler_view *v;
 337    unsigned min_lod;
 338    unsigned max_lod;
 339    boolean dirty;
 340 };
 341
 342 /* Updated by calling svga_update_state( SVGA_STATE_HW_DRAW )
 343  */
 344 struct svga_hw_draw_state
 345 {
 346    /** VGPU9 rasterization state */
 347    unsigned rs[SVGA3D_RS_MAX];
 348    /** VGPU9 texture sampler and bindings state */
 349    unsigned ts[SVGA3D_PIXEL_SAMPLERREG_MAX][SVGA3D_TS_MAX];
 350    /** VGPU9 texture views */
 351    unsigned num_views;
 352    struct svga_hw_view_state views[PIPE_MAX_SAMPLERS];
 353    /** VGPU9 constant buffer values */
 354    float cb[PIPE_SHADER_TYPES][SVGA3D_CONSTREG_MAX][4];
 355
 356    /** Currently bound shaders */
 357    struct svga_shader_variant *fs;
 358    struct svga_shader_variant *vs;
 359    struct svga_shader_variant *gs;
 360
 361    /** Currently bound constant buffer, per shader stage */
 362    struct pipe_resource *constbuf[PIPE_SHADER_TYPES];
 363
 364    /** Bitmask of enabled constant buffers */
 365    unsigned enabled_constbufs[PIPE_SHADER_TYPES];
 366
 367    /**
 368     * These are used to reduce the number of times we call u_upload_unmap()
 369     * while updating the zero-th/default VGPU10 constant buffer.
 370     */
 371    struct pipe_resource *const0_buffer;
 372    struct svga_winsys_surface *const0_handle;
 373
 374    /** VGPU10 HW state (used to prevent emitting redundant state) */
 375    SVGA3dDepthStencilStateId depth_stencil_id;
 376    unsigned stencil_ref;
 377    SVGA3dBlendStateId blend_id;
 378    float blend_factor[4];
 379    unsigned blend_sample_mask;
 380    SVGA3dRasterizerStateId rasterizer_id;
 381    SVGA3dElementLayoutId layout_id;
 382    SVGA3dPrimitiveType topology;
 383
 384    /** Vertex buffer state */
 385    SVGA3dVertexBuffer vbuffer_attrs[PIPE_MAX_ATTRIBS];
 386    struct pipe_resource *vbuffers[PIPE_MAX_ATTRIBS];
 387    unsigned num_vbuffers;
 388
 389    struct pipe_resource *ib;  /**< index buffer for drawing */
 390    SVGA3dSurfaceFormat ib_format;
 391    unsigned ib_offset;
 392
 393    unsigned num_samplers[PIPE_SHADER_TYPES];
 394    SVGA3dSamplerId samplers[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
 395
 396    unsigned num_sampler_views[PIPE_SHADER_TYPES];
 397    struct pipe_sampler_view
 398       *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
 399
 400    /* used for rebinding */
 401    unsigned default_constbuf_size[PIPE_SHADER_TYPES];
 402
 403    boolean rasterizer_discard; /* set if rasterization is disabled */
 404    boolean has_backed_views;   /* set if any of the rtv/dsv is a backed surface view */
 405 };
 406
 407
 408 /* Updated by calling svga_update_state( SVGA_STATE_NEED_SWTNL )
 409  */
 410 struct svga_sw_state
 411 {
 412    /* which parts we need */
 413    boolean need_swvfetch;
 414    boolean need_pipeline;
 415    boolean need_swtnl;
 416
 417    /* Flag to make sure that need sw is on while
 418     * updating state within a swtnl call.
 419     */
 420    boolean in_swtnl_draw;
 421 };
 422
 423
 424 /* Queue some state updates (like rss) and submit them to hardware in
 425  * a single packet.
 426  */
 427 struct svga_hw_queue;
 428
 429 struct svga_query;
 430 struct svga_qmem_alloc_entry;
 431
 432 struct svga_context
 433 {
 434    struct pipe_context pipe;
 435    struct svga_winsys_context *swc;
 436    struct blitter_context *blitter;
 437    struct u_upload_mgr *const0_upload;
 438    struct u_upload_mgr *tex_upload;
 439
 440    struct {
 441       boolean no_swtnl;
 442       boolean force_swtnl;
 443       boolean use_min_mipmap;
 444
 445       /* incremented for each shader */
 446       unsigned shader_id;
 447
 448       boolean no_line_width;
 449       boolean force_hw_line_stipple;
 450
 451       /** To report perf/conformance/etc issues to the state tracker */
 452       struct pipe_debug_callback callback;
 453    } debug;
 454
 455    struct {
 456       struct draw_context *draw;
 457       struct vbuf_render *backend;
 458       unsigned hw_prim;
 459       boolean new_vbuf;
 460       boolean new_vdecl;
 461    } swtnl;
 462
 463    /* Bitmask of blend state objects IDs */
 464    struct util_bitmask *blend_object_id_bm;
 465
 466    /* Bitmask of depth/stencil state objects IDs */
 467    struct util_bitmask *ds_object_id_bm;
 468
 469    /* Bitmaks of input element object IDs */
 470    struct util_bitmask *input_element_object_id_bm;
 471
 472    /* Bitmask of rasterizer object IDs */
 473    struct util_bitmask *rast_object_id_bm;
 474
 475    /* Bitmask of sampler state objects IDs */
 476    struct util_bitmask *sampler_object_id_bm;
 477
 478    /* Bitmask of sampler view IDs */
 479    struct util_bitmask *sampler_view_id_bm;
 480
 481    /* Bitmask of used shader IDs */
 482    struct util_bitmask *shader_id_bm;
 483
 484    /* Bitmask of used surface view IDs */
 485    struct util_bitmask *surface_view_id_bm;
 486
 487    /* Bitmask of used stream output IDs */
 488    struct util_bitmask *stream_output_id_bm;
 489
 490    /* Bitmask of used query IDs */
 491    struct util_bitmask *query_id_bm;
 492
 493    struct {
 494       unsigned dirty[SVGA_STATE_MAX];
 495
 496       /** bitmasks of which const buffers are changed */
 497       unsigned dirty_constbufs[PIPE_SHADER_TYPES];
 498
 499       unsigned texture_timestamp;
 500
 501       struct svga_sw_state          sw;
 502       struct svga_hw_draw_state     hw_draw;
 503       struct svga_hw_clear_state    hw_clear;
 504    } state;
 505
 506    struct svga_state curr;      /* state from the state tracker */
 507    unsigned dirty;              /* statechanges since last update_state() */
 508
 509    union {
 510       struct {
 511          unsigned rendertargets:1;
 512          unsigned texture_samplers:1;
 513          unsigned constbufs:1;
 514          unsigned vs:1;
 515          unsigned fs:1;
 516          unsigned gs:1;
 517          unsigned query:1;
 518       } flags;
 519       unsigned val;
 520    } rebind;
 521
 522    struct svga_hwtnl *hwtnl;
 523
 524    /** Queries states */
 525    struct svga_winsys_gb_query *gb_query;     /**< gb query object, one per context */
 526    unsigned gb_query_len;                     /**< gb query object size */
 527    struct util_bitmask *gb_query_alloc_mask;  /**< gb query object allocation mask */
 528    struct svga_qmem_alloc_entry *gb_query_map[SVGA_QUERY_MAX];
 529                                               /**< query mem block mapping */
 530    struct svga_query *sq[SVGA_QUERY_MAX];     /**< queries currently in progress */
 531
 532    /** List of buffers with queued transfers */
 533    struct list_head dirty_buffers;
 534
 535    /** performance / info queries for HUD */
 536    struct {
 537       uint64_t num_draw_calls;          /**< SVGA_QUERY_DRAW_CALLS */
 538       uint64_t num_fallbacks;           /**< SVGA_QUERY_NUM_FALLBACKS */
 539       uint64_t num_flushes;             /**< SVGA_QUERY_NUM_FLUSHES */
 540       uint64_t num_validations;         /**< SVGA_QUERY_NUM_VALIDATIONS */
 541       uint64_t map_buffer_time;         /**< SVGA_QUERY_MAP_BUFFER_TIME */
 542       uint64_t num_buffers_mapped;      /**< SVGA_QUERY_NUM_BUFFERS_MAPPED */
 543       uint64_t num_textures_mapped;     /**< SVGA_QUERY_NUM_TEXTURES_MAPPED */
 544       uint64_t command_buffer_size;     /**< SVGA_QUERY_COMMAND_BUFFER_SIZE */
 545       uint64_t flush_time;              /**< SVGA_QUERY_FLUSH_TIME */
 546       uint64_t surface_write_flushes;   /**< SVGA_QUERY_SURFACE_WRITE_FLUSHES */
 547       uint64_t num_readbacks;           /**< SVGA_QUERY_NUM_READBACKS */
 548       uint64_t num_resource_updates;    /**< SVGA_QUERY_NUM_RESOURCE_UPDATES */
 549       uint64_t num_buffer_uploads;      /**< SVGA_QUERY_NUM_BUFFER_UPLOADS */
 550       uint64_t num_const_buf_updates;   /**< SVGA_QUERY_NUM_CONST_BUF_UPDATES */
 551       uint64_t num_const_updates;       /**< SVGA_QUERY_NUM_CONST_UPDATES */
 552       uint64_t num_shaders;             /**< SVGA_QUERY_NUM_SHADERS */
 553
 554       /** The following are summed for SVGA_QUERY_NUM_STATE_OBJECTS */
 555       uint64_t num_blend_objects;
 556       uint64_t num_depthstencil_objects;
 557       uint64_t num_rasterizer_objects;
 558       uint64_t num_sampler_objects;
 559       uint64_t num_samplerview_objects;
 560       uint64_t num_vertexelement_objects;
 561
 562       uint64_t num_surface_views;       /**< SVGA_QUERY_NUM_SURFACE_VIEWS */
 563       uint64_t num_bytes_uploaded;      /**< SVGA_QUERY_NUM_BYTES_UPLOADED */
 564       uint64_t num_generate_mipmap;     /**< SVGA_QUERY_NUM_GENERATE_MIPMAP */
 565
 566       boolean uses_time;                /**< os_time_get() calls needed? */
 567    } hud;
 568
 569    /** The currently bound stream output targets */
 570    unsigned num_so_targets;
 571    struct svga_winsys_surface *so_surfaces[SVGA3D_DX_MAX_SOTARGETS];
 572    struct pipe_stream_output_target *so_targets[SVGA3D_DX_MAX_SOTARGETS];
 573    struct svga_stream_output *current_so;
 574
 575    /** A blend state with blending disabled, for falling back to when blending
 576     * is illegal (e.g. an integer texture is bound)
 577     */
 578    struct svga_blend_state *noop_blend;
 579
 580    struct {
 581       struct pipe_resource *texture;
 582       struct svga_pipe_sampler_view *sampler_view;
 583       void *sampler;
 584    } polygon_stipple;
 585
 586    /** Alternate rasterizer states created for point sprite */
 587    struct svga_rasterizer_state *rasterizer_no_cull[2];
 588
 589    /** Depth stencil state created to disable depth stencil test */
 590    struct svga_depth_stencil_state *depthstencil_disable;
 591
 592    /** Current conditional rendering predicate */
 593    struct {
 594       SVGA3dQueryId query_id;
 595       boolean cond;
 596    } pred;
 597
 598    boolean render_condition;
 599    boolean disable_rasterizer; /* Set if to disable rasterization */
 600 };
 601
 602 /* A flag for each state_tracker state object:
 603  */
 604 #define SVGA_NEW_BLEND               0x1
 605 #define SVGA_NEW_DEPTH_STENCIL_ALPHA 0x2
 606 #define SVGA_NEW_RAST                0x4
 607 #define SVGA_NEW_SAMPLER             0x8
 608 #define SVGA_NEW_TEXTURE             0x10
 609 #define SVGA_NEW_VBUFFER             0x20
 610 #define SVGA_NEW_VELEMENT            0x40
 611 #define SVGA_NEW_FS                  0x80
 612 #define SVGA_NEW_VS                  0x100
 613 #define SVGA_NEW_FS_CONST_BUFFER     0x200
 614 #define SVGA_NEW_VS_CONST_BUFFER     0x400
 615 #define SVGA_NEW_FRAME_BUFFER        0x800
 616 #define SVGA_NEW_STIPPLE             0x1000
 617 #define SVGA_NEW_SCISSOR             0x2000
 618 #define SVGA_NEW_BLEND_COLOR         0x4000
 619 #define SVGA_NEW_CLIP                0x8000
 620 #define SVGA_NEW_VIEWPORT            0x10000
 621 #define SVGA_NEW_PRESCALE            0x20000
 622 #define SVGA_NEW_REDUCED_PRIMITIVE   0x40000
 623 #define SVGA_NEW_TEXTURE_BINDING     0x80000
 624 #define SVGA_NEW_NEED_PIPELINE       0x100000
 625 #define SVGA_NEW_NEED_SWVFETCH       0x200000
 626 #define SVGA_NEW_NEED_SWTNL          0x400000
 627 #define SVGA_NEW_FS_VARIANT          0x800000
 628 #define SVGA_NEW_VS_VARIANT          0x1000000
 629 #define SVGA_NEW_TEXTURE_FLAGS       0x4000000
 630 #define SVGA_NEW_STENCIL_REF         0x8000000
 631 #define SVGA_NEW_GS                  0x10000000
 632 #define SVGA_NEW_GS_CONST_BUFFER     0x20000000
 633 #define SVGA_NEW_GS_VARIANT          0x40000000
 634 #define SVGA_NEW_TEXTURE_CONSTS      0x80000000
 635
 636
 637 void svga_init_state_functions( struct svga_context *svga );
 638 void svga_init_flush_functions( struct svga_context *svga );
 639 void svga_init_string_functions( struct svga_context *svga );
 640 void svga_init_blit_functions(struct svga_context *svga);
 641
 642 void svga_init_blend_functions( struct svga_context *svga );
 643 void svga_init_depth_stencil_functions( struct svga_context *svga );
 644 void svga_init_misc_functions( struct svga_context *svga );
 645 void svga_init_rasterizer_functions( struct svga_context *svga );
 646 void svga_init_sampler_functions( struct svga_context *svga );
 647 void svga_init_fs_functions( struct svga_context *svga );
 648 void svga_init_vs_functions( struct svga_context *svga );
 649 void svga_init_gs_functions( struct svga_context *svga );
 650 void svga_init_vertex_functions( struct svga_context *svga );
 651 void svga_init_constbuffer_functions( struct svga_context *svga );
 652 void svga_init_draw_functions( struct svga_context *svga );
 653 void svga_init_query_functions( struct svga_context *svga );
 654 void svga_init_surface_functions(struct svga_context *svga);
 655 void svga_init_stream_output_functions( struct svga_context *svga );
 656 void svga_init_clear_functions( struct svga_context *svga );
 657
 658 void svga_cleanup_vertex_state( struct svga_context *svga );
 659 void svga_cleanup_sampler_state( struct svga_context *svga );
 660 void svga_cleanup_tss_binding( struct svga_context *svga );
 661 void svga_cleanup_framebuffer( struct svga_context *svga );
 662
 663 void svga_context_flush( struct svga_context *svga,
 664                          struct pipe_fence_handle **pfence );
 665
 666 void svga_context_finish(struct svga_context *svga);
 667
 668 void svga_hwtnl_flush_retry( struct svga_context *svga );
 669 void svga_hwtnl_flush_buffer( struct svga_context *svga,
 670                               struct pipe_resource *buffer );
 671
 672 void svga_surfaces_flush(struct svga_context *svga);
 673
 674 struct pipe_context *
 675 svga_context_create(struct pipe_screen *screen,
 676                     void *priv, unsigned flags);
 677
 678
 679 /***********************************************************************
 680  * Inline conversion functions.  These are better-typed than the
 681  * macros used previously:
 682  */
 683 static inline struct svga_context *
 684 svga_context( struct pipe_context *pipe )
 685 {
 686    return (struct svga_context *)pipe;
 687 }
 688
 689 static inline struct svga_winsys_screen *
 690 svga_sws(struct svga_context *svga)
 691 {
 692    return svga_screen(svga->pipe.screen)->sws;
 693 }
 694
 695 static inline boolean
 696 svga_have_gb_objects(const struct svga_context *svga)
 697 {
 698    return svga_screen(svga->pipe.screen)->sws->have_gb_objects;
 699 }
 700
 701 static inline boolean
 702 svga_have_gb_dma(const struct svga_context *svga)
 703 {
 704    return svga_screen(svga->pipe.screen)->sws->have_gb_dma;
 705 }
 706
 707 static inline boolean
 708 svga_have_vgpu10(const struct svga_context *svga)
 709 {
 710    return svga_screen(svga->pipe.screen)->sws->have_vgpu10;
 711 }
 712
 713 static inline boolean
 714 svga_need_to_rebind_resources(const struct svga_context *svga)
 715 {
 716    return svga_screen(svga->pipe.screen)->sws->need_to_rebind_resources;
 717 }
 718
 719 static inline boolean
 720 svga_rects_equal(const SVGA3dRect *r1, const SVGA3dRect *r2)
 721 {
 722    return memcmp(r1, r2, sizeof(*r1)) == 0;
 723 }
 724
 725 /**
 726  * If the Gallium HUD is enabled, this will return the current time.
 727  * Otherwise, just return zero.
 728  */
 729 static inline int64_t
 730 svga_get_time(struct svga_context *svga)
 731 {
 732    return svga->hud.uses_time ? os_time_get() : 0;
 733 }
 734
 735
 736 #endif