src/gallium/drivers/svga/svga_context.h

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #ifndef SVGA_CONTEXT_H
  27 #define SVGA_CONTEXT_H
  28
  29
  30 #include "pipe/p_context.h"
  31 #include "pipe/p_defines.h"
  32 #include "pipe/p_state.h"
  33
  34 #include "util/u_blitter.h"
  35 #include "util/list.h"
  36
  37 #include "tgsi/tgsi_scan.h"
  38
  39 #include "svga_screen.h"
  40 #include "svga_state.h"
  41 #include "svga_winsys.h"
  42 #include "svga_hw_reg.h"
  43 #include "svga3d_shaderdefs.h"
  44
  45
  46 /** Non-GPU queries for gallium HUD */
  47 /* per-frame counters */
  48 #define SVGA_QUERY_NUM_DRAW_CALLS          (PIPE_QUERY_DRIVER_SPECIFIC + 0)
  49 #define SVGA_QUERY_NUM_FALLBACKS           (PIPE_QUERY_DRIVER_SPECIFIC + 1)
  50 #define SVGA_QUERY_NUM_FLUSHES             (PIPE_QUERY_DRIVER_SPECIFIC + 2)
  51 #define SVGA_QUERY_NUM_VALIDATIONS         (PIPE_QUERY_DRIVER_SPECIFIC + 3)
  52 #define SVGA_QUERY_MAP_BUFFER_TIME         (PIPE_QUERY_DRIVER_SPECIFIC + 4)
  53 #define SVGA_QUERY_NUM_RESOURCES_MAPPED    (PIPE_QUERY_DRIVER_SPECIFIC + 5)
  54 #define SVGA_QUERY_NUM_BYTES_UPLOADED      (PIPE_QUERY_DRIVER_SPECIFIC + 6)
  55 #define SVGA_QUERY_COMMAND_BUFFER_SIZE     (PIPE_QUERY_DRIVER_SPECIFIC + 7)
  56 #define SVGA_QUERY_FLUSH_TIME              (PIPE_QUERY_DRIVER_SPECIFIC + 8)
  57 #define SVGA_QUERY_SURFACE_WRITE_FLUSHES   (PIPE_QUERY_DRIVER_SPECIFIC + 9)
  58 #define SVGA_QUERY_NUM_READBACKS           (PIPE_QUERY_DRIVER_SPECIFIC + 10)
  59
  60 /* running total counters */
  61 #define SVGA_QUERY_MEMORY_USED             (PIPE_QUERY_DRIVER_SPECIFIC + 11)
  62 #define SVGA_QUERY_NUM_SHADERS             (PIPE_QUERY_DRIVER_SPECIFIC + 12)
  63 #define SVGA_QUERY_NUM_RESOURCES           (PIPE_QUERY_DRIVER_SPECIFIC + 13)
  64 #define SVGA_QUERY_NUM_STATE_OBJECTS       (PIPE_QUERY_DRIVER_SPECIFIC + 14)
  65 #define SVGA_QUERY_NUM_SURFACE_VIEWS       (PIPE_QUERY_DRIVER_SPECIFIC + 15)
  66 #define SVGA_QUERY_NUM_GENERATE_MIPMAP     (PIPE_QUERY_DRIVER_SPECIFIC + 16)
  67 /*SVGA_QUERY_MAX has to be last because it is size of an array*/
  68 #define SVGA_QUERY_MAX                     (PIPE_QUERY_DRIVER_SPECIFIC + 17)
  69
  70 /**
  71  * Maximum supported number of constant buffers per shader
  72  */
  73 #define SVGA_MAX_CONST_BUFS 14
  74
  75 /**
  76  * Maximum constant buffer size that can be set in the
  77  * DXSetSingleConstantBuffer command is
  78  * DX10 constant buffer element count * 4 4-bytes components
  79  */
  80 #define SVGA_MAX_CONST_BUF_SIZE (4096 * 4 * sizeof(int))
  81
  82 #define CONST0_UPLOAD_ALIGNMENT 256
  83
  84 struct draw_vertex_shader;
  85 struct draw_fragment_shader;
  86 struct svga_shader_variant;
  87 struct SVGACmdMemory;
  88 struct util_bitmask;
  89
  90
  91 struct svga_cache_context;
  92 struct svga_tracked_state;
  93
  94 struct svga_blend_state {
  95    unsigned need_white_fragments:1;
  96    unsigned independent_blend_enable:1;
  97    unsigned alpha_to_coverage:1;
  98    unsigned blend_color_alpha:1;  /**< set blend color to alpha value */
  99
 100    /** Per-render target state */
 101    struct {
 102       uint8_t writemask;
 103
 104       boolean blend_enable;
 105       uint8_t srcblend;
 106       uint8_t dstblend;
 107       uint8_t blendeq;
 108
 109       boolean separate_alpha_blend_enable;
 110       uint8_t srcblend_alpha;
 111       uint8_t dstblend_alpha;
 112       uint8_t blendeq_alpha;
 113    } rt[PIPE_MAX_COLOR_BUFS];
 114
 115    SVGA3dBlendStateId id;  /**< vgpu10 */
 116 };
 117
 118 struct svga_depth_stencil_state {
 119    unsigned zfunc:8;
 120    unsigned zenable:1;
 121    unsigned zwriteenable:1;
 122
 123    unsigned alphatestenable:1;
 124    unsigned alphafunc:8;
 125
 126    struct {
 127       unsigned enabled:1;
 128       unsigned func:8;
 129       unsigned fail:8;
 130       unsigned zfail:8;
 131       unsigned pass:8;
 132    } stencil[2];
 133
 134    /* SVGA3D has one ref/mask/writemask triple shared between front &
 135     * back face stencil.  We really need two:
 136     */
 137    unsigned stencil_mask:8;
 138    unsigned stencil_writemask:8;
 139
 140    float    alpharef;
 141
 142    SVGA3dDepthStencilStateId id;  /**< vgpu10 */
 143 };
 144
 145 #define SVGA_UNFILLED_DISABLE 0
 146 #define SVGA_UNFILLED_LINE    1
 147 #define SVGA_UNFILLED_POINT   2
 148
 149 #define SVGA_PIPELINE_FLAG_POINTS   (1<<PIPE_PRIM_POINTS)
 150 #define SVGA_PIPELINE_FLAG_LINES    (1<<PIPE_PRIM_LINES)
 151 #define SVGA_PIPELINE_FLAG_TRIS     (1<<PIPE_PRIM_TRIANGLES)
 152
 153 struct svga_rasterizer_state {
 154    struct pipe_rasterizer_state templ; /* needed for draw module */
 155
 156    unsigned shademode:8;
 157    unsigned cullmode:8;
 158    unsigned scissortestenable:1;
 159    unsigned multisampleantialias:1;
 160    unsigned antialiasedlineenable:1;
 161    unsigned lastpixel:1;
 162    unsigned pointsprite:1;
 163
 164    unsigned linepattern;
 165
 166    float slopescaledepthbias;
 167    float depthbias;
 168    float pointsize;
 169    float linewidth;
 170
 171    unsigned hw_fillmode:2;         /* PIPE_POLYGON_MODE_x */
 172
 173    /** Which prims do we need help for?  Bitmask of (1 << PIPE_PRIM_x) flags */
 174    unsigned need_pipeline:16;
 175
 176    SVGA3dRasterizerStateId id;    /**< vgpu10 */
 177
 178    /** For debugging: */
 179    const char* need_pipeline_tris_str;
 180    const char* need_pipeline_lines_str;
 181    const char* need_pipeline_points_str;
 182 };
 183
 184 struct svga_sampler_state {
 185    unsigned mipfilter;
 186    unsigned magfilter;
 187    unsigned minfilter;
 188    unsigned aniso_level;
 189    float lod_bias;
 190    unsigned addressu;
 191    unsigned addressv;
 192    unsigned addressw;
 193    unsigned bordercolor;
 194    unsigned normalized_coords:1;
 195    unsigned compare_mode:1;
 196    unsigned compare_func:3;
 197
 198    unsigned min_lod;
 199    unsigned view_min_lod;
 200    unsigned view_max_lod;
 201
 202    SVGA3dSamplerId id;
 203 };
 204
 205
 206 struct svga_pipe_sampler_view
 207 {
 208    struct pipe_sampler_view base;
 209
 210    SVGA3dShaderResourceViewId id;
 211 };
 212
 213
 214 static inline struct svga_pipe_sampler_view *
 215 svga_pipe_sampler_view(struct pipe_sampler_view *v)
 216 {
 217    return (struct svga_pipe_sampler_view *) v;
 218 }
 219
 220
 221 struct svga_velems_state {
 222    unsigned count;
 223    struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS];
 224    SVGA3dDeclType decl_type[PIPE_MAX_ATTRIBS]; /**< vertex attrib formats */
 225
 226    /** Bitmasks indicating which attributes need format conversion */
 227    unsigned adjust_attrib_range;     /**< range adjustment */
 228    unsigned attrib_is_pure_int;      /**< pure int */
 229    unsigned adjust_attrib_w_1;       /**< set w = 1 */
 230    unsigned adjust_attrib_itof;      /**< int->float */
 231    unsigned adjust_attrib_utof;      /**< uint->float */
 232    unsigned attrib_is_bgra;          /**< R / B swizzling */
 233    unsigned attrib_puint_to_snorm;   /**< 10_10_10_2 packed uint -> snorm */
 234    unsigned attrib_puint_to_uscaled; /**< 10_10_10_2 packed uint -> uscaled */
 235    unsigned attrib_puint_to_sscaled; /**< 10_10_10_2 packed uint -> sscaled */
 236
 237    boolean need_swvfetch;
 238
 239    SVGA3dElementLayoutId id; /**< VGPU10 */
 240 };
 241
 242 /* Use to calculate differences between state emitted to hardware and
 243  * current driver-calculated state.
 244  */
 245 struct svga_state
 246 {
 247    const struct svga_blend_state *blend;
 248    const struct svga_depth_stencil_state *depth;
 249    const struct svga_rasterizer_state *rast;
 250    const struct svga_sampler_state *sampler[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
 251    const struct svga_velems_state *velems;
 252
 253    struct pipe_sampler_view *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS]; /* or texture ID's? */
 254    struct svga_fragment_shader *fs;
 255    struct svga_vertex_shader *vs;
 256    struct svga_geometry_shader *user_gs; /* user-specified GS */
 257    struct svga_geometry_shader *gs;      /* derived GS */
 258
 259    struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
 260    struct pipe_index_buffer ib;
 261    /** Constant buffers for each shader.
 262     * The size should probably always match with that of
 263     * svga_shader_emitter_v10.num_shader_consts.
 264     */
 265    struct pipe_constant_buffer constbufs[PIPE_SHADER_TYPES][SVGA_MAX_CONST_BUFS];
 266
 267    struct pipe_framebuffer_state framebuffer;
 268    float depthscale;
 269
 270    /* Hack to limit the number of different render targets between
 271     * flushes.  Helps avoid blowing out our surface cache in EXA.
 272     */
 273    int nr_fbs;
 274
 275    struct pipe_poly_stipple poly_stipple;
 276    struct pipe_scissor_state scissor;
 277    struct pipe_blend_color blend_color;
 278    struct pipe_stencil_ref stencil_ref;
 279    struct pipe_clip_state clip;
 280    struct pipe_viewport_state viewport;
 281
 282    unsigned num_samplers[PIPE_SHADER_TYPES];
 283    unsigned num_sampler_views[PIPE_SHADER_TYPES];
 284    unsigned num_vertex_buffers;
 285    unsigned reduced_prim;
 286
 287    struct {
 288       unsigned flag_1d;
 289       unsigned flag_srgb;
 290    } tex_flags;
 291
 292    unsigned sample_mask;
 293 };
 294
 295 struct svga_prescale {
 296    float translate[4];
 297    float scale[4];
 298    boolean enabled;
 299 };
 300
 301
 302 /* Updated by calling svga_update_state( SVGA_STATE_HW_CLEAR )
 303  */
 304 struct svga_hw_clear_state
 305 {
 306    SVGA3dRect viewport;
 307
 308    struct {
 309       float zmin, zmax;
 310    } depthrange;
 311
 312    struct pipe_framebuffer_state framebuffer;
 313    struct svga_prescale prescale;
 314 };
 315
 316 struct svga_hw_view_state
 317 {
 318    struct pipe_resource *texture;
 319    struct svga_sampler_view *v;
 320    unsigned min_lod;
 321    unsigned max_lod;
 322    boolean dirty;
 323 };
 324
 325 /* Updated by calling svga_update_state( SVGA_STATE_HW_DRAW )
 326  */
 327 struct svga_hw_draw_state
 328 {
 329    unsigned rs[SVGA3D_RS_MAX];
 330    unsigned ts[SVGA3D_PIXEL_SAMPLERREG_MAX][SVGA3D_TS_MAX];
 331    float cb[PIPE_SHADER_TYPES][SVGA3D_CONSTREG_MAX][4];
 332
 333    struct svga_shader_variant *fs;
 334    struct svga_shader_variant *vs;
 335    struct svga_shader_variant *gs;
 336    struct svga_hw_view_state views[PIPE_MAX_SAMPLERS];
 337    unsigned num_views;
 338    struct pipe_resource *constbuf[PIPE_SHADER_TYPES];
 339
 340    /* Bitmask of enabled constant bufffers */
 341    unsigned enabled_constbufs[PIPE_SHADER_TYPES];
 342
 343    /* VGPU10 HW state (used to prevent emitting redundant state) */
 344    SVGA3dDepthStencilStateId depth_stencil_id;
 345    unsigned stencil_ref;
 346    SVGA3dBlendStateId blend_id;
 347    float blend_factor[4];
 348    unsigned blend_sample_mask;
 349    SVGA3dRasterizerStateId rasterizer_id;
 350    SVGA3dElementLayoutId layout_id;
 351    SVGA3dPrimitiveType topology;
 352
 353    /** Vertex buffer state */
 354    SVGA3dVertexBuffer vbuffers[PIPE_MAX_ATTRIBS];
 355    struct svga_winsys_surface *vbuffer_handles[PIPE_MAX_ATTRIBS];
 356    unsigned num_vbuffers;
 357
 358    struct svga_winsys_surface *ib;  /**< index buffer for drawing */
 359    SVGA3dSurfaceFormat ib_format;
 360    unsigned ib_offset;
 361
 362    unsigned num_samplers[PIPE_SHADER_TYPES];
 363    SVGA3dSamplerId samplers[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
 364
 365    /* used for rebinding */
 366    unsigned num_sampler_views[PIPE_SHADER_TYPES];
 367    unsigned default_constbuf_size[PIPE_SHADER_TYPES];
 368 };
 369
 370
 371 /* Updated by calling svga_update_state( SVGA_STATE_NEED_SWTNL )
 372  */
 373 struct svga_sw_state
 374 {
 375    /* which parts we need */
 376    boolean need_swvfetch;
 377    boolean need_pipeline;
 378    boolean need_swtnl;
 379
 380    /* Flag to make sure that need sw is on while
 381     * updating state within a swtnl call.
 382     */
 383    boolean in_swtnl_draw;
 384 };
 385
 386
 387 /* Queue some state updates (like rss) and submit them to hardware in
 388  * a single packet.
 389  */
 390 struct svga_hw_queue;
 391
 392 struct svga_query;
 393 struct svga_qmem_alloc_entry;
 394
 395 struct svga_context
 396 {
 397    struct pipe_context pipe;
 398    struct svga_winsys_context *swc;
 399    struct blitter_context *blitter;
 400    struct u_upload_mgr *const0_upload;
 401
 402    struct {
 403       boolean no_swtnl;
 404       boolean force_swtnl;
 405       boolean use_min_mipmap;
 406
 407       /* incremented for each shader */
 408       unsigned shader_id;
 409
 410       unsigned disable_shader;
 411
 412       boolean no_line_width;
 413       boolean force_hw_line_stipple;
 414
 415       /** To report perf/conformance/etc issues to the state tracker */
 416       struct pipe_debug_callback callback;
 417    } debug;
 418
 419    struct {
 420       struct draw_context *draw;
 421       struct vbuf_render *backend;
 422       unsigned hw_prim;
 423       boolean new_vbuf;
 424       boolean new_vdecl;
 425    } swtnl;
 426
 427    /* Bitmask of blend state objects IDs */
 428    struct util_bitmask *blend_object_id_bm;
 429
 430    /* Bitmask of depth/stencil state objects IDs */
 431    struct util_bitmask *ds_object_id_bm;
 432
 433    /* Bitmaks of input element object IDs */
 434    struct util_bitmask *input_element_object_id_bm;
 435
 436    /* Bitmask of rasterizer object IDs */
 437    struct util_bitmask *rast_object_id_bm;
 438
 439    /* Bitmask of sampler state objects IDs */
 440    struct util_bitmask *sampler_object_id_bm;
 441
 442    /* Bitmask of sampler view IDs */
 443    struct util_bitmask *sampler_view_id_bm;
 444
 445    /* Bitmask of used shader IDs */
 446    struct util_bitmask *shader_id_bm;
 447
 448    /* Bitmask of used surface view IDs */
 449    struct util_bitmask *surface_view_id_bm;
 450
 451    /* Bitmask of used stream output IDs */
 452    struct util_bitmask *stream_output_id_bm;
 453
 454    /* Bitmask of used query IDs */
 455    struct util_bitmask *query_id_bm;
 456
 457    struct {
 458       unsigned dirty[SVGA_STATE_MAX];
 459
 460       /** bitmasks of which const buffers are changed */
 461       unsigned dirty_constbufs[PIPE_SHADER_TYPES];
 462
 463       unsigned texture_timestamp;
 464
 465       /*
 466        */
 467       struct svga_sw_state          sw;
 468       struct svga_hw_draw_state     hw_draw;
 469       struct svga_hw_clear_state    hw_clear;
 470    } state;
 471
 472    struct svga_state curr;      /* state from the state tracker */
 473    unsigned dirty;              /* statechanges since last update_state() */
 474
 475    union {
 476       struct {
 477          unsigned rendertargets:1;
 478          unsigned texture_samplers:1;
 479          unsigned constbufs:1;
 480          unsigned vs:1;
 481          unsigned fs:1;
 482          unsigned gs:1;
 483          unsigned query:1;
 484       } flags;
 485       unsigned val;
 486    } rebind;
 487
 488    struct svga_hwtnl *hwtnl;
 489
 490    /** Queries states */
 491    struct svga_winsys_gb_query *gb_query;     /**< gb query object, one per context */
 492    unsigned gb_query_len;                     /**< gb query object size */
 493    struct util_bitmask *gb_query_alloc_mask;  /**< gb query object allocation mask */
 494    struct svga_qmem_alloc_entry *gb_query_map[SVGA_QUERY_MAX];
 495                                               /**< query mem block mapping */
 496    struct svga_query *sq[SVGA_QUERY_MAX];     /**< queries currently in progress */
 497
 498    /** List of buffers with queued transfers */
 499    struct list_head dirty_buffers;
 500
 501    /** performance / info queries for HUD */
 502    struct {
 503       uint64_t num_draw_calls;       /**< SVGA_QUERY_DRAW_CALLS */
 504       uint64_t num_fallbacks;        /**< SVGA_QUERY_NUM_FALLBACKS */
 505       uint64_t num_flushes;          /**< SVGA_QUERY_NUM_FLUSHES */
 506       uint64_t num_validations;      /**< SVGA_QUERY_NUM_VALIDATIONS */
 507       uint64_t map_buffer_time;      /**< SVGA_QUERY_MAP_BUFFER_TIME */
 508       uint64_t num_resources_mapped; /**< SVGA_QUERY_NUM_RESOURCES_MAPPED */
 509       uint64_t command_buffer_size;  /**< SVGA_QUERY_COMMAND_BUFFER_SIZE */
 510       uint64_t flush_time;           /**< SVGA_QUERY_FLUSH_TIME */
 511       uint64_t surface_write_flushes; /**< SVGA_QUERY_SURFACE_WRITE_FLUSHES */
 512       uint64_t num_shaders;          /**< SVGA_QUERY_NUM_SHADERS */
 513       uint64_t num_state_objects;    /**< SVGA_QUERY_NUM_STATE_OBJECTS */
 514       uint64_t num_surface_views;    /**< SVGA_QUERY_NUM_SURFACE_VIEWS */
 515       uint64_t num_bytes_uploaded;   /**< SVGA_QUERY_NUM_BYTES_UPLOADED */
 516       uint64_t num_generate_mipmap;  /**< SVGA_QUERY_NUM_GENERATE_MIPMAP */
 517       uint64_t num_readbacks;        /**< SVGA_QUERY_NUM_READBACK */
 518    } hud;
 519
 520    /** The currently bound stream output targets */
 521    unsigned num_so_targets;
 522    struct svga_winsys_surface *so_surfaces[SVGA3D_DX_MAX_SOTARGETS];
 523    struct pipe_stream_output_target *so_targets[SVGA3D_DX_MAX_SOTARGETS];
 524    struct svga_stream_output *current_so;
 525
 526    /** A blend state with blending disabled, for falling back to when blending
 527     * is illegal (e.g. an integer texture is bound)
 528     */
 529    struct svga_blend_state *noop_blend;
 530
 531    struct {
 532       struct pipe_resource *texture;
 533       struct svga_pipe_sampler_view *sampler_view;
 534       void *sampler;
 535    } polygon_stipple;
 536
 537    /** Alternate rasterizer states created for point sprite */
 538    struct svga_rasterizer_state *rasterizer_no_cull[2];
 539 };
 540
 541 /* A flag for each state_tracker state object:
 542  */
 543 #define SVGA_NEW_BLEND               0x1
 544 #define SVGA_NEW_DEPTH_STENCIL_ALPHA 0x2
 545 #define SVGA_NEW_RAST                0x4
 546 #define SVGA_NEW_SAMPLER             0x8
 547 #define SVGA_NEW_TEXTURE             0x10
 548 #define SVGA_NEW_VBUFFER             0x20
 549 #define SVGA_NEW_VELEMENT            0x40
 550 #define SVGA_NEW_FS                  0x80
 551 #define SVGA_NEW_VS                  0x100
 552 #define SVGA_NEW_FS_CONST_BUFFER     0x200
 553 #define SVGA_NEW_VS_CONST_BUFFER     0x400
 554 #define SVGA_NEW_FRAME_BUFFER        0x800
 555 #define SVGA_NEW_STIPPLE             0x1000
 556 #define SVGA_NEW_SCISSOR             0x2000
 557 #define SVGA_NEW_BLEND_COLOR         0x4000
 558 #define SVGA_NEW_CLIP                0x8000
 559 #define SVGA_NEW_VIEWPORT            0x10000
 560 #define SVGA_NEW_PRESCALE            0x20000
 561 #define SVGA_NEW_REDUCED_PRIMITIVE   0x40000
 562 #define SVGA_NEW_TEXTURE_BINDING     0x80000
 563 #define SVGA_NEW_NEED_PIPELINE       0x100000
 564 #define SVGA_NEW_NEED_SWVFETCH       0x200000
 565 #define SVGA_NEW_NEED_SWTNL          0x400000
 566 #define SVGA_NEW_FS_VARIANT          0x800000
 567 #define SVGA_NEW_VS_VARIANT          0x1000000
 568 #define SVGA_NEW_TEXTURE_FLAGS       0x4000000
 569 #define SVGA_NEW_STENCIL_REF         0x8000000
 570 #define SVGA_NEW_GS                  0x10000000
 571 #define SVGA_NEW_GS_CONST_BUFFER     0x20000000
 572 #define SVGA_NEW_GS_VARIANT          0x40000000
 573
 574
 575
 576
 577 /***********************************************************************
 578  * svga_clear.c:
 579  */
 580 void svga_clear(struct pipe_context *pipe,
 581                 unsigned buffers,
 582                 const union pipe_color_union *color,
 583                 double depth,
 584                 unsigned stencil);
 585
 586
 587 /***********************************************************************
 588  * svga_screen_texture.c:
 589  */
 590 void svga_mark_surfaces_dirty(struct svga_context *svga);
 591
 592
 593
 594
 595 void svga_init_state_functions( struct svga_context *svga );
 596 void svga_init_flush_functions( struct svga_context *svga );
 597 void svga_init_string_functions( struct svga_context *svga );
 598 void svga_init_blit_functions(struct svga_context *svga);
 599
 600 void svga_init_blend_functions( struct svga_context *svga );
 601 void svga_init_depth_stencil_functions( struct svga_context *svga );
 602 void svga_init_misc_functions( struct svga_context *svga );
 603 void svga_init_rasterizer_functions( struct svga_context *svga );
 604 void svga_init_sampler_functions( struct svga_context *svga );
 605 void svga_init_fs_functions( struct svga_context *svga );
 606 void svga_init_vs_functions( struct svga_context *svga );
 607 void svga_init_gs_functions( struct svga_context *svga );
 608 void svga_init_vertex_functions( struct svga_context *svga );
 609 void svga_init_constbuffer_functions( struct svga_context *svga );
 610 void svga_init_draw_functions( struct svga_context *svga );
 611 void svga_init_query_functions( struct svga_context *svga );
 612 void svga_init_surface_functions(struct svga_context *svga);
 613 void svga_init_stream_output_functions( struct svga_context *svga );
 614
 615 void svga_cleanup_vertex_state( struct svga_context *svga );
 616 void svga_cleanup_tss_binding( struct svga_context *svga );
 617 void svga_cleanup_framebuffer( struct svga_context *svga );
 618
 619 void svga_context_flush( struct svga_context *svga,
 620                          struct pipe_fence_handle **pfence );
 621
 622 void svga_context_finish(struct svga_context *svga);
 623
 624 void svga_hwtnl_flush_retry( struct svga_context *svga );
 625 void svga_hwtnl_flush_buffer( struct svga_context *svga,
 626                               struct pipe_resource *buffer );
 627
 628 void svga_surfaces_flush(struct svga_context *svga);
 629
 630 struct pipe_context *
 631 svga_context_create(struct pipe_screen *screen,
 632                     void *priv, unsigned flags);
 633
 634
 635 /***********************************************************************
 636  * Inline conversion functions.  These are better-typed than the
 637  * macros used previously:
 638  */
 639 static inline struct svga_context *
 640 svga_context( struct pipe_context *pipe )
 641 {
 642    return (struct svga_context *)pipe;
 643 }
 644
 645
 646 static inline boolean
 647 svga_have_gb_objects(const struct svga_context *svga)
 648 {
 649    return svga_screen(svga->pipe.screen)->sws->have_gb_objects;
 650 }
 651
 652 static inline boolean
 653 svga_have_gb_dma(const struct svga_context *svga)
 654 {
 655    return svga_screen(svga->pipe.screen)->sws->have_gb_dma;
 656 }
 657
 658 static inline boolean
 659 svga_have_vgpu10(const struct svga_context *svga)
 660 {
 661    return svga_screen(svga->pipe.screen)->sws->have_vgpu10;
 662 }
 663
 664 static inline boolean
 665 svga_need_to_rebind_resources(const struct svga_context *svga)
 666 {
 667    return svga_screen(svga->pipe.screen)->sws->need_to_rebind_resources;
 668 }
 669
 670 static inline boolean
 671 svga_rects_equal(const SVGA3dRect *r1, const SVGA3dRect *r2)
 672 {
 673    return memcmp(r1, r2, sizeof(*r1)) == 0;
 674 }
 675
 676 #endif