Merge remote-tracking branch 'mesa-public/master' into vulkan
[mesa.git] / src / gallium / drivers / svga / svga_context.h
1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 #ifndef SVGA_CONTEXT_H
27 #define SVGA_CONTEXT_H
28
29
30 #include "pipe/p_context.h"
31 #include "pipe/p_defines.h"
32 #include "pipe/p_state.h"
33
34 #include "util/u_blitter.h"
35 #include "util/list.h"
36
37 #include "tgsi/tgsi_scan.h"
38
39 #include "svga_screen.h"
40 #include "svga_state.h"
41 #include "svga_winsys.h"
42 #include "svga_hw_reg.h"
43 #include "svga3d_shaderdefs.h"
44
45
46 /** Non-GPU queries for gallium HUD */
47 /* per-frame counters */
48 #define SVGA_QUERY_NUM_DRAW_CALLS (PIPE_QUERY_DRIVER_SPECIFIC + 0)
49 #define SVGA_QUERY_NUM_FALLBACKS (PIPE_QUERY_DRIVER_SPECIFIC + 1)
50 #define SVGA_QUERY_NUM_FLUSHES (PIPE_QUERY_DRIVER_SPECIFIC + 2)
51 #define SVGA_QUERY_NUM_VALIDATIONS (PIPE_QUERY_DRIVER_SPECIFIC + 3)
52 #define SVGA_QUERY_MAP_BUFFER_TIME (PIPE_QUERY_DRIVER_SPECIFIC + 4)
53 #define SVGA_QUERY_NUM_RESOURCES_MAPPED (PIPE_QUERY_DRIVER_SPECIFIC + 5)
54 /* running total counters */
55 #define SVGA_QUERY_MEMORY_USED (PIPE_QUERY_DRIVER_SPECIFIC + 6)
56 #define SVGA_QUERY_NUM_SHADERS (PIPE_QUERY_DRIVER_SPECIFIC + 7)
57 #define SVGA_QUERY_NUM_RESOURCES (PIPE_QUERY_DRIVER_SPECIFIC + 8)
58 #define SVGA_QUERY_NUM_STATE_OBJECTS (PIPE_QUERY_DRIVER_SPECIFIC + 9)
59 #define SVGA_QUERY_NUM_SURFACE_VIEWS (PIPE_QUERY_DRIVER_SPECIFIC + 10)
60 /*SVGA_QUERY_MAX has to be last because it is size of an array*/
61 #define SVGA_QUERY_MAX (PIPE_QUERY_DRIVER_SPECIFIC + 11)
62
63 /**
64 * Maximum supported number of constant buffers per shader
65 */
66 #define SVGA_MAX_CONST_BUFS 14
67
68 /**
69 * Maximum constant buffer size that can be set in the
70 * DXSetSingleConstantBuffer command is
71 * DX10 constant buffer element count * 4 4-bytes components
72 */
73 #define SVGA_MAX_CONST_BUF_SIZE (4096 * 4 * sizeof(int))
74
75 struct draw_vertex_shader;
76 struct draw_fragment_shader;
77 struct svga_shader_variant;
78 struct SVGACmdMemory;
79 struct util_bitmask;
80
81
82 struct svga_cache_context;
83 struct svga_tracked_state;
84
85 struct svga_blend_state {
86 unsigned need_white_fragments:1;
87 unsigned independent_blend_enable:1;
88 unsigned alpha_to_coverage:1;
89 unsigned blend_color_alpha:1; /**< set blend color to alpha value */
90
91 /** Per-render target state */
92 struct {
93 uint8_t writemask;
94
95 boolean blend_enable;
96 uint8_t srcblend;
97 uint8_t dstblend;
98 uint8_t blendeq;
99
100 boolean separate_alpha_blend_enable;
101 uint8_t srcblend_alpha;
102 uint8_t dstblend_alpha;
103 uint8_t blendeq_alpha;
104 } rt[PIPE_MAX_COLOR_BUFS];
105
106 SVGA3dBlendStateId id; /**< vgpu10 */
107 };
108
109 struct svga_depth_stencil_state {
110 unsigned zfunc:8;
111 unsigned zenable:1;
112 unsigned zwriteenable:1;
113
114 unsigned alphatestenable:1;
115 unsigned alphafunc:8;
116
117 struct {
118 unsigned enabled:1;
119 unsigned func:8;
120 unsigned fail:8;
121 unsigned zfail:8;
122 unsigned pass:8;
123 } stencil[2];
124
125 /* SVGA3D has one ref/mask/writemask triple shared between front &
126 * back face stencil. We really need two:
127 */
128 unsigned stencil_mask:8;
129 unsigned stencil_writemask:8;
130
131 float alpharef;
132
133 SVGA3dDepthStencilStateId id; /**< vgpu10 */
134 };
135
136 #define SVGA_UNFILLED_DISABLE 0
137 #define SVGA_UNFILLED_LINE 1
138 #define SVGA_UNFILLED_POINT 2
139
140 #define SVGA_PIPELINE_FLAG_POINTS (1<<PIPE_PRIM_POINTS)
141 #define SVGA_PIPELINE_FLAG_LINES (1<<PIPE_PRIM_LINES)
142 #define SVGA_PIPELINE_FLAG_TRIS (1<<PIPE_PRIM_TRIANGLES)
143
144 struct svga_rasterizer_state {
145 struct pipe_rasterizer_state templ; /* needed for draw module */
146
147 unsigned shademode:8;
148 unsigned cullmode:8;
149 unsigned scissortestenable:1;
150 unsigned multisampleantialias:1;
151 unsigned antialiasedlineenable:1;
152 unsigned lastpixel:1;
153 unsigned pointsprite:1;
154
155 unsigned linepattern;
156
157 float slopescaledepthbias;
158 float depthbias;
159 float pointsize;
160 float linewidth;
161
162 unsigned hw_fillmode:2; /* PIPE_POLYGON_MODE_x */
163
164 /** Which prims do we need help for? Bitmask of (1 << PIPE_PRIM_x) flags */
165 unsigned need_pipeline:16;
166
167 SVGA3dRasterizerStateId id; /**< vgpu10 */
168
169 /** For debugging: */
170 const char* need_pipeline_tris_str;
171 const char* need_pipeline_lines_str;
172 const char* need_pipeline_points_str;
173 };
174
175 struct svga_sampler_state {
176 unsigned mipfilter;
177 unsigned magfilter;
178 unsigned minfilter;
179 unsigned aniso_level;
180 float lod_bias;
181 unsigned addressu;
182 unsigned addressv;
183 unsigned addressw;
184 unsigned bordercolor;
185 unsigned normalized_coords:1;
186 unsigned compare_mode:1;
187 unsigned compare_func:3;
188
189 unsigned min_lod;
190 unsigned view_min_lod;
191 unsigned view_max_lod;
192
193 SVGA3dSamplerId id;
194 };
195
196
197 struct svga_pipe_sampler_view
198 {
199 struct pipe_sampler_view base;
200
201 SVGA3dShaderResourceViewId id;
202 };
203
204
205 static inline struct svga_pipe_sampler_view *
206 svga_pipe_sampler_view(struct pipe_sampler_view *v)
207 {
208 return (struct svga_pipe_sampler_view *) v;
209 }
210
211
212 struct svga_velems_state {
213 unsigned count;
214 struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS];
215 SVGA3dDeclType decl_type[PIPE_MAX_ATTRIBS]; /**< vertex attrib formats */
216
217 /** Bitmasks indicating which attributes need format conversion */
218 unsigned adjust_attrib_range; /**< range adjustment */
219 unsigned attrib_is_pure_int; /**< pure int */
220 unsigned adjust_attrib_w_1; /**< set w = 1 */
221 unsigned adjust_attrib_itof; /**< int->float */
222 unsigned adjust_attrib_utof; /**< uint->float */
223 unsigned attrib_is_bgra; /**< R / B swizzling */
224 unsigned attrib_puint_to_snorm; /**< 10_10_10_2 packed uint -> snorm */
225 unsigned attrib_puint_to_uscaled; /**< 10_10_10_2 packed uint -> uscaled */
226 unsigned attrib_puint_to_sscaled; /**< 10_10_10_2 packed uint -> sscaled */
227
228 boolean need_swvfetch;
229
230 SVGA3dElementLayoutId id; /**< VGPU10 */
231 };
232
233 /* Use to calculate differences between state emitted to hardware and
234 * current driver-calculated state.
235 */
236 struct svga_state
237 {
238 const struct svga_blend_state *blend;
239 const struct svga_depth_stencil_state *depth;
240 const struct svga_rasterizer_state *rast;
241 const struct svga_sampler_state *sampler[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
242 const struct svga_velems_state *velems;
243
244 struct pipe_sampler_view *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS]; /* or texture ID's? */
245 struct svga_fragment_shader *fs;
246 struct svga_vertex_shader *vs;
247 struct svga_geometry_shader *user_gs; /* user-specified GS */
248 struct svga_geometry_shader *gs; /* derived GS */
249
250 struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
251 struct pipe_index_buffer ib;
252 /** Constant buffers for each shader.
253 * The size should probably always match with that of
254 * svga_shader_emitter_v10.num_shader_consts.
255 */
256 struct pipe_constant_buffer constbufs[PIPE_SHADER_TYPES][SVGA_MAX_CONST_BUFS];
257
258 struct pipe_framebuffer_state framebuffer;
259 float depthscale;
260
261 /* Hack to limit the number of different render targets between
262 * flushes. Helps avoid blowing out our surface cache in EXA.
263 */
264 int nr_fbs;
265
266 struct pipe_poly_stipple poly_stipple;
267 struct pipe_scissor_state scissor;
268 struct pipe_blend_color blend_color;
269 struct pipe_stencil_ref stencil_ref;
270 struct pipe_clip_state clip;
271 struct pipe_viewport_state viewport;
272
273 unsigned num_samplers[PIPE_SHADER_TYPES];
274 unsigned num_sampler_views[PIPE_SHADER_TYPES];
275 unsigned num_vertex_buffers;
276 unsigned reduced_prim;
277
278 struct {
279 unsigned flag_1d;
280 unsigned flag_srgb;
281 } tex_flags;
282
283 unsigned sample_mask;
284 };
285
286 struct svga_prescale {
287 float translate[4];
288 float scale[4];
289 boolean enabled;
290 };
291
292
293 /* Updated by calling svga_update_state( SVGA_STATE_HW_CLEAR )
294 */
295 struct svga_hw_clear_state
296 {
297 SVGA3dRect viewport;
298
299 struct {
300 float zmin, zmax;
301 } depthrange;
302
303 struct pipe_framebuffer_state framebuffer;
304 struct svga_prescale prescale;
305 };
306
307 struct svga_hw_view_state
308 {
309 struct pipe_resource *texture;
310 struct svga_sampler_view *v;
311 unsigned min_lod;
312 unsigned max_lod;
313 int dirty;
314 };
315
316 /* Updated by calling svga_update_state( SVGA_STATE_HW_DRAW )
317 */
318 struct svga_hw_draw_state
319 {
320 unsigned rs[SVGA3D_RS_MAX];
321 unsigned ts[SVGA3D_PIXEL_SAMPLERREG_MAX][SVGA3D_TS_MAX];
322 float cb[PIPE_SHADER_TYPES][SVGA3D_CONSTREG_MAX][4];
323
324 struct svga_shader_variant *fs;
325 struct svga_shader_variant *vs;
326 struct svga_shader_variant *gs;
327 struct svga_hw_view_state views[PIPE_MAX_SAMPLERS];
328 unsigned num_views;
329 struct pipe_resource *constbuf[PIPE_SHADER_TYPES];
330
331 /* Bitmask of enabled constant bufffers */
332 unsigned enabled_constbufs[PIPE_SHADER_TYPES];
333
334 /* VGPU10 HW state (used to prevent emitting redundant state) */
335 SVGA3dDepthStencilStateId depth_stencil_id;
336 unsigned stencil_ref;
337 SVGA3dBlendStateId blend_id;
338 float blend_factor[4];
339 unsigned blend_sample_mask;
340 SVGA3dRasterizerStateId rasterizer_id;
341 SVGA3dElementLayoutId layout_id;
342 SVGA3dPrimitiveType topology;
343
344 /* used for rebinding */
345 unsigned num_sampler_views[PIPE_SHADER_TYPES];
346 unsigned default_constbuf_size[PIPE_SHADER_TYPES];
347 };
348
349
350 /* Updated by calling svga_update_state( SVGA_STATE_NEED_SWTNL )
351 */
352 struct svga_sw_state
353 {
354 /* which parts we need */
355 boolean need_swvfetch;
356 boolean need_pipeline;
357 boolean need_swtnl;
358
359 /* Flag to make sure that need sw is on while
360 * updating state within a swtnl call.
361 */
362 boolean in_swtnl_draw;
363 };
364
365
366 /* Queue some state updates (like rss) and submit them to hardware in
367 * a single packet.
368 */
369 struct svga_hw_queue;
370
371 struct svga_query;
372 struct svga_qmem_alloc_entry;
373
374 struct svga_context
375 {
376 struct pipe_context pipe;
377 struct svga_winsys_context *swc;
378 struct blitter_context *blitter;
379 struct u_upload_mgr *const0_upload;
380
381 struct {
382 boolean no_swtnl;
383 boolean force_swtnl;
384 boolean use_min_mipmap;
385
386 /* incremented for each shader */
387 unsigned shader_id;
388
389 unsigned disable_shader;
390
391 boolean no_line_width;
392 boolean force_hw_line_stipple;
393 } debug;
394
395 struct {
396 struct draw_context *draw;
397 struct vbuf_render *backend;
398 unsigned hw_prim;
399 boolean new_vbuf;
400 boolean new_vdecl;
401 } swtnl;
402
403 /* Bitmask of blend state objects IDs */
404 struct util_bitmask *blend_object_id_bm;
405
406 /* Bitmask of depth/stencil state objects IDs */
407 struct util_bitmask *ds_object_id_bm;
408
409 /* Bitmaks of input element object IDs */
410 struct util_bitmask *input_element_object_id_bm;
411
412 /* Bitmask of rasterizer object IDs */
413 struct util_bitmask *rast_object_id_bm;
414
415 /* Bitmask of sampler state objects IDs */
416 struct util_bitmask *sampler_object_id_bm;
417
418 /* Bitmask of sampler view IDs */
419 struct util_bitmask *sampler_view_id_bm;
420
421 /* Bitmask of used shader IDs */
422 struct util_bitmask *shader_id_bm;
423
424 /* Bitmask of used surface view IDs */
425 struct util_bitmask *surface_view_id_bm;
426
427 /* Bitmask of used stream output IDs */
428 struct util_bitmask *stream_output_id_bm;
429
430 /* Bitmask of used query IDs */
431 struct util_bitmask *query_id_bm;
432
433 struct {
434 unsigned dirty[SVGA_STATE_MAX];
435
436 /** bitmasks of which const buffers are changed */
437 unsigned dirty_constbufs[PIPE_SHADER_TYPES];
438
439 unsigned texture_timestamp;
440
441 /*
442 */
443 struct svga_sw_state sw;
444 struct svga_hw_draw_state hw_draw;
445 struct svga_hw_clear_state hw_clear;
446 } state;
447
448 struct svga_state curr; /* state from the state tracker */
449 unsigned dirty; /* statechanges since last update_state() */
450
451 union {
452 struct {
453 unsigned rendertargets:1;
454 unsigned texture_samplers:1;
455 unsigned constbufs:1;
456 unsigned vs:1;
457 unsigned fs:1;
458 unsigned gs:1;
459 unsigned query:1;
460 } flags;
461 unsigned val;
462 } rebind;
463
464 struct svga_hwtnl *hwtnl;
465
466 /** Queries states */
467 struct svga_winsys_gb_query *gb_query; /**< gb query object, one per context */
468 unsigned gb_query_len; /**< gb query object size */
469 struct util_bitmask *gb_query_alloc_mask; /**< gb query object allocation mask */
470 struct svga_qmem_alloc_entry *gb_query_map[SVGA_QUERY_MAX];
471 /**< query mem block mapping */
472 struct svga_query *sq[SVGA_QUERY_MAX]; /**< queries currently in progress */
473
474 /** List of buffers with queued transfers */
475 struct list_head dirty_buffers;
476
477 /** performance / info queries for HUD */
478 struct {
479 uint64_t num_draw_calls; /**< SVGA_QUERY_DRAW_CALLS */
480 uint64_t num_fallbacks; /**< SVGA_QUERY_NUM_FALLBACKS */
481 uint64_t num_flushes; /**< SVGA_QUERY_NUM_FLUSHES */
482 uint64_t num_validations; /**< SVGA_QUERY_NUM_VALIDATIONS */
483 uint64_t map_buffer_time; /**< SVGA_QUERY_MAP_BUFFER_TIME */
484 uint64_t num_resources_mapped; /**< SVGA_QUERY_NUM_RESOURCES_MAPPED */
485 uint64_t num_shaders; /**< SVGA_QUERY_NUM_SHADERS */
486 uint64_t num_state_objects; /**< SVGA_QUERY_NUM_STATE_OBJECTS */
487 uint64_t num_surface_views; /**< SVGA_QUERY_NUM_SURFACE_VIEWS */
488 } hud;
489
490 /** The currently bound stream output targets */
491 unsigned num_so_targets;
492 struct svga_winsys_surface *so_surfaces[SVGA3D_DX_MAX_SOTARGETS];
493 struct pipe_stream_output_target *so_targets[SVGA3D_DX_MAX_SOTARGETS];
494 struct svga_stream_output *current_so;
495
496 /** A blend state with blending disabled, for falling back to when blending
497 * is illegal (e.g. an integer texture is bound)
498 */
499 struct svga_blend_state *noop_blend;
500
501 struct {
502 struct pipe_resource *texture;
503 struct svga_pipe_sampler_view *sampler_view;
504 void *sampler;
505 } polygon_stipple;
506
507 /** Alternate rasterizer states created for point sprite */
508 struct svga_rasterizer_state *rasterizer_no_cull[2];
509 };
510
511 /* A flag for each state_tracker state object:
512 */
513 #define SVGA_NEW_BLEND 0x1
514 #define SVGA_NEW_DEPTH_STENCIL_ALPHA 0x2
515 #define SVGA_NEW_RAST 0x4
516 #define SVGA_NEW_SAMPLER 0x8
517 #define SVGA_NEW_TEXTURE 0x10
518 #define SVGA_NEW_VBUFFER 0x20
519 #define SVGA_NEW_VELEMENT 0x40
520 #define SVGA_NEW_FS 0x80
521 #define SVGA_NEW_VS 0x100
522 #define SVGA_NEW_FS_CONST_BUFFER 0x200
523 #define SVGA_NEW_VS_CONST_BUFFER 0x400
524 #define SVGA_NEW_FRAME_BUFFER 0x800
525 #define SVGA_NEW_STIPPLE 0x1000
526 #define SVGA_NEW_SCISSOR 0x2000
527 #define SVGA_NEW_BLEND_COLOR 0x4000
528 #define SVGA_NEW_CLIP 0x8000
529 #define SVGA_NEW_VIEWPORT 0x10000
530 #define SVGA_NEW_PRESCALE 0x20000
531 #define SVGA_NEW_REDUCED_PRIMITIVE 0x40000
532 #define SVGA_NEW_TEXTURE_BINDING 0x80000
533 #define SVGA_NEW_NEED_PIPELINE 0x100000
534 #define SVGA_NEW_NEED_SWVFETCH 0x200000
535 #define SVGA_NEW_NEED_SWTNL 0x400000
536 #define SVGA_NEW_FS_VARIANT 0x800000
537 #define SVGA_NEW_VS_VARIANT 0x1000000
538 #define SVGA_NEW_TEXTURE_FLAGS 0x4000000
539 #define SVGA_NEW_STENCIL_REF 0x8000000
540 #define SVGA_NEW_GS 0x10000000
541 #define SVGA_NEW_GS_CONST_BUFFER 0x20000000
542 #define SVGA_NEW_GS_VARIANT 0x40000000
543
544
545
546
547 /***********************************************************************
548 * svga_clear.c:
549 */
550 void svga_clear(struct pipe_context *pipe,
551 unsigned buffers,
552 const union pipe_color_union *color,
553 double depth,
554 unsigned stencil);
555
556
557 /***********************************************************************
558 * svga_screen_texture.c:
559 */
560 void svga_mark_surfaces_dirty(struct svga_context *svga);
561
562
563
564
565 void svga_init_state_functions( struct svga_context *svga );
566 void svga_init_flush_functions( struct svga_context *svga );
567 void svga_init_string_functions( struct svga_context *svga );
568 void svga_init_blit_functions(struct svga_context *svga);
569
570 void svga_init_blend_functions( struct svga_context *svga );
571 void svga_init_depth_stencil_functions( struct svga_context *svga );
572 void svga_init_misc_functions( struct svga_context *svga );
573 void svga_init_rasterizer_functions( struct svga_context *svga );
574 void svga_init_sampler_functions( struct svga_context *svga );
575 void svga_init_fs_functions( struct svga_context *svga );
576 void svga_init_vs_functions( struct svga_context *svga );
577 void svga_init_gs_functions( struct svga_context *svga );
578 void svga_init_vertex_functions( struct svga_context *svga );
579 void svga_init_constbuffer_functions( struct svga_context *svga );
580 void svga_init_draw_functions( struct svga_context *svga );
581 void svga_init_query_functions( struct svga_context *svga );
582 void svga_init_surface_functions(struct svga_context *svga);
583 void svga_init_stream_output_functions( struct svga_context *svga );
584
585 void svga_cleanup_vertex_state( struct svga_context *svga );
586 void svga_cleanup_tss_binding( struct svga_context *svga );
587 void svga_cleanup_framebuffer( struct svga_context *svga );
588
589 void svga_context_flush( struct svga_context *svga,
590 struct pipe_fence_handle **pfence );
591
592 void svga_context_finish(struct svga_context *svga);
593
594 void svga_hwtnl_flush_retry( struct svga_context *svga );
595 void svga_hwtnl_flush_buffer( struct svga_context *svga,
596 struct pipe_resource *buffer );
597
598 void svga_surfaces_flush(struct svga_context *svga);
599
600 struct pipe_context *
601 svga_context_create(struct pipe_screen *screen,
602 void *priv, unsigned flags);
603
604
605 /***********************************************************************
606 * Inline conversion functions. These are better-typed than the
607 * macros used previously:
608 */
609 static inline struct svga_context *
610 svga_context( struct pipe_context *pipe )
611 {
612 return (struct svga_context *)pipe;
613 }
614
615
616 static inline boolean
617 svga_have_gb_objects(const struct svga_context *svga)
618 {
619 return svga_screen(svga->pipe.screen)->sws->have_gb_objects;
620 }
621
622 static inline boolean
623 svga_have_gb_dma(const struct svga_context *svga)
624 {
625 return svga_screen(svga->pipe.screen)->sws->have_gb_dma;
626 }
627
628 static inline boolean
629 svga_have_vgpu10(const struct svga_context *svga)
630 {
631 return svga_screen(svga->pipe.screen)->sws->have_vgpu10;
632 }
633
634 static inline boolean
635 svga_need_to_rebind_resources(const struct svga_context *svga)
636 {
637 return svga_screen(svga->pipe.screen)->sws->need_to_rebind_resources;
638 }
639
640 static inline boolean
641 svga_rects_equal(const SVGA3dRect *r1, const SVGA3dRect *r2)
642 {
643 return memcmp(r1, r2, sizeof(*r1)) == 0;
644 }
645
646 #endif