svga: eliminiate unnecessary constant buffer updates
[mesa.git] / src / gallium / drivers / svga / svga_context.h
1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
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21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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24 **********************************************************/
25
26 #ifndef SVGA_CONTEXT_H
27 #define SVGA_CONTEXT_H
28
29
30 #include "pipe/p_context.h"
31 #include "pipe/p_defines.h"
32 #include "pipe/p_state.h"
33
34 #include "util/u_blitter.h"
35 #include "util/list.h"
36
37 #include "tgsi/tgsi_scan.h"
38
39 #include "svga_screen.h"
40 #include "svga_state.h"
41 #include "svga_winsys.h"
42 #include "svga_hw_reg.h"
43 #include "svga3d_shaderdefs.h"
44
45
46 /** Non-GPU queries for gallium HUD */
47 /* per-frame counters */
48 #define SVGA_QUERY_NUM_DRAW_CALLS (PIPE_QUERY_DRIVER_SPECIFIC + 0)
49 #define SVGA_QUERY_NUM_FALLBACKS (PIPE_QUERY_DRIVER_SPECIFIC + 1)
50 #define SVGA_QUERY_NUM_FLUSHES (PIPE_QUERY_DRIVER_SPECIFIC + 2)
51 #define SVGA_QUERY_NUM_VALIDATIONS (PIPE_QUERY_DRIVER_SPECIFIC + 3)
52 #define SVGA_QUERY_MAP_BUFFER_TIME (PIPE_QUERY_DRIVER_SPECIFIC + 4)
53 #define SVGA_QUERY_NUM_RESOURCES_MAPPED (PIPE_QUERY_DRIVER_SPECIFIC + 5)
54 #define SVGA_QUERY_NUM_BYTES_UPLOADED (PIPE_QUERY_DRIVER_SPECIFIC + 6)
55 #define SVGA_QUERY_COMMAND_BUFFER_SIZE (PIPE_QUERY_DRIVER_SPECIFIC + 7)
56 #define SVGA_QUERY_FLUSH_TIME (PIPE_QUERY_DRIVER_SPECIFIC + 8)
57 #define SVGA_QUERY_SURFACE_WRITE_FLUSHES (PIPE_QUERY_DRIVER_SPECIFIC + 9)
58 #define SVGA_QUERY_NUM_READBACKS (PIPE_QUERY_DRIVER_SPECIFIC + 10)
59 #define SVGA_QUERY_NUM_RESOURCE_UPDATES (PIPE_QUERY_DRIVER_SPECIFIC + 11)
60 #define SVGA_QUERY_NUM_BUFFER_UPLOADS (PIPE_QUERY_DRIVER_SPECIFIC + 12)
61 #define SVGA_QUERY_NUM_CONST_BUF_UPDATES (PIPE_QUERY_DRIVER_SPECIFIC + 13)
62 #define SVGA_QUERY_NUM_CONST_UPDATES (PIPE_QUERY_DRIVER_SPECIFIC + 14)
63
64 /* running total counters */
65 #define SVGA_QUERY_MEMORY_USED (PIPE_QUERY_DRIVER_SPECIFIC + 15)
66 #define SVGA_QUERY_NUM_SHADERS (PIPE_QUERY_DRIVER_SPECIFIC + 16)
67 #define SVGA_QUERY_NUM_RESOURCES (PIPE_QUERY_DRIVER_SPECIFIC + 17)
68 #define SVGA_QUERY_NUM_STATE_OBJECTS (PIPE_QUERY_DRIVER_SPECIFIC + 18)
69 #define SVGA_QUERY_NUM_SURFACE_VIEWS (PIPE_QUERY_DRIVER_SPECIFIC + 19)
70 #define SVGA_QUERY_NUM_GENERATE_MIPMAP (PIPE_QUERY_DRIVER_SPECIFIC + 20)
71 /*SVGA_QUERY_MAX has to be last because it is size of an array*/
72 #define SVGA_QUERY_MAX (PIPE_QUERY_DRIVER_SPECIFIC + 21)
73
74 /**
75 * Maximum supported number of constant buffers per shader
76 */
77 #define SVGA_MAX_CONST_BUFS 14
78
79 /**
80 * Maximum constant buffer size that can be set in the
81 * DXSetSingleConstantBuffer command is
82 * DX10 constant buffer element count * 4 4-bytes components
83 */
84 #define SVGA_MAX_CONST_BUF_SIZE (4096 * 4 * sizeof(int))
85
86 #define CONST0_UPLOAD_ALIGNMENT 256
87
88 struct draw_vertex_shader;
89 struct draw_fragment_shader;
90 struct svga_shader_variant;
91 struct SVGACmdMemory;
92 struct util_bitmask;
93
94
95 struct svga_cache_context;
96 struct svga_tracked_state;
97
98 struct svga_blend_state {
99 unsigned need_white_fragments:1;
100 unsigned independent_blend_enable:1;
101 unsigned alpha_to_coverage:1;
102 unsigned blend_color_alpha:1; /**< set blend color to alpha value */
103
104 /** Per-render target state */
105 struct {
106 uint8_t writemask;
107
108 boolean blend_enable;
109 uint8_t srcblend;
110 uint8_t dstblend;
111 uint8_t blendeq;
112
113 boolean separate_alpha_blend_enable;
114 uint8_t srcblend_alpha;
115 uint8_t dstblend_alpha;
116 uint8_t blendeq_alpha;
117 } rt[PIPE_MAX_COLOR_BUFS];
118
119 SVGA3dBlendStateId id; /**< vgpu10 */
120 };
121
122 struct svga_depth_stencil_state {
123 unsigned zfunc:8;
124 unsigned zenable:1;
125 unsigned zwriteenable:1;
126
127 unsigned alphatestenable:1;
128 unsigned alphafunc:8;
129
130 struct {
131 unsigned enabled:1;
132 unsigned func:8;
133 unsigned fail:8;
134 unsigned zfail:8;
135 unsigned pass:8;
136 } stencil[2];
137
138 /* SVGA3D has one ref/mask/writemask triple shared between front &
139 * back face stencil. We really need two:
140 */
141 unsigned stencil_mask:8;
142 unsigned stencil_writemask:8;
143
144 float alpharef;
145
146 SVGA3dDepthStencilStateId id; /**< vgpu10 */
147 };
148
149 #define SVGA_UNFILLED_DISABLE 0
150 #define SVGA_UNFILLED_LINE 1
151 #define SVGA_UNFILLED_POINT 2
152
153 #define SVGA_PIPELINE_FLAG_POINTS (1<<PIPE_PRIM_POINTS)
154 #define SVGA_PIPELINE_FLAG_LINES (1<<PIPE_PRIM_LINES)
155 #define SVGA_PIPELINE_FLAG_TRIS (1<<PIPE_PRIM_TRIANGLES)
156
157 struct svga_rasterizer_state {
158 struct pipe_rasterizer_state templ; /* needed for draw module */
159
160 unsigned shademode:8;
161 unsigned cullmode:8;
162 unsigned scissortestenable:1;
163 unsigned multisampleantialias:1;
164 unsigned antialiasedlineenable:1;
165 unsigned lastpixel:1;
166 unsigned pointsprite:1;
167
168 unsigned linepattern;
169
170 float slopescaledepthbias;
171 float depthbias;
172 float pointsize;
173 float linewidth;
174
175 unsigned hw_fillmode:2; /* PIPE_POLYGON_MODE_x */
176
177 /** Which prims do we need help for? Bitmask of (1 << PIPE_PRIM_x) flags */
178 unsigned need_pipeline:16;
179
180 SVGA3dRasterizerStateId id; /**< vgpu10 */
181
182 /** For debugging: */
183 const char* need_pipeline_tris_str;
184 const char* need_pipeline_lines_str;
185 const char* need_pipeline_points_str;
186 };
187
188 struct svga_sampler_state {
189 unsigned mipfilter;
190 unsigned magfilter;
191 unsigned minfilter;
192 unsigned aniso_level;
193 float lod_bias;
194 unsigned addressu;
195 unsigned addressv;
196 unsigned addressw;
197 unsigned bordercolor;
198 unsigned normalized_coords:1;
199 unsigned compare_mode:1;
200 unsigned compare_func:3;
201
202 unsigned min_lod;
203 unsigned view_min_lod;
204 unsigned view_max_lod;
205
206 SVGA3dSamplerId id;
207 };
208
209
210 struct svga_pipe_sampler_view
211 {
212 struct pipe_sampler_view base;
213
214 SVGA3dShaderResourceViewId id;
215 };
216
217
218 static inline struct svga_pipe_sampler_view *
219 svga_pipe_sampler_view(struct pipe_sampler_view *v)
220 {
221 return (struct svga_pipe_sampler_view *) v;
222 }
223
224
225 struct svga_velems_state {
226 unsigned count;
227 struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS];
228 SVGA3dDeclType decl_type[PIPE_MAX_ATTRIBS]; /**< vertex attrib formats */
229
230 /** Bitmasks indicating which attributes need format conversion */
231 unsigned adjust_attrib_range; /**< range adjustment */
232 unsigned attrib_is_pure_int; /**< pure int */
233 unsigned adjust_attrib_w_1; /**< set w = 1 */
234 unsigned adjust_attrib_itof; /**< int->float */
235 unsigned adjust_attrib_utof; /**< uint->float */
236 unsigned attrib_is_bgra; /**< R / B swizzling */
237 unsigned attrib_puint_to_snorm; /**< 10_10_10_2 packed uint -> snorm */
238 unsigned attrib_puint_to_uscaled; /**< 10_10_10_2 packed uint -> uscaled */
239 unsigned attrib_puint_to_sscaled; /**< 10_10_10_2 packed uint -> sscaled */
240
241 boolean need_swvfetch;
242
243 SVGA3dElementLayoutId id; /**< VGPU10 */
244 };
245
246 /* Use to calculate differences between state emitted to hardware and
247 * current driver-calculated state.
248 */
249 struct svga_state
250 {
251 const struct svga_blend_state *blend;
252 const struct svga_depth_stencil_state *depth;
253 const struct svga_rasterizer_state *rast;
254 const struct svga_sampler_state *sampler[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
255 const struct svga_velems_state *velems;
256
257 struct pipe_sampler_view *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS]; /* or texture ID's? */
258 struct svga_fragment_shader *fs;
259 struct svga_vertex_shader *vs;
260 struct svga_geometry_shader *user_gs; /* user-specified GS */
261 struct svga_geometry_shader *gs; /* derived GS */
262
263 struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
264 struct pipe_index_buffer ib;
265 /** Constant buffers for each shader.
266 * The size should probably always match with that of
267 * svga_shader_emitter_v10.num_shader_consts.
268 */
269 struct pipe_constant_buffer constbufs[PIPE_SHADER_TYPES][SVGA_MAX_CONST_BUFS];
270
271 struct pipe_framebuffer_state framebuffer;
272 float depthscale;
273
274 /* Hack to limit the number of different render targets between
275 * flushes. Helps avoid blowing out our surface cache in EXA.
276 */
277 int nr_fbs;
278
279 struct pipe_poly_stipple poly_stipple;
280 struct pipe_scissor_state scissor;
281 struct pipe_blend_color blend_color;
282 struct pipe_stencil_ref stencil_ref;
283 struct pipe_clip_state clip;
284 struct pipe_viewport_state viewport;
285
286 unsigned num_samplers[PIPE_SHADER_TYPES];
287 unsigned num_sampler_views[PIPE_SHADER_TYPES];
288 unsigned num_vertex_buffers;
289 unsigned reduced_prim;
290
291 struct {
292 unsigned flag_1d;
293 unsigned flag_srgb;
294 unsigned flag_rect; /* sampler views with rectangular texture target */
295 unsigned flag_buf; /* sampler views with texture buffer target */
296 } tex_flags;
297
298 unsigned sample_mask;
299 };
300
301 struct svga_prescale {
302 float translate[4];
303 float scale[4];
304 boolean enabled;
305 };
306
307
308 /* Updated by calling svga_update_state( SVGA_STATE_HW_CLEAR )
309 */
310 struct svga_hw_clear_state
311 {
312 SVGA3dRect viewport;
313
314 struct {
315 float zmin, zmax;
316 } depthrange;
317
318 struct pipe_framebuffer_state framebuffer;
319 struct svga_prescale prescale;
320 };
321
322 struct svga_hw_view_state
323 {
324 struct pipe_resource *texture;
325 struct svga_sampler_view *v;
326 unsigned min_lod;
327 unsigned max_lod;
328 boolean dirty;
329 };
330
331 /* Updated by calling svga_update_state( SVGA_STATE_HW_DRAW )
332 */
333 struct svga_hw_draw_state
334 {
335 unsigned rs[SVGA3D_RS_MAX];
336 unsigned ts[SVGA3D_PIXEL_SAMPLERREG_MAX][SVGA3D_TS_MAX];
337 float cb[PIPE_SHADER_TYPES][SVGA3D_CONSTREG_MAX][4];
338
339 struct svga_shader_variant *fs;
340 struct svga_shader_variant *vs;
341 struct svga_shader_variant *gs;
342 struct svga_hw_view_state views[PIPE_MAX_SAMPLERS];
343 unsigned num_views;
344 struct pipe_resource *constbuf[PIPE_SHADER_TYPES];
345
346 /* Bitmask of enabled constant bufffers */
347 unsigned enabled_constbufs[PIPE_SHADER_TYPES];
348
349 /* VGPU10 HW state (used to prevent emitting redundant state) */
350 SVGA3dDepthStencilStateId depth_stencil_id;
351 unsigned stencil_ref;
352 SVGA3dBlendStateId blend_id;
353 float blend_factor[4];
354 unsigned blend_sample_mask;
355 SVGA3dRasterizerStateId rasterizer_id;
356 SVGA3dElementLayoutId layout_id;
357 SVGA3dPrimitiveType topology;
358
359 /** Vertex buffer state */
360 SVGA3dVertexBuffer vbuffers[PIPE_MAX_ATTRIBS];
361 struct svga_winsys_surface *vbuffer_handles[PIPE_MAX_ATTRIBS];
362 unsigned num_vbuffers;
363
364 struct svga_winsys_surface *ib; /**< index buffer for drawing */
365 SVGA3dSurfaceFormat ib_format;
366 unsigned ib_offset;
367
368 unsigned num_samplers[PIPE_SHADER_TYPES];
369 SVGA3dSamplerId samplers[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
370
371 /* used for rebinding */
372 unsigned num_sampler_views[PIPE_SHADER_TYPES];
373 unsigned default_constbuf_size[PIPE_SHADER_TYPES];
374 };
375
376
377 /* Updated by calling svga_update_state( SVGA_STATE_NEED_SWTNL )
378 */
379 struct svga_sw_state
380 {
381 /* which parts we need */
382 boolean need_swvfetch;
383 boolean need_pipeline;
384 boolean need_swtnl;
385
386 /* Flag to make sure that need sw is on while
387 * updating state within a swtnl call.
388 */
389 boolean in_swtnl_draw;
390 };
391
392
393 /* Queue some state updates (like rss) and submit them to hardware in
394 * a single packet.
395 */
396 struct svga_hw_queue;
397
398 struct svga_query;
399 struct svga_qmem_alloc_entry;
400
401 struct svga_context
402 {
403 struct pipe_context pipe;
404 struct svga_winsys_context *swc;
405 struct blitter_context *blitter;
406 struct u_upload_mgr *const0_upload;
407
408 struct {
409 boolean no_swtnl;
410 boolean force_swtnl;
411 boolean use_min_mipmap;
412
413 /* incremented for each shader */
414 unsigned shader_id;
415
416 unsigned disable_shader;
417
418 boolean no_line_width;
419 boolean force_hw_line_stipple;
420
421 /** To report perf/conformance/etc issues to the state tracker */
422 struct pipe_debug_callback callback;
423 } debug;
424
425 struct {
426 struct draw_context *draw;
427 struct vbuf_render *backend;
428 unsigned hw_prim;
429 boolean new_vbuf;
430 boolean new_vdecl;
431 } swtnl;
432
433 /* Bitmask of blend state objects IDs */
434 struct util_bitmask *blend_object_id_bm;
435
436 /* Bitmask of depth/stencil state objects IDs */
437 struct util_bitmask *ds_object_id_bm;
438
439 /* Bitmaks of input element object IDs */
440 struct util_bitmask *input_element_object_id_bm;
441
442 /* Bitmask of rasterizer object IDs */
443 struct util_bitmask *rast_object_id_bm;
444
445 /* Bitmask of sampler state objects IDs */
446 struct util_bitmask *sampler_object_id_bm;
447
448 /* Bitmask of sampler view IDs */
449 struct util_bitmask *sampler_view_id_bm;
450
451 /* Bitmask of used shader IDs */
452 struct util_bitmask *shader_id_bm;
453
454 /* Bitmask of used surface view IDs */
455 struct util_bitmask *surface_view_id_bm;
456
457 /* Bitmask of used stream output IDs */
458 struct util_bitmask *stream_output_id_bm;
459
460 /* Bitmask of used query IDs */
461 struct util_bitmask *query_id_bm;
462
463 struct {
464 unsigned dirty[SVGA_STATE_MAX];
465
466 /** bitmasks of which const buffers are changed */
467 unsigned dirty_constbufs[PIPE_SHADER_TYPES];
468
469 unsigned texture_timestamp;
470
471 /*
472 */
473 struct svga_sw_state sw;
474 struct svga_hw_draw_state hw_draw;
475 struct svga_hw_clear_state hw_clear;
476 } state;
477
478 struct svga_state curr; /* state from the state tracker */
479 unsigned dirty; /* statechanges since last update_state() */
480
481 union {
482 struct {
483 unsigned rendertargets:1;
484 unsigned texture_samplers:1;
485 unsigned constbufs:1;
486 unsigned vs:1;
487 unsigned fs:1;
488 unsigned gs:1;
489 unsigned query:1;
490 } flags;
491 unsigned val;
492 } rebind;
493
494 struct svga_hwtnl *hwtnl;
495
496 /** Queries states */
497 struct svga_winsys_gb_query *gb_query; /**< gb query object, one per context */
498 unsigned gb_query_len; /**< gb query object size */
499 struct util_bitmask *gb_query_alloc_mask; /**< gb query object allocation mask */
500 struct svga_qmem_alloc_entry *gb_query_map[SVGA_QUERY_MAX];
501 /**< query mem block mapping */
502 struct svga_query *sq[SVGA_QUERY_MAX]; /**< queries currently in progress */
503
504 /** List of buffers with queued transfers */
505 struct list_head dirty_buffers;
506
507 /** performance / info queries for HUD */
508 struct {
509 uint64_t num_draw_calls; /**< SVGA_QUERY_DRAW_CALLS */
510 uint64_t num_fallbacks; /**< SVGA_QUERY_NUM_FALLBACKS */
511 uint64_t num_flushes; /**< SVGA_QUERY_NUM_FLUSHES */
512 uint64_t num_validations; /**< SVGA_QUERY_NUM_VALIDATIONS */
513 uint64_t map_buffer_time; /**< SVGA_QUERY_MAP_BUFFER_TIME */
514 uint64_t num_resources_mapped; /**< SVGA_QUERY_NUM_RESOURCES_MAPPED */
515 uint64_t command_buffer_size; /**< SVGA_QUERY_COMMAND_BUFFER_SIZE */
516 uint64_t flush_time; /**< SVGA_QUERY_FLUSH_TIME */
517 uint64_t surface_write_flushes; /**< SVGA_QUERY_SURFACE_WRITE_FLUSHES */
518 uint64_t num_readbacks; /**< SVGA_QUERY_NUM_READBACKS */
519 uint64_t num_resource_updates; /**< SVGA_QUERY_NUM_RESOURCE_UPDATES */
520 uint64_t num_buffer_uploads; /**< SVGA_QUERY_NUM_BUFFER_UPLOADS */
521 uint64_t num_const_buf_updates; /**< SVGA_QUERY_NUM_CONST_BUF_UPDATES */
522 uint64_t num_const_updates; /**< SVGA_QUERY_NUM_CONST_UPDATES */
523 uint64_t num_shaders; /**< SVGA_QUERY_NUM_SHADERS */
524
525 /** The following are summed for SVGA_QUERY_NUM_STATE_OBJECTS */
526 uint64_t num_blend_objects;
527 uint64_t num_depthstencil_objects;
528 uint64_t num_rasterizer_objects;
529 uint64_t num_sampler_objects;
530 uint64_t num_samplerview_objects;
531 uint64_t num_vertexelement_objects;
532
533 uint64_t num_surface_views; /**< SVGA_QUERY_NUM_SURFACE_VIEWS */
534 uint64_t num_bytes_uploaded; /**< SVGA_QUERY_NUM_BYTES_UPLOADED */
535 uint64_t num_generate_mipmap; /**< SVGA_QUERY_NUM_GENERATE_MIPMAP */
536 } hud;
537
538 /** The currently bound stream output targets */
539 unsigned num_so_targets;
540 struct svga_winsys_surface *so_surfaces[SVGA3D_DX_MAX_SOTARGETS];
541 struct pipe_stream_output_target *so_targets[SVGA3D_DX_MAX_SOTARGETS];
542 struct svga_stream_output *current_so;
543
544 /** A blend state with blending disabled, for falling back to when blending
545 * is illegal (e.g. an integer texture is bound)
546 */
547 struct svga_blend_state *noop_blend;
548
549 struct {
550 struct pipe_resource *texture;
551 struct svga_pipe_sampler_view *sampler_view;
552 void *sampler;
553 } polygon_stipple;
554
555 /** Alternate rasterizer states created for point sprite */
556 struct svga_rasterizer_state *rasterizer_no_cull[2];
557 };
558
559 /* A flag for each state_tracker state object:
560 */
561 #define SVGA_NEW_BLEND 0x1
562 #define SVGA_NEW_DEPTH_STENCIL_ALPHA 0x2
563 #define SVGA_NEW_RAST 0x4
564 #define SVGA_NEW_SAMPLER 0x8
565 #define SVGA_NEW_TEXTURE 0x10
566 #define SVGA_NEW_VBUFFER 0x20
567 #define SVGA_NEW_VELEMENT 0x40
568 #define SVGA_NEW_FS 0x80
569 #define SVGA_NEW_VS 0x100
570 #define SVGA_NEW_FS_CONST_BUFFER 0x200
571 #define SVGA_NEW_VS_CONST_BUFFER 0x400
572 #define SVGA_NEW_FRAME_BUFFER 0x800
573 #define SVGA_NEW_STIPPLE 0x1000
574 #define SVGA_NEW_SCISSOR 0x2000
575 #define SVGA_NEW_BLEND_COLOR 0x4000
576 #define SVGA_NEW_CLIP 0x8000
577 #define SVGA_NEW_VIEWPORT 0x10000
578 #define SVGA_NEW_PRESCALE 0x20000
579 #define SVGA_NEW_REDUCED_PRIMITIVE 0x40000
580 #define SVGA_NEW_TEXTURE_BINDING 0x80000
581 #define SVGA_NEW_NEED_PIPELINE 0x100000
582 #define SVGA_NEW_NEED_SWVFETCH 0x200000
583 #define SVGA_NEW_NEED_SWTNL 0x400000
584 #define SVGA_NEW_FS_VARIANT 0x800000
585 #define SVGA_NEW_VS_VARIANT 0x1000000
586 #define SVGA_NEW_TEXTURE_FLAGS 0x4000000
587 #define SVGA_NEW_STENCIL_REF 0x8000000
588 #define SVGA_NEW_GS 0x10000000
589 #define SVGA_NEW_GS_CONST_BUFFER 0x20000000
590 #define SVGA_NEW_GS_VARIANT 0x40000000
591 #define SVGA_NEW_TEXTURE_CONSTS 0x80000000
592
593
594
595
596 /***********************************************************************
597 * svga_clear.c:
598 */
599 void svga_clear(struct pipe_context *pipe,
600 unsigned buffers,
601 const union pipe_color_union *color,
602 double depth,
603 unsigned stencil);
604
605
606 /***********************************************************************
607 * svga_screen_texture.c:
608 */
609 void svga_mark_surfaces_dirty(struct svga_context *svga);
610
611
612
613
614 void svga_init_state_functions( struct svga_context *svga );
615 void svga_init_flush_functions( struct svga_context *svga );
616 void svga_init_string_functions( struct svga_context *svga );
617 void svga_init_blit_functions(struct svga_context *svga);
618
619 void svga_init_blend_functions( struct svga_context *svga );
620 void svga_init_depth_stencil_functions( struct svga_context *svga );
621 void svga_init_misc_functions( struct svga_context *svga );
622 void svga_init_rasterizer_functions( struct svga_context *svga );
623 void svga_init_sampler_functions( struct svga_context *svga );
624 void svga_init_fs_functions( struct svga_context *svga );
625 void svga_init_vs_functions( struct svga_context *svga );
626 void svga_init_gs_functions( struct svga_context *svga );
627 void svga_init_vertex_functions( struct svga_context *svga );
628 void svga_init_constbuffer_functions( struct svga_context *svga );
629 void svga_init_draw_functions( struct svga_context *svga );
630 void svga_init_query_functions( struct svga_context *svga );
631 void svga_init_surface_functions(struct svga_context *svga);
632 void svga_init_stream_output_functions( struct svga_context *svga );
633
634 void svga_cleanup_vertex_state( struct svga_context *svga );
635 void svga_cleanup_tss_binding( struct svga_context *svga );
636 void svga_cleanup_framebuffer( struct svga_context *svga );
637
638 void svga_context_flush( struct svga_context *svga,
639 struct pipe_fence_handle **pfence );
640
641 void svga_context_finish(struct svga_context *svga);
642
643 void svga_hwtnl_flush_retry( struct svga_context *svga );
644 void svga_hwtnl_flush_buffer( struct svga_context *svga,
645 struct pipe_resource *buffer );
646
647 void svga_surfaces_flush(struct svga_context *svga);
648
649 struct pipe_context *
650 svga_context_create(struct pipe_screen *screen,
651 void *priv, unsigned flags);
652
653
654 /***********************************************************************
655 * Inline conversion functions. These are better-typed than the
656 * macros used previously:
657 */
658 static inline struct svga_context *
659 svga_context( struct pipe_context *pipe )
660 {
661 return (struct svga_context *)pipe;
662 }
663
664
665 static inline boolean
666 svga_have_gb_objects(const struct svga_context *svga)
667 {
668 return svga_screen(svga->pipe.screen)->sws->have_gb_objects;
669 }
670
671 static inline boolean
672 svga_have_gb_dma(const struct svga_context *svga)
673 {
674 return svga_screen(svga->pipe.screen)->sws->have_gb_dma;
675 }
676
677 static inline boolean
678 svga_have_vgpu10(const struct svga_context *svga)
679 {
680 return svga_screen(svga->pipe.screen)->sws->have_vgpu10;
681 }
682
683 static inline boolean
684 svga_need_to_rebind_resources(const struct svga_context *svga)
685 {
686 return svga_screen(svga->pipe.screen)->sws->need_to_rebind_resources;
687 }
688
689 static inline boolean
690 svga_rects_equal(const SVGA3dRect *r1, const SVGA3dRect *r2)
691 {
692 return memcmp(r1, r2, sizeof(*r1)) == 0;
693 }
694
695 #endif