src/gallium/drivers/svga/svga_draw.c

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #include "pipe/p_compiler.h"
  27 #include "util/u_inlines.h"
  28 #include "pipe/p_defines.h"
  29 #include "util/u_helpers.h"
  30 #include "util/u_memory.h"
  31 #include "util/u_math.h"
  32
  33 #include "svga_context.h"
  34 #include "svga_draw.h"
  35 #include "svga_draw_private.h"
  36 #include "svga_debug.h"
  37 #include "svga_screen.h"
  38 #include "svga_resource.h"
  39 #include "svga_resource_buffer.h"
  40 #include "svga_resource_texture.h"
  41 #include "svga_shader.h"
  42 #include "svga_surface.h"
  43 #include "svga_winsys.h"
  44 #include "svga_cmd.h"
  45
  46
  47 struct svga_hwtnl *
  48 svga_hwtnl_create(struct svga_context *svga)
  49 {
  50    struct svga_hwtnl *hwtnl = CALLOC_STRUCT(svga_hwtnl);
  51    if (!hwtnl)
  52       goto fail;
  53
  54    hwtnl->svga = svga;
  55
  56    hwtnl->cmd.swc = svga->swc;
  57
  58    return hwtnl;
  59
  60 fail:
  61    return NULL;
  62 }
  63
  64
  65 void
  66 svga_hwtnl_destroy(struct svga_hwtnl *hwtnl)
  67 {
  68    unsigned i, j;
  69
  70    for (i = 0; i < PIPE_PRIM_MAX; i++) {
  71       for (j = 0; j < IDX_CACHE_MAX; j++) {
  72          pipe_resource_reference(&hwtnl->index_cache[i][j].buffer, NULL);
  73       }
  74    }
  75
  76    for (i = 0; i < hwtnl->cmd.vbuf_count; i++)
  77       pipe_resource_reference(&hwtnl->cmd.vbufs[i].buffer, NULL);
  78
  79    for (i = 0; i < hwtnl->cmd.prim_count; i++)
  80       pipe_resource_reference(&hwtnl->cmd.prim_ib[i], NULL);
  81
  82    FREE(hwtnl);
  83 }
  84
  85
  86 void
  87 svga_hwtnl_set_flatshade(struct svga_hwtnl *hwtnl,
  88                          boolean flatshade, boolean flatshade_first)
  89 {
  90    struct svga_screen *svgascreen = svga_screen(hwtnl->svga->pipe.screen);
  91
  92    /* User-specified PV */
  93    hwtnl->api_pv = (flatshade && !flatshade_first) ? PV_LAST : PV_FIRST;
  94
  95    /* Device supported PV */
  96    if (svgascreen->haveProvokingVertex) {
  97       /* use the mode specified by the user */
  98       hwtnl->hw_pv = hwtnl->api_pv;
  99    }
 100    else {
 101       /* the device only support first provoking vertex */
 102       hwtnl->hw_pv = PV_FIRST;
 103    }
 104 }
 105
 106
 107 void
 108 svga_hwtnl_set_fillmode(struct svga_hwtnl *hwtnl, unsigned mode)
 109 {
 110    hwtnl->api_fillmode = mode;
 111 }
 112
 113
 114 void
 115 svga_hwtnl_vertex_decls(struct svga_hwtnl *hwtnl,
 116                         unsigned count,
 117                         const SVGA3dVertexDecl * decls,
 118                         const unsigned *buffer_indexes,
 119                         SVGA3dElementLayoutId layout_id)
 120 {
 121    assert(hwtnl->cmd.prim_count == 0);
 122    hwtnl->cmd.vdecl_count = count;
 123    hwtnl->cmd.vdecl_layout_id = layout_id;
 124    memcpy(hwtnl->cmd.vdecl, decls, count * sizeof(*decls));
 125    memcpy(hwtnl->cmd.vdecl_buffer_index, buffer_indexes,
 126           count * sizeof(unsigned));
 127 }
 128
 129
 130 /**
 131  * Specify vertex buffers for hardware drawing.
 132  */
 133 void
 134 svga_hwtnl_vertex_buffers(struct svga_hwtnl *hwtnl,
 135                           unsigned count, struct pipe_vertex_buffer *buffers)
 136 {
 137    util_set_vertex_buffers_count(hwtnl->cmd.vbufs,
 138                                  &hwtnl->cmd.vbuf_count, buffers, 0, count);
 139 }
 140
 141
 142 /**
 143  * Determine whether the specified buffer is referred in the primitive queue,
 144  * for which no commands have been written yet.
 145  */
 146 boolean
 147 svga_hwtnl_is_buffer_referred(struct svga_hwtnl *hwtnl,
 148                               struct pipe_resource *buffer)
 149 {
 150    unsigned i;
 151
 152    if (svga_buffer_is_user_buffer(buffer)) {
 153       return FALSE;
 154    }
 155
 156    if (!hwtnl->cmd.prim_count) {
 157       return FALSE;
 158    }
 159
 160    for (i = 0; i < hwtnl->cmd.vbuf_count; ++i) {
 161       if (hwtnl->cmd.vbufs[i].buffer == buffer) {
 162          return TRUE;
 163       }
 164    }
 165
 166    for (i = 0; i < hwtnl->cmd.prim_count; ++i) {
 167       if (hwtnl->cmd.prim_ib[i] == buffer) {
 168          return TRUE;
 169       }
 170    }
 171
 172    return FALSE;
 173 }
 174
 175
 176 static enum pipe_error
 177 draw_vgpu9(struct svga_hwtnl *hwtnl)
 178 {
 179    struct svga_winsys_context *swc = hwtnl->cmd.swc;
 180    struct svga_context *svga = hwtnl->svga;
 181    enum pipe_error ret;
 182    struct svga_winsys_surface *vb_handle[SVGA3D_INPUTREG_MAX];
 183    struct svga_winsys_surface *ib_handle[QSZ];
 184    struct svga_winsys_surface *handle;
 185    SVGA3dVertexDecl *vdecl;
 186    SVGA3dPrimitiveRange *prim;
 187    unsigned i;
 188
 189    for (i = 0; i < hwtnl->cmd.vdecl_count; i++) {
 190       unsigned j = hwtnl->cmd.vdecl_buffer_index[i];
 191       handle = svga_buffer_handle(svga, hwtnl->cmd.vbufs[j].buffer);
 192       if (!handle)
 193          return PIPE_ERROR_OUT_OF_MEMORY;
 194
 195       vb_handle[i] = handle;
 196    }
 197
 198    for (i = 0; i < hwtnl->cmd.prim_count; i++) {
 199       if (hwtnl->cmd.prim_ib[i]) {
 200          handle = svga_buffer_handle(svga, hwtnl->cmd.prim_ib[i]);
 201          if (!handle)
 202             return PIPE_ERROR_OUT_OF_MEMORY;
 203       }
 204       else
 205          handle = NULL;
 206
 207       ib_handle[i] = handle;
 208    }
 209
 210    if (svga->rebind.flags.rendertargets) {
 211       ret = svga_reemit_framebuffer_bindings(svga);
 212       if (ret != PIPE_OK) {
 213          return ret;
 214       }
 215    }
 216
 217    if (svga->rebind.flags.texture_samplers) {
 218       ret = svga_reemit_tss_bindings(svga);
 219       if (ret != PIPE_OK) {
 220          return ret;
 221       }
 222    }
 223
 224    if (svga->rebind.flags.vs) {
 225       ret = svga_reemit_vs_bindings(svga);
 226       if (ret != PIPE_OK) {
 227          return ret;
 228       }
 229    }
 230
 231    if (svga->rebind.flags.fs) {
 232       ret = svga_reemit_fs_bindings(svga);
 233       if (ret != PIPE_OK) {
 234          return ret;
 235       }
 236    }
 237
 238    SVGA_DBG(DEBUG_DMA, "draw to sid %p, %d prims\n",
 239             svga->curr.framebuffer.cbufs[0] ?
 240             svga_surface(svga->curr.framebuffer.cbufs[0])->handle : NULL,
 241             hwtnl->cmd.prim_count);
 242
 243    ret = SVGA3D_BeginDrawPrimitives(swc,
 244                                     &vdecl,
 245                                     hwtnl->cmd.vdecl_count,
 246                                     &prim, hwtnl->cmd.prim_count);
 247    if (ret != PIPE_OK)
 248       return ret;
 249
 250    memcpy(vdecl,
 251           hwtnl->cmd.vdecl,
 252           hwtnl->cmd.vdecl_count * sizeof hwtnl->cmd.vdecl[0]);
 253
 254    for (i = 0; i < hwtnl->cmd.vdecl_count; i++) {
 255       /* check for 4-byte alignment */
 256       assert(vdecl[i].array.offset % 4 == 0);
 257       assert(vdecl[i].array.stride % 4 == 0);
 258
 259       /* Given rangeHint is considered to be relative to indexBias, and
 260        * indexBias varies per primitive, we cannot accurately supply an
 261        * rangeHint when emitting more than one primitive per draw command.
 262        */
 263       if (hwtnl->cmd.prim_count == 1) {
 264          vdecl[i].rangeHint.first = hwtnl->cmd.min_index[0];
 265          vdecl[i].rangeHint.last = hwtnl->cmd.max_index[0] + 1;
 266       }
 267       else {
 268          vdecl[i].rangeHint.first = 0;
 269          vdecl[i].rangeHint.last = 0;
 270       }
 271
 272       swc->surface_relocation(swc,
 273                               &vdecl[i].array.surfaceId,
 274                               NULL, vb_handle[i], SVGA_RELOC_READ);
 275    }
 276
 277    memcpy(prim,
 278           hwtnl->cmd.prim, hwtnl->cmd.prim_count * sizeof hwtnl->cmd.prim[0]);
 279
 280    for (i = 0; i < hwtnl->cmd.prim_count; i++) {
 281       swc->surface_relocation(swc,
 282                               &prim[i].indexArray.surfaceId,
 283                               NULL, ib_handle[i], SVGA_RELOC_READ);
 284       pipe_resource_reference(&hwtnl->cmd.prim_ib[i], NULL);
 285    }
 286
 287    SVGA_FIFOCommitAll(swc);
 288
 289    hwtnl->cmd.prim_count = 0;
 290
 291    return PIPE_OK;
 292 }
 293
 294
 295 static SVGA3dSurfaceFormat
 296 xlate_index_format(unsigned indexWidth)
 297 {
 298    if (indexWidth == 2) {
 299       return SVGA3D_R16_UINT;
 300    }
 301    else if (indexWidth == 4) {
 302       return SVGA3D_R32_UINT;
 303    }
 304    else {
 305       assert(!"Bad indexWidth");
 306       return SVGA3D_R32_UINT;
 307    }
 308 }
 309
 310
 311 static enum pipe_error
 312 validate_sampler_resources(struct svga_context *svga)
 313 {
 314    unsigned shader;
 315
 316    assert(svga_have_vgpu10(svga));
 317
 318    for (shader = PIPE_SHADER_VERTEX; shader <= PIPE_SHADER_GEOMETRY; shader++) {
 319       unsigned count = svga->curr.num_sampler_views[shader];
 320       unsigned i;
 321       struct svga_winsys_surface *surfaces[PIPE_MAX_SAMPLERS];
 322       enum pipe_error ret;
 323
 324       /*
 325        * Reference bound sampler resources to ensure pending updates are
 326        * noticed by the device.
 327        */
 328       for (i = 0; i < count; i++) {
 329          struct svga_pipe_sampler_view *sv =
 330             svga_pipe_sampler_view(svga->curr.sampler_views[shader][i]);
 331
 332          if (sv) {
 333             if (sv->base.texture->target == PIPE_BUFFER) {
 334                surfaces[i] = svga_buffer_handle(svga, sv->base.texture);
 335             }
 336             else {
 337                surfaces[i] = svga_texture(sv->base.texture)->handle;
 338             }
 339          }
 340          else {
 341             surfaces[i] = NULL;
 342          }
 343       }
 344
 345       if (shader == PIPE_SHADER_FRAGMENT &&
 346           svga->curr.rast->templ.poly_stipple_enable) {
 347          const unsigned unit = svga->state.hw_draw.fs->pstipple_sampler_unit;
 348          struct svga_pipe_sampler_view *sv =
 349             svga->polygon_stipple.sampler_view;
 350
 351          assert(sv);
 352          surfaces[unit] = svga_texture(sv->base.texture)->handle;
 353          count = MAX2(count, unit+1);
 354       }
 355
 356       /* rebind the shader resources if needed */
 357       if (svga->rebind.flags.texture_samplers) {
 358          for (i = 0; i < count; i++) {
 359             if (surfaces[i]) {
 360                ret = svga->swc->resource_rebind(svga->swc,
 361                                                 surfaces[i],
 362                                                 NULL,
 363                                                 SVGA_RELOC_READ);
 364                if (ret != PIPE_OK)
 365                   return ret;
 366             }
 367          }
 368       }
 369    }
 370    svga->rebind.flags.texture_samplers = FALSE;
 371
 372    return PIPE_OK;
 373 }
 374
 375
 376 static enum pipe_error
 377 validate_constant_buffers(struct svga_context *svga)
 378 {
 379    unsigned shader;
 380
 381    assert(svga_have_vgpu10(svga));
 382
 383    for (shader = PIPE_SHADER_VERTEX; shader <= PIPE_SHADER_GEOMETRY; shader++) {
 384       enum pipe_error ret;
 385       struct svga_buffer *buffer;
 386       struct svga_winsys_surface *handle;
 387       unsigned enabled_constbufs;
 388
 389       /* Rebind the default constant buffer if needed */
 390       if (svga->rebind.flags.constbufs) {
 391          buffer = svga_buffer(svga->state.hw_draw.constbuf[shader]);
 392          if (buffer) {
 393             ret = svga->swc->resource_rebind(svga->swc,
 394                                              buffer->handle,
 395                                              NULL,
 396                                              SVGA_RELOC_READ);
 397             if (ret != PIPE_OK)
 398                return ret;
 399          }
 400       }
 401
 402       /*
 403        * Reference other bound constant buffers to ensure pending updates are
 404        * noticed by the device.
 405        */
 406       enabled_constbufs = svga->state.hw_draw.enabled_constbufs[shader] & ~1u;
 407       while (enabled_constbufs) {
 408          unsigned i = u_bit_scan(&enabled_constbufs);
 409          buffer = svga_buffer(svga->curr.constbufs[shader][i].buffer);
 410          if (buffer) {
 411             handle = svga_buffer_handle(svga, &buffer->b.b);
 412
 413             if (svga->rebind.flags.constbufs) {
 414                ret = svga->swc->resource_rebind(svga->swc,
 415                                                 handle,
 416                                                 NULL,
 417                                                 SVGA_RELOC_READ);
 418                if (ret != PIPE_OK)
 419                   return ret;
 420             }
 421          }
 422       }
 423    }
 424    svga->rebind.flags.constbufs = FALSE;
 425
 426    return PIPE_OK;
 427 }
 428
 429
 430 static enum pipe_error
 431 draw_vgpu10(struct svga_hwtnl *hwtnl,
 432             const SVGA3dPrimitiveRange *range,
 433             unsigned vcount,
 434             unsigned min_index,
 435             unsigned max_index, struct pipe_resource *ib,
 436             unsigned start_instance, unsigned instance_count)
 437 {
 438    struct svga_context *svga = hwtnl->svga;
 439    struct svga_winsys_surface *vb_handle[SVGA3D_INPUTREG_MAX];
 440    struct svga_winsys_surface *ib_handle;
 441    const unsigned vbuf_count = hwtnl->cmd.vbuf_count;
 442    enum pipe_error ret;
 443    unsigned i;
 444
 445    assert(svga_have_vgpu10(svga));
 446    assert(hwtnl->cmd.prim_count == 0);
 447
 448    /* We need to reemit all the current resource bindings along with the Draw
 449     * command to be sure that the referenced resources are available for the
 450     * Draw command, just in case the surfaces associated with the resources
 451     * are paged out.
 452     */
 453    if (svga->rebind.val) {
 454       ret = svga_rebind_framebuffer_bindings(svga);
 455       if (ret != PIPE_OK)
 456          return ret;
 457
 458       ret = svga_rebind_shaders(svga);
 459       if (ret != PIPE_OK)
 460          return ret;
 461
 462       /* Rebind stream output targets */
 463       ret = svga_rebind_stream_output_targets(svga);
 464       if (ret != PIPE_OK)
 465          return ret;
 466
 467       /* Rebind index buffer */
 468       if (svga->state.hw_draw.ib) {
 469          struct svga_winsys_context *swc = svga->swc;
 470          ret = swc->resource_rebind(swc, svga->state.hw_draw.ib, NULL, SVGA_RELOC_READ);
 471          if (ret != PIPE_OK)
 472             return ret;
 473       }
 474    }
 475
 476    ret = validate_sampler_resources(svga);
 477    if (ret != PIPE_OK)
 478       return ret;
 479
 480    ret = validate_constant_buffers(svga);
 481    if (ret != PIPE_OK)
 482       return ret;
 483
 484    /* Get handle for each referenced vertex buffer */
 485    for (i = 0; i < vbuf_count; i++) {
 486       struct svga_buffer *sbuf = svga_buffer(hwtnl->cmd.vbufs[i].buffer);
 487
 488       if (sbuf) {
 489          assert(sbuf->key.flags & SVGA3D_SURFACE_BIND_VERTEX_BUFFER);
 490          vb_handle[i] = svga_buffer_handle(svga, &sbuf->b.b);
 491          if (vb_handle[i] == NULL)
 492             return PIPE_ERROR_OUT_OF_MEMORY;
 493       }
 494       else {
 495          vb_handle[i] = NULL;
 496       }
 497    }
 498
 499    /* Get handles for the index buffers */
 500    if (ib) {
 501       struct svga_buffer *sbuf = svga_buffer(ib);
 502
 503       assert(sbuf->key.flags & SVGA3D_SURFACE_BIND_INDEX_BUFFER);
 504       (void) sbuf; /* silence unused var warning */
 505
 506       ib_handle = svga_buffer_handle(svga, ib);
 507       if (!ib_handle)
 508          return PIPE_ERROR_OUT_OF_MEMORY;
 509    }
 510    else {
 511       ib_handle = NULL;
 512    }
 513
 514    /* setup vertex attribute input layout */
 515    if (svga->state.hw_draw.layout_id != hwtnl->cmd.vdecl_layout_id) {
 516       ret = SVGA3D_vgpu10_SetInputLayout(svga->swc,
 517                                          hwtnl->cmd.vdecl_layout_id);
 518       if (ret != PIPE_OK)
 519          return ret;
 520
 521       svga->state.hw_draw.layout_id = hwtnl->cmd.vdecl_layout_id;
 522    }
 523
 524    /* setup vertex buffers */
 525    {
 526       SVGA3dVertexBuffer buffers[PIPE_MAX_ATTRIBS];
 527
 528       for (i = 0; i < vbuf_count; i++) {
 529          buffers[i].stride = hwtnl->cmd.vbufs[i].stride;
 530          buffers[i].offset = hwtnl->cmd.vbufs[i].buffer_offset;
 531       }
 532       if (vbuf_count > 0) {
 533          /* If we haven't yet emitted a drawing command or if any
 534           * vertex buffer state is changing, issue that state now.
 535           */
 536          if (((hwtnl->cmd.swc->hints & SVGA_HINT_FLAG_CAN_PRE_FLUSH) == 0) ||
 537              vbuf_count != svga->state.hw_draw.num_vbuffers ||
 538              memcmp(buffers, svga->state.hw_draw.vbuffers,
 539                     vbuf_count * sizeof(buffers[0])) ||
 540              memcmp(vb_handle, svga->state.hw_draw.vbuffer_handles,
 541                     vbuf_count * sizeof(vb_handle[0]))) {
 542             ret = SVGA3D_vgpu10_SetVertexBuffers(svga->swc, vbuf_count,
 543                                                  0,    /* startBuffer */
 544                                                  buffers, vb_handle);
 545             if (ret != PIPE_OK)
 546                return ret;
 547
 548             svga->state.hw_draw.num_vbuffers = vbuf_count;
 549             memcpy(svga->state.hw_draw.vbuffers, buffers,
 550                    vbuf_count * sizeof(buffers[0]));
 551             memcpy(svga->state.hw_draw.vbuffer_handles, vb_handle,
 552                    vbuf_count * sizeof(vb_handle[0]));
 553          }
 554       }
 555    }
 556
 557    /* Set primitive type (line, tri, etc) */
 558    if (svga->state.hw_draw.topology != range->primType) {
 559       ret = SVGA3D_vgpu10_SetTopology(svga->swc, range->primType);
 560       if (ret != PIPE_OK)
 561          return ret;
 562
 563       svga->state.hw_draw.topology = range->primType;
 564    }
 565
 566    if (ib_handle) {
 567       /* indexed drawing */
 568       SVGA3dSurfaceFormat indexFormat = xlate_index_format(range->indexWidth);
 569
 570       /* setup index buffer */
 571       if (ib_handle != svga->state.hw_draw.ib ||
 572           indexFormat != svga->state.hw_draw.ib_format ||
 573           range->indexArray.offset != svga->state.hw_draw.ib_offset) {
 574          ret = SVGA3D_vgpu10_SetIndexBuffer(svga->swc, ib_handle,
 575                                             indexFormat,
 576                                             range->indexArray.offset);
 577          if (ret != PIPE_OK)
 578             return ret;
 579          svga->state.hw_draw.ib = ib_handle;
 580          svga->state.hw_draw.ib_format = indexFormat;
 581          svga->state.hw_draw.ib_offset = range->indexArray.offset;
 582       }
 583
 584       if (instance_count > 1) {
 585          ret = SVGA3D_vgpu10_DrawIndexedInstanced(svga->swc,
 586                                                   vcount,
 587                                                   instance_count,
 588                                                   0, /* startIndexLocation */
 589                                                   range->indexBias,
 590                                                   start_instance);
 591          if (ret != PIPE_OK)
 592             return ret;
 593       }
 594       else {
 595          /* non-instanced drawing */
 596          ret = SVGA3D_vgpu10_DrawIndexed(svga->swc,
 597                                          vcount,
 598                                          0,      /* startIndexLocation */
 599                                          range->indexBias);
 600          if (ret != PIPE_OK)
 601             return ret;
 602       }
 603    }
 604    else {
 605       /* non-indexed drawing */
 606       if (svga->state.hw_draw.ib_format != SVGA3D_FORMAT_INVALID) {
 607          /* Unbind previously bound index buffer */
 608          ret = SVGA3D_vgpu10_SetIndexBuffer(svga->swc, NULL,
 609                                             SVGA3D_FORMAT_INVALID, 0);
 610          if (ret != PIPE_OK)
 611             return ret;
 612          svga->state.hw_draw.ib_format = SVGA3D_FORMAT_INVALID;
 613          svga->state.hw_draw.ib = NULL;
 614       }
 615
 616       if (instance_count > 1) {
 617          ret = SVGA3D_vgpu10_DrawInstanced(svga->swc,
 618                                            vcount,
 619                                            instance_count,
 620                                            range->indexBias,
 621                                            start_instance);
 622          if (ret != PIPE_OK)
 623             return ret;
 624       }
 625       else {
 626          /* non-instanced */
 627          ret = SVGA3D_vgpu10_Draw(svga->swc,
 628                                   vcount,
 629                                   range->indexBias);
 630          if (ret != PIPE_OK)
 631             return ret;
 632       }
 633    }
 634
 635    hwtnl->cmd.prim_count = 0;
 636
 637    return PIPE_OK;
 638 }
 639
 640
 641
 642 /**
 643  * Emit any pending drawing commands to the command buffer.
 644  * When we receive VGPU9 drawing commands we accumulate them and don't
 645  * immediately emit them into the command buffer.
 646  * This function needs to be called before we change state that could
 647  * effect those pending draws.
 648  */
 649 enum pipe_error
 650 svga_hwtnl_flush(struct svga_hwtnl *hwtnl)
 651 {
 652    if (!svga_have_vgpu10(hwtnl->svga) && hwtnl->cmd.prim_count) {
 653       /* we only queue up primitive for VGPU9 */
 654       return draw_vgpu9(hwtnl);
 655    }
 656    return PIPE_OK;
 657 }
 658
 659
 660 void
 661 svga_hwtnl_set_index_bias(struct svga_hwtnl *hwtnl, int index_bias)
 662 {
 663    hwtnl->index_bias = index_bias;
 664 }
 665
 666
 667
 668 /***********************************************************************
 669  * Internal functions:
 670  */
 671
 672 /**
 673  * For debugging only.
 674  */
 675 static void
 676 check_draw_params(struct svga_hwtnl *hwtnl,
 677                   const SVGA3dPrimitiveRange *range,
 678                   unsigned min_index, unsigned max_index,
 679                   struct pipe_resource *ib)
 680 {
 681    unsigned i;
 682
 683    assert(!svga_have_vgpu10(hwtnl->svga));
 684
 685    for (i = 0; i < hwtnl->cmd.vdecl_count; i++) {
 686       unsigned j = hwtnl->cmd.vdecl_buffer_index[i];
 687       const struct pipe_vertex_buffer *vb = &hwtnl->cmd.vbufs[j];
 688       unsigned size = vb->buffer ? vb->buffer->width0 : 0;
 689       unsigned offset = hwtnl->cmd.vdecl[i].array.offset;
 690       unsigned stride = hwtnl->cmd.vdecl[i].array.stride;
 691       int index_bias = (int) range->indexBias + hwtnl->index_bias;
 692       unsigned width;
 693
 694       if (size == 0)
 695          continue;
 696
 697       assert(vb);
 698       assert(size);
 699       assert(offset < size);
 700       assert(min_index <= max_index);
 701       (void) width;
 702       (void) stride;
 703       (void) offset;
 704       (void) size;
 705
 706       switch (hwtnl->cmd.vdecl[i].identity.type) {
 707       case SVGA3D_DECLTYPE_FLOAT1:
 708          width = 4;
 709          break;
 710       case SVGA3D_DECLTYPE_FLOAT2:
 711          width = 4 * 2;
 712          break;
 713       case SVGA3D_DECLTYPE_FLOAT3:
 714          width = 4 * 3;
 715          break;
 716       case SVGA3D_DECLTYPE_FLOAT4:
 717          width = 4 * 4;
 718          break;
 719       case SVGA3D_DECLTYPE_D3DCOLOR:
 720          width = 4;
 721          break;
 722       case SVGA3D_DECLTYPE_UBYTE4:
 723          width = 1 * 4;
 724          break;
 725       case SVGA3D_DECLTYPE_SHORT2:
 726          width = 2 * 2;
 727          break;
 728       case SVGA3D_DECLTYPE_SHORT4:
 729          width = 2 * 4;
 730          break;
 731       case SVGA3D_DECLTYPE_UBYTE4N:
 732          width = 1 * 4;
 733          break;
 734       case SVGA3D_DECLTYPE_SHORT2N:
 735          width = 2 * 2;
 736          break;
 737       case SVGA3D_DECLTYPE_SHORT4N:
 738          width = 2 * 4;
 739          break;
 740       case SVGA3D_DECLTYPE_USHORT2N:
 741          width = 2 * 2;
 742          break;
 743       case SVGA3D_DECLTYPE_USHORT4N:
 744          width = 2 * 4;
 745          break;
 746       case SVGA3D_DECLTYPE_UDEC3:
 747          width = 4;
 748          break;
 749       case SVGA3D_DECLTYPE_DEC3N:
 750          width = 4;
 751          break;
 752       case SVGA3D_DECLTYPE_FLOAT16_2:
 753          width = 2 * 2;
 754          break;
 755       case SVGA3D_DECLTYPE_FLOAT16_4:
 756          width = 2 * 4;
 757          break;
 758       default:
 759          assert(0);
 760          width = 0;
 761          break;
 762       }
 763
 764       if (index_bias >= 0) {
 765          assert(offset + index_bias * stride + width <= size);
 766       }
 767
 768       /*
 769        * min_index/max_index are merely conservative guesses, so we can't
 770        * make buffer overflow detection based on their values.
 771        */
 772    }
 773
 774    assert(range->indexWidth == range->indexArray.stride);
 775
 776    if (ib) {
 777       unsigned size = ib->width0;
 778       unsigned offset = range->indexArray.offset;
 779       unsigned stride = range->indexArray.stride;
 780       unsigned count;
 781
 782       assert(size);
 783       assert(offset < size);
 784       assert(stride);
 785       (void) size;
 786       (void) offset;
 787       (void) stride;
 788
 789       switch (range->primType) {
 790       case SVGA3D_PRIMITIVE_POINTLIST:
 791          count = range->primitiveCount;
 792          break;
 793       case SVGA3D_PRIMITIVE_LINELIST:
 794          count = range->primitiveCount * 2;
 795          break;
 796       case SVGA3D_PRIMITIVE_LINESTRIP:
 797          count = range->primitiveCount + 1;
 798          break;
 799       case SVGA3D_PRIMITIVE_TRIANGLELIST:
 800          count = range->primitiveCount * 3;
 801          break;
 802       case SVGA3D_PRIMITIVE_TRIANGLESTRIP:
 803          count = range->primitiveCount + 2;
 804          break;
 805       case SVGA3D_PRIMITIVE_TRIANGLEFAN:
 806          count = range->primitiveCount + 2;
 807          break;
 808       default:
 809          assert(0);
 810          count = 0;
 811          break;
 812       }
 813
 814       assert(offset + count * stride <= size);
 815    }
 816 }
 817
 818
 819 /**
 820  * All drawing filters down into this function, either directly
 821  * on the hardware path or after doing software vertex processing.
 822  */
 823 enum pipe_error
 824 svga_hwtnl_prim(struct svga_hwtnl *hwtnl,
 825                 const SVGA3dPrimitiveRange * range,
 826                 unsigned vcount,
 827                 unsigned min_index,
 828                 unsigned max_index, struct pipe_resource *ib,
 829                 unsigned start_instance, unsigned instance_count)
 830 {
 831    enum pipe_error ret = PIPE_OK;
 832
 833    if (svga_have_vgpu10(hwtnl->svga)) {
 834       /* draw immediately */
 835       ret = draw_vgpu10(hwtnl, range, vcount, min_index, max_index, ib,
 836                         start_instance, instance_count);
 837       if (ret != PIPE_OK) {
 838          svga_context_flush(hwtnl->svga, NULL);
 839          ret = draw_vgpu10(hwtnl, range, vcount, min_index, max_index, ib,
 840                            start_instance, instance_count);
 841          assert(ret == PIPE_OK);
 842       }
 843    }
 844    else {
 845       /* batch up drawing commands */
 846 #ifdef DEBUG
 847       check_draw_params(hwtnl, range, min_index, max_index, ib);
 848       assert(start_instance == 0);
 849       assert(instance_count <= 1);
 850 #else
 851       (void) check_draw_params;
 852 #endif
 853
 854       if (hwtnl->cmd.prim_count + 1 >= QSZ) {
 855          ret = svga_hwtnl_flush(hwtnl);
 856          if (ret != PIPE_OK)
 857             return ret;
 858       }
 859
 860       /* min/max indices are relative to bias */
 861       hwtnl->cmd.min_index[hwtnl->cmd.prim_count] = min_index;
 862       hwtnl->cmd.max_index[hwtnl->cmd.prim_count] = max_index;
 863
 864       hwtnl->cmd.prim[hwtnl->cmd.prim_count] = *range;
 865       hwtnl->cmd.prim[hwtnl->cmd.prim_count].indexBias += hwtnl->index_bias;
 866
 867       pipe_resource_reference(&hwtnl->cmd.prim_ib[hwtnl->cmd.prim_count], ib);
 868       hwtnl->cmd.prim_count++;
 869    }
 870
 871    return ret;
 872 }