gallium: remove pipe_index_buffer and set_index_buffer
[mesa.git] / src / gallium / drivers / svga / svga_pipe_vertex.c
1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 #include "pipe/p_defines.h"
27 #include "util/u_bitmask.h"
28 #include "util/u_format.h"
29 #include "util/u_helpers.h"
30 #include "util/u_inlines.h"
31 #include "util/u_math.h"
32 #include "util/u_memory.h"
33 #include "util/u_transfer.h"
34 #include "tgsi/tgsi_parse.h"
35
36 #include "svga_context.h"
37 #include "svga_cmd.h"
38 #include "svga_format.h"
39 #include "svga_resource_buffer.h"
40 #include "svga_screen.h"
41
42
43 static void svga_set_vertex_buffers(struct pipe_context *pipe,
44 unsigned start_slot, unsigned count,
45 const struct pipe_vertex_buffer *buffers)
46 {
47 struct svga_context *svga = svga_context(pipe);
48
49 util_set_vertex_buffers_count(svga->curr.vb,
50 &svga->curr.num_vertex_buffers,
51 buffers, start_slot, count);
52
53 svga->dirty |= SVGA_NEW_VBUFFER;
54 }
55
56
57 /**
58 * Does the given vertex attrib format need range adjustment in the VS?
59 * Range adjustment scales and biases values from [0,1] to [-1,1].
60 * This lets us avoid the swtnl path.
61 */
62 static boolean
63 attrib_needs_range_adjustment(enum pipe_format format)
64 {
65 switch (format) {
66 case PIPE_FORMAT_R8G8B8_SNORM:
67 return TRUE;
68 default:
69 return FALSE;
70 }
71 }
72
73
74 /**
75 * Given a gallium vertex element format, return the corresponding
76 * SVGA3dDeclType.
77 */
78 static SVGA3dDeclType
79 translate_vertex_format_to_decltype(enum pipe_format format)
80 {
81 switch (format) {
82 case PIPE_FORMAT_R32_FLOAT: return SVGA3D_DECLTYPE_FLOAT1;
83 case PIPE_FORMAT_R32G32_FLOAT: return SVGA3D_DECLTYPE_FLOAT2;
84 case PIPE_FORMAT_R32G32B32_FLOAT: return SVGA3D_DECLTYPE_FLOAT3;
85 case PIPE_FORMAT_R32G32B32A32_FLOAT: return SVGA3D_DECLTYPE_FLOAT4;
86 case PIPE_FORMAT_B8G8R8A8_UNORM: return SVGA3D_DECLTYPE_D3DCOLOR;
87 case PIPE_FORMAT_R8G8B8A8_USCALED: return SVGA3D_DECLTYPE_UBYTE4;
88 case PIPE_FORMAT_R16G16_SSCALED: return SVGA3D_DECLTYPE_SHORT2;
89 case PIPE_FORMAT_R16G16B16A16_SSCALED: return SVGA3D_DECLTYPE_SHORT4;
90 case PIPE_FORMAT_R8G8B8A8_UNORM: return SVGA3D_DECLTYPE_UBYTE4N;
91 case PIPE_FORMAT_R16G16_SNORM: return SVGA3D_DECLTYPE_SHORT2N;
92 case PIPE_FORMAT_R16G16B16A16_SNORM: return SVGA3D_DECLTYPE_SHORT4N;
93 case PIPE_FORMAT_R16G16_UNORM: return SVGA3D_DECLTYPE_USHORT2N;
94 case PIPE_FORMAT_R16G16B16A16_UNORM: return SVGA3D_DECLTYPE_USHORT4N;
95 case PIPE_FORMAT_R10G10B10X2_USCALED: return SVGA3D_DECLTYPE_UDEC3;
96 case PIPE_FORMAT_R10G10B10X2_SNORM: return SVGA3D_DECLTYPE_DEC3N;
97 case PIPE_FORMAT_R16G16_FLOAT: return SVGA3D_DECLTYPE_FLOAT16_2;
98 case PIPE_FORMAT_R16G16B16A16_FLOAT: return SVGA3D_DECLTYPE_FLOAT16_4;
99
100 /* See attrib_needs_adjustment() and attrib_needs_w_to_1() above */
101 case PIPE_FORMAT_R8G8B8_SNORM: return SVGA3D_DECLTYPE_UBYTE4N;
102
103 /* See attrib_needs_w_to_1() above */
104 case PIPE_FORMAT_R16G16B16_SNORM: return SVGA3D_DECLTYPE_SHORT4N;
105 case PIPE_FORMAT_R16G16B16_UNORM: return SVGA3D_DECLTYPE_USHORT4N;
106 case PIPE_FORMAT_R8G8B8_UNORM: return SVGA3D_DECLTYPE_UBYTE4N;
107
108 default:
109 /* There are many formats without hardware support. This case
110 * will be hit regularly, meaning we'll need swvfetch.
111 */
112 return SVGA3D_DECLTYPE_MAX;
113 }
114 }
115
116
117 static void
118 define_input_element_object(struct svga_context *svga,
119 struct svga_velems_state *velems)
120 {
121 SVGA3dInputElementDesc elements[PIPE_MAX_ATTRIBS];
122 enum pipe_error ret;
123 unsigned i;
124
125 assert(velems->count <= PIPE_MAX_ATTRIBS);
126 assert(svga_have_vgpu10(svga));
127
128 for (i = 0; i < velems->count; i++) {
129 const struct pipe_vertex_element *elem = velems->velem + i;
130 SVGA3dSurfaceFormat svga_format;
131 unsigned vf_flags;
132
133 svga_translate_vertex_format_vgpu10(elem->src_format,
134 &svga_format, &vf_flags);
135
136 velems->decl_type[i] =
137 translate_vertex_format_to_decltype(elem->src_format);
138 elements[i].inputSlot = elem->vertex_buffer_index;
139 elements[i].alignedByteOffset = elem->src_offset;
140 elements[i].format = svga_format;
141
142 if (elem->instance_divisor) {
143 elements[i].inputSlotClass = SVGA3D_INPUT_PER_INSTANCE_DATA;
144 elements[i].instanceDataStepRate = elem->instance_divisor;
145 }
146 else {
147 elements[i].inputSlotClass = SVGA3D_INPUT_PER_VERTEX_DATA;
148 elements[i].instanceDataStepRate = 0;
149 }
150 elements[i].inputRegister = i;
151
152 if (elements[i].format == SVGA3D_FORMAT_INVALID) {
153 velems->need_swvfetch = TRUE;
154 }
155
156 if (util_format_is_pure_integer(elem->src_format)) {
157 velems->attrib_is_pure_int |= (1 << i);
158 }
159
160 if (vf_flags & VF_W_TO_1) {
161 velems->adjust_attrib_w_1 |= (1 << i);
162 }
163
164 if (vf_flags & VF_U_TO_F_CAST) {
165 velems->adjust_attrib_utof |= (1 << i);
166 }
167 else if (vf_flags & VF_I_TO_F_CAST) {
168 velems->adjust_attrib_itof |= (1 << i);
169 }
170
171 if (vf_flags & VF_BGRA) {
172 velems->attrib_is_bgra |= (1 << i);
173 }
174
175 if (vf_flags & VF_PUINT_TO_SNORM) {
176 velems->attrib_puint_to_snorm |= (1 << i);
177 }
178 else if (vf_flags & VF_PUINT_TO_USCALED) {
179 velems->attrib_puint_to_uscaled |= (1 << i);
180 }
181 else if (vf_flags & VF_PUINT_TO_SSCALED) {
182 velems->attrib_puint_to_sscaled |= (1 << i);
183 }
184 }
185
186 velems->id = util_bitmask_add(svga->input_element_object_id_bm);
187
188 ret = SVGA3D_vgpu10_DefineElementLayout(svga->swc, velems->count,
189 velems->id, elements);
190 if (ret != PIPE_OK) {
191 svga_context_flush(svga, NULL);
192 ret = SVGA3D_vgpu10_DefineElementLayout(svga->swc, velems->count,
193 velems->id, elements);
194 assert(ret == PIPE_OK);
195 }
196 }
197
198
199 /**
200 * Translate the vertex element types to SVGA3dDeclType and check
201 * for VS-based vertex attribute adjustments.
202 */
203 static void
204 translate_vertex_decls(struct svga_context *svga,
205 struct svga_velems_state *velems)
206 {
207 unsigned i;
208
209 assert(!svga_have_vgpu10(svga));
210
211 for (i = 0; i < velems->count; i++) {
212 const enum pipe_format f = velems->velem[i].src_format;
213 SVGA3dSurfaceFormat svga_format;
214 unsigned vf_flags;
215
216 svga_translate_vertex_format_vgpu10(f, &svga_format, &vf_flags);
217
218 velems->decl_type[i] = translate_vertex_format_to_decltype(f);
219 if (velems->decl_type[i] == SVGA3D_DECLTYPE_MAX) {
220 /* Unsupported format - use software fetch */
221 velems->need_swvfetch = TRUE;
222 }
223
224 /* Check for VS-based adjustments */
225 if (attrib_needs_range_adjustment(f)) {
226 velems->adjust_attrib_range |= (1 << i);
227 }
228
229 if (vf_flags & VF_W_TO_1) {
230 velems->adjust_attrib_w_1 |= (1 << i);
231 }
232 }
233 }
234
235
236 static void *
237 svga_create_vertex_elements_state(struct pipe_context *pipe,
238 unsigned count,
239 const struct pipe_vertex_element *attribs)
240 {
241 struct svga_context *svga = svga_context(pipe);
242 struct svga_velems_state *velems;
243
244 assert(count <= PIPE_MAX_ATTRIBS);
245 velems = (struct svga_velems_state *) MALLOC(sizeof(struct svga_velems_state));
246 if (velems) {
247 velems->count = count;
248 memcpy(velems->velem, attribs, sizeof(*attribs) * count);
249
250 velems->need_swvfetch = FALSE;
251 velems->adjust_attrib_range = 0x0;
252 velems->attrib_is_pure_int = 0x0;
253 velems->adjust_attrib_w_1 = 0x0;
254 velems->adjust_attrib_itof = 0x0;
255 velems->adjust_attrib_utof = 0x0;
256 velems->attrib_is_bgra = 0x0;
257 velems->attrib_puint_to_snorm = 0x0;
258 velems->attrib_puint_to_uscaled = 0x0;
259 velems->attrib_puint_to_sscaled = 0x0;
260
261 if (svga_have_vgpu10(svga)) {
262 define_input_element_object(svga, velems);
263 }
264 else {
265 translate_vertex_decls(svga, velems);
266 }
267 }
268
269 svga->hud.num_vertexelement_objects++;
270 SVGA_STATS_COUNT_INC(svga_screen(svga->pipe.screen)->sws,
271 SVGA_STATS_COUNT_VERTEXELEMENT);
272
273 return velems;
274 }
275
276
277 static void
278 svga_bind_vertex_elements_state(struct pipe_context *pipe, void *state)
279 {
280 struct svga_context *svga = svga_context(pipe);
281 struct svga_velems_state *velems = (struct svga_velems_state *) state;
282
283 svga->curr.velems = velems;
284 svga->dirty |= SVGA_NEW_VELEMENT;
285 }
286
287
288 static void
289 svga_delete_vertex_elements_state(struct pipe_context *pipe, void *state)
290 {
291 struct svga_context *svga = svga_context(pipe);
292 struct svga_velems_state *velems = (struct svga_velems_state *) state;
293
294 if (svga_have_vgpu10(svga)) {
295 enum pipe_error ret;
296
297 svga_hwtnl_flush_retry(svga);
298
299 ret = SVGA3D_vgpu10_DestroyElementLayout(svga->swc, velems->id);
300 if (ret != PIPE_OK) {
301 svga_context_flush(svga, NULL);
302 ret = SVGA3D_vgpu10_DestroyElementLayout(svga->swc, velems->id);
303 assert(ret == PIPE_OK);
304 }
305
306 if (velems->id == svga->state.hw_draw.layout_id)
307 svga->state.hw_draw.layout_id = SVGA3D_INVALID_ID;
308
309 util_bitmask_clear(svga->input_element_object_id_bm, velems->id);
310 velems->id = SVGA3D_INVALID_ID;
311 }
312
313 FREE(velems);
314 svga->hud.num_vertexelement_objects--;
315 }
316
317 void svga_cleanup_vertex_state( struct svga_context *svga )
318 {
319 unsigned i;
320
321 for (i = 0 ; i < svga->curr.num_vertex_buffers; i++)
322 pipe_vertex_buffer_unreference(&svga->curr.vb[i]);
323
324 pipe_resource_reference(&svga->state.hw_draw.ib, NULL);
325
326 for (i = 0; i < svga->state.hw_draw.num_vbuffers; i++)
327 pipe_resource_reference(&svga->state.hw_draw.vbuffers[i], NULL);
328 }
329
330
331 void svga_init_vertex_functions( struct svga_context *svga )
332 {
333 svga->pipe.set_vertex_buffers = svga_set_vertex_buffers;
334 svga->pipe.create_vertex_elements_state = svga_create_vertex_elements_state;
335 svga->pipe.bind_vertex_elements_state = svga_bind_vertex_elements_state;
336 svga->pipe.delete_vertex_elements_state = svga_delete_vertex_elements_state;
337 }