Merge branch 'master' of ../mesa into vulkan
[mesa.git] / src / gallium / drivers / svga / svga_resource_buffer.c
1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 #include "svga_cmd.h"
27
28 #include "pipe/p_state.h"
29 #include "pipe/p_defines.h"
30 #include "util/u_inlines.h"
31 #include "os/os_thread.h"
32 #include "util/u_math.h"
33 #include "util/u_memory.h"
34 #include "util/u_resource.h"
35
36 #include "svga_context.h"
37 #include "svga_screen.h"
38 #include "svga_resource_buffer.h"
39 #include "svga_resource_buffer_upload.h"
40 #include "svga_winsys.h"
41 #include "svga_debug.h"
42
43
44 /**
45 * Vertex and index buffers need hardware backing. Constant buffers
46 * do not. No other types of buffers currently supported.
47 */
48 static inline boolean
49 svga_buffer_needs_hw_storage(unsigned usage)
50 {
51 return (usage & (PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER |
52 PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_STREAM_OUTPUT)) != 0;
53 }
54
55
56 /**
57 * Create a buffer transfer.
58 *
59 * Unlike texture DMAs (which are written immediately to the command buffer and
60 * therefore inherently serialized with other context operations), for buffers
61 * we try to coalesce multiple range mappings (i.e, multiple calls to this
62 * function) into a single DMA command, for better efficiency in command
63 * processing. This means we need to exercise extra care here to ensure that
64 * the end result is exactly the same as if one DMA was used for every mapped
65 * range.
66 */
67 static void *
68 svga_buffer_transfer_map(struct pipe_context *pipe,
69 struct pipe_resource *resource,
70 unsigned level,
71 unsigned usage,
72 const struct pipe_box *box,
73 struct pipe_transfer **ptransfer)
74 {
75 struct svga_context *svga = svga_context(pipe);
76 struct svga_screen *ss = svga_screen(pipe->screen);
77 struct svga_buffer *sbuf = svga_buffer(resource);
78 struct pipe_transfer *transfer;
79 uint8_t *map;
80
81 transfer = CALLOC_STRUCT(pipe_transfer);
82 if (transfer == NULL) {
83 return NULL;
84 }
85
86 transfer->resource = resource;
87 transfer->level = level;
88 transfer->usage = usage;
89 transfer->box = *box;
90
91 if ((usage & PIPE_TRANSFER_READ) && sbuf->dirty) {
92 /* Only need to test for vgpu10 since only vgpu10 features (streamout,
93 * buffer copy) can modify buffers on the device.
94 */
95 if (svga_have_vgpu10(svga)) {
96 enum pipe_error ret;
97 assert(sbuf->handle);
98 ret = SVGA3D_vgpu10_ReadbackSubResource(svga->swc, sbuf->handle, 0);
99 if (ret != PIPE_OK) {
100 svga_context_flush(svga, NULL);
101 ret = SVGA3D_vgpu10_ReadbackSubResource(svga->swc, sbuf->handle, 0);
102 assert(ret == PIPE_OK);
103 }
104
105 svga_context_finish(svga);
106
107 sbuf->dirty = FALSE;
108 }
109 }
110
111 if (usage & PIPE_TRANSFER_WRITE) {
112 if (usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
113 /*
114 * Flush any pending primitives, finish writing any pending DMA
115 * commands, and tell the host to discard the buffer contents on
116 * the next DMA operation.
117 */
118
119 svga_hwtnl_flush_buffer(svga, resource);
120
121 if (sbuf->dma.pending) {
122 svga_buffer_upload_flush(svga, sbuf);
123
124 /*
125 * Instead of flushing the context command buffer, simply discard
126 * the current hwbuf, and start a new one.
127 * With GB objects, the map operation takes care of this
128 * if passed the PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE flag,
129 * and the old backing store is busy.
130 */
131
132 if (!svga_have_gb_objects(svga))
133 svga_buffer_destroy_hw_storage(ss, sbuf);
134 }
135
136 sbuf->map.num_ranges = 0;
137 sbuf->dma.flags.discard = TRUE;
138 }
139
140 if (usage & PIPE_TRANSFER_UNSYNCHRONIZED) {
141 if (!sbuf->map.num_ranges) {
142 /*
143 * No pending ranges to upload so far, so we can tell the host to
144 * not synchronize on the next DMA command.
145 */
146
147 sbuf->dma.flags.unsynchronized = TRUE;
148 }
149 } else {
150 /*
151 * Synchronizing, so flush any pending primitives, finish writing any
152 * pending DMA command, and ensure the next DMA will be done in order.
153 */
154
155 svga_hwtnl_flush_buffer(svga, resource);
156
157 if (sbuf->dma.pending) {
158 svga_buffer_upload_flush(svga, sbuf);
159
160 if (svga_buffer_has_hw_storage(sbuf)) {
161 /*
162 * We have a pending DMA upload from a hardware buffer, therefore
163 * we need to ensure that the host finishes processing that DMA
164 * command before the state tracker can start overwriting the
165 * hardware buffer.
166 *
167 * XXX: This could be avoided by tying the hardware buffer to
168 * the transfer (just as done with textures), which would allow
169 * overlapping DMAs commands to be queued on the same context
170 * buffer. However, due to the likelihood of software vertex
171 * processing, it is more convenient to hold on to the hardware
172 * buffer, allowing to quickly access the contents from the CPU
173 * without having to do a DMA download from the host.
174 */
175
176 if (usage & PIPE_TRANSFER_DONTBLOCK) {
177 /*
178 * Flushing the command buffer here will most likely cause
179 * the map of the hwbuf below to block, so preemptively
180 * return NULL here if DONTBLOCK is set to prevent unnecessary
181 * command buffer flushes.
182 */
183
184 FREE(transfer);
185 return NULL;
186 }
187
188 svga_context_flush(svga, NULL);
189 }
190 }
191
192 sbuf->dma.flags.unsynchronized = FALSE;
193 }
194 }
195
196 if (!sbuf->swbuf && !svga_buffer_has_hw_storage(sbuf)) {
197 if (svga_buffer_create_hw_storage(ss, sbuf) != PIPE_OK) {
198 /*
199 * We can't create a hardware buffer big enough, so create a malloc
200 * buffer instead.
201 */
202 if (0) {
203 debug_printf("%s: failed to allocate %u KB of DMA, "
204 "splitting DMA transfers\n",
205 __FUNCTION__,
206 (sbuf->b.b.width0 + 1023)/1024);
207 }
208
209 sbuf->swbuf = align_malloc(sbuf->b.b.width0, 16);
210 if (!sbuf->swbuf) {
211 FREE(transfer);
212 return NULL;
213 }
214 }
215 }
216
217 if (sbuf->swbuf) {
218 /* User/malloc buffer */
219 map = sbuf->swbuf;
220 }
221 else if (svga_buffer_has_hw_storage(sbuf)) {
222 boolean retry;
223
224 map = svga_buffer_hw_storage_map(svga, sbuf, transfer->usage, &retry);
225 if (map == NULL && retry) {
226 /*
227 * At this point, svga_buffer_get_transfer() has already
228 * hit the DISCARD_WHOLE_RESOURCE path and flushed HWTNL
229 * for this buffer.
230 */
231 svga_context_flush(svga, NULL);
232 map = svga_buffer_hw_storage_map(svga, sbuf, transfer->usage, &retry);
233 }
234 }
235 else {
236 map = NULL;
237 }
238
239 if (map) {
240 ++sbuf->map.count;
241 map += transfer->box.x;
242 *ptransfer = transfer;
243 } else {
244 FREE(transfer);
245 }
246
247 return map;
248 }
249
250
251 static void
252 svga_buffer_transfer_flush_region( struct pipe_context *pipe,
253 struct pipe_transfer *transfer,
254 const struct pipe_box *box)
255 {
256 struct svga_screen *ss = svga_screen(pipe->screen);
257 struct svga_buffer *sbuf = svga_buffer(transfer->resource);
258
259 unsigned offset = transfer->box.x + box->x;
260 unsigned length = box->width;
261
262 assert(transfer->usage & PIPE_TRANSFER_WRITE);
263 assert(transfer->usage & PIPE_TRANSFER_FLUSH_EXPLICIT);
264
265 pipe_mutex_lock(ss->swc_mutex);
266 svga_buffer_add_range(sbuf, offset, offset + length);
267 pipe_mutex_unlock(ss->swc_mutex);
268 }
269
270
271 static void
272 svga_buffer_transfer_unmap( struct pipe_context *pipe,
273 struct pipe_transfer *transfer )
274 {
275 struct svga_screen *ss = svga_screen(pipe->screen);
276 struct svga_context *svga = svga_context(pipe);
277 struct svga_buffer *sbuf = svga_buffer(transfer->resource);
278
279 pipe_mutex_lock(ss->swc_mutex);
280
281 assert(sbuf->map.count);
282 if (sbuf->map.count) {
283 --sbuf->map.count;
284 }
285
286 if (svga_buffer_has_hw_storage(sbuf)) {
287 svga_buffer_hw_storage_unmap(svga, sbuf);
288 }
289
290 if (transfer->usage & PIPE_TRANSFER_WRITE) {
291 if (!(transfer->usage & PIPE_TRANSFER_FLUSH_EXPLICIT)) {
292 /*
293 * Mapped range not flushed explicitly, so flush the whole buffer,
294 * and tell the host to discard the contents when processing the DMA
295 * command.
296 */
297
298 SVGA_DBG(DEBUG_DMA, "flushing the whole buffer\n");
299
300 sbuf->dma.flags.discard = TRUE;
301
302 svga_buffer_add_range(sbuf, 0, sbuf->b.b.width0);
303 }
304 }
305
306 pipe_mutex_unlock(ss->swc_mutex);
307 FREE(transfer);
308 }
309
310
311 static void
312 svga_buffer_destroy( struct pipe_screen *screen,
313 struct pipe_resource *buf )
314 {
315 struct svga_screen *ss = svga_screen(screen);
316 struct svga_buffer *sbuf = svga_buffer( buf );
317
318 assert(!p_atomic_read(&buf->reference.count));
319
320 assert(!sbuf->dma.pending);
321
322 if(sbuf->handle)
323 svga_buffer_destroy_host_surface(ss, sbuf);
324
325 if(sbuf->uploaded.buffer)
326 pipe_resource_reference(&sbuf->uploaded.buffer, NULL);
327
328 if(sbuf->hwbuf)
329 svga_buffer_destroy_hw_storage(ss, sbuf);
330
331 if(sbuf->swbuf && !sbuf->user)
332 align_free(sbuf->swbuf);
333
334 ss->total_resource_bytes -= sbuf->size;
335
336 FREE(sbuf);
337 }
338
339
340 struct u_resource_vtbl svga_buffer_vtbl =
341 {
342 u_default_resource_get_handle, /* get_handle */
343 svga_buffer_destroy, /* resource_destroy */
344 svga_buffer_transfer_map, /* transfer_map */
345 svga_buffer_transfer_flush_region, /* transfer_flush_region */
346 svga_buffer_transfer_unmap, /* transfer_unmap */
347 u_default_transfer_inline_write /* transfer_inline_write */
348 };
349
350
351
352 struct pipe_resource *
353 svga_buffer_create(struct pipe_screen *screen,
354 const struct pipe_resource *template)
355 {
356 struct svga_screen *ss = svga_screen(screen);
357 struct svga_buffer *sbuf;
358
359 sbuf = CALLOC_STRUCT(svga_buffer);
360 if(!sbuf)
361 goto error1;
362
363 sbuf->b.b = *template;
364 sbuf->b.vtbl = &svga_buffer_vtbl;
365 pipe_reference_init(&sbuf->b.b.reference, 1);
366 sbuf->b.b.screen = screen;
367 sbuf->bind_flags = template->bind;
368
369 if (template->bind & PIPE_BIND_CONSTANT_BUFFER) {
370 /* Constant buffers can only have the PIPE_BIND_CONSTANT_BUFFER
371 * flag set.
372 */
373 if (ss->sws->have_vgpu10) {
374 sbuf->bind_flags = PIPE_BIND_CONSTANT_BUFFER;
375
376 /* Constant buffer size needs to be in multiples of 16. */
377 sbuf->b.b.width0 = align(sbuf->b.b.width0, 16);
378 }
379 }
380
381 if(svga_buffer_needs_hw_storage(template->bind)) {
382
383 /* If the buffer will be used for vertex/index/stream data, set all
384 * the flags so that the buffer will be accepted for all those uses.
385 * Note that the PIPE_BIND_ flags we get from the state tracker are
386 * just a hint about how the buffer may be used. And OpenGL buffer
387 * object may be used for many different things.
388 */
389 if (!(template->bind & PIPE_BIND_CONSTANT_BUFFER)) {
390 /* Not a constant buffer. The buffer may be used for vertex data,
391 * indexes or stream-out.
392 */
393 sbuf->bind_flags |= (PIPE_BIND_VERTEX_BUFFER |
394 PIPE_BIND_INDEX_BUFFER);
395 if (ss->sws->have_vgpu10)
396 sbuf->bind_flags |= PIPE_BIND_STREAM_OUTPUT;
397 }
398
399 if(svga_buffer_create_host_surface(ss, sbuf) != PIPE_OK)
400 goto error2;
401 }
402 else {
403 sbuf->swbuf = align_malloc(sbuf->b.b.width0, 64);
404 if(!sbuf->swbuf)
405 goto error2;
406 }
407
408 debug_reference(&sbuf->b.b.reference,
409 (debug_reference_descriptor)debug_describe_resource, 0);
410
411 sbuf->size = util_resource_size(&sbuf->b.b);
412 ss->total_resource_bytes += sbuf->size;
413
414 return &sbuf->b.b;
415
416 error2:
417 FREE(sbuf);
418 error1:
419 return NULL;
420 }
421
422 struct pipe_resource *
423 svga_user_buffer_create(struct pipe_screen *screen,
424 void *ptr,
425 unsigned bytes,
426 unsigned bind)
427 {
428 struct svga_buffer *sbuf;
429
430 sbuf = CALLOC_STRUCT(svga_buffer);
431 if(!sbuf)
432 goto no_sbuf;
433
434 pipe_reference_init(&sbuf->b.b.reference, 1);
435 sbuf->b.vtbl = &svga_buffer_vtbl;
436 sbuf->b.b.screen = screen;
437 sbuf->b.b.format = PIPE_FORMAT_R8_UNORM; /* ?? */
438 sbuf->b.b.usage = PIPE_USAGE_IMMUTABLE;
439 sbuf->b.b.bind = bind;
440 sbuf->b.b.width0 = bytes;
441 sbuf->b.b.height0 = 1;
442 sbuf->b.b.depth0 = 1;
443 sbuf->b.b.array_size = 1;
444
445 sbuf->bind_flags = bind;
446 sbuf->swbuf = ptr;
447 sbuf->user = TRUE;
448
449 debug_reference(&sbuf->b.b.reference,
450 (debug_reference_descriptor)debug_describe_resource, 0);
451
452 return &sbuf->b.b;
453
454 no_sbuf:
455 return NULL;
456 }
457
458
459