src/gallium/drivers/svga/svga_resource_buffer.c

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #include "svga_cmd.h"
  27
  28 #include "pipe/p_state.h"
  29 #include "pipe/p_defines.h"
  30 #include "util/u_inlines.h"
  31 #include "os/os_thread.h"
  32 #include "os/os_time.h"
  33 #include "util/u_math.h"
  34 #include "util/u_memory.h"
  35 #include "util/u_resource.h"
  36
  37 #include "svga_context.h"
  38 #include "svga_screen.h"
  39 #include "svga_resource_buffer.h"
  40 #include "svga_resource_buffer_upload.h"
  41 #include "svga_winsys.h"
  42 #include "svga_debug.h"
  43
  44
  45 /**
  46  * Vertex and index buffers need hardware backing.  Constant buffers
  47  * do not.  No other types of buffers currently supported.
  48  */
  49 static inline boolean
  50 svga_buffer_needs_hw_storage(unsigned usage)
  51 {
  52    return (usage & (PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER |
  53                     PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_STREAM_OUTPUT)) != 0;
  54 }
  55
  56
  57 /**
  58  * Create a buffer transfer.
  59  *
  60  * Unlike texture DMAs (which are written immediately to the command buffer and
  61  * therefore inherently serialized with other context operations), for buffers
  62  * we try to coalesce multiple range mappings (i.e, multiple calls to this
  63  * function) into a single DMA command, for better efficiency in command
  64  * processing.  This means we need to exercise extra care here to ensure that
  65  * the end result is exactly the same as if one DMA was used for every mapped
  66  * range.
  67  */
  68 static void *
  69 svga_buffer_transfer_map(struct pipe_context *pipe,
  70                          struct pipe_resource *resource,
  71                          unsigned level,
  72                          enum pipe_resource_usage usage,
  73                          const struct pipe_box *box,
  74                          struct pipe_transfer **ptransfer)
  75 {
  76    struct svga_context *svga = svga_context(pipe);
  77    struct svga_screen *ss = svga_screen(pipe->screen);
  78    struct svga_buffer *sbuf = svga_buffer(resource);
  79    struct pipe_transfer *transfer;
  80    uint8_t *map;
  81    int64_t begin = os_time_get();
  82
  83    assert(box->y == 0);
  84    assert(box->z == 0);
  85    assert(box->height == 1);
  86    assert(box->depth == 1);
  87
  88    transfer = CALLOC_STRUCT(pipe_transfer);
  89    if (!transfer) {
  90       return NULL;
  91    }
  92
  93    transfer->resource = resource;
  94    transfer->level = level;
  95    transfer->usage = usage;
  96    transfer->box = *box;
  97
  98    if ((usage & PIPE_TRANSFER_READ) && sbuf->dirty) {
  99       /* Only need to test for vgpu10 since only vgpu10 features (streamout,
 100        * buffer copy) can modify buffers on the device.
 101        */
 102       if (svga_have_vgpu10(svga)) {
 103          enum pipe_error ret;
 104          assert(sbuf->handle);
 105          ret = SVGA3D_vgpu10_ReadbackSubResource(svga->swc, sbuf->handle, 0);
 106          if (ret != PIPE_OK) {
 107             svga_context_flush(svga, NULL);
 108             ret = SVGA3D_vgpu10_ReadbackSubResource(svga->swc, sbuf->handle, 0);
 109             assert(ret == PIPE_OK);
 110          }
 111
 112          svga->hud.num_readbacks++;
 113
 114          svga_context_finish(svga);
 115
 116          sbuf->dirty = FALSE;
 117       }
 118    }
 119
 120    if (usage & PIPE_TRANSFER_WRITE) {
 121       if (usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
 122          /*
 123           * Flush any pending primitives, finish writing any pending DMA
 124           * commands, and tell the host to discard the buffer contents on
 125           * the next DMA operation.
 126           */
 127
 128          svga_hwtnl_flush_buffer(svga, resource);
 129
 130          if (sbuf->dma.pending) {
 131             svga_buffer_upload_flush(svga, sbuf);
 132
 133             /*
 134              * Instead of flushing the context command buffer, simply discard
 135              * the current hwbuf, and start a new one.
 136              * With GB objects, the map operation takes care of this
 137              * if passed the PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE flag,
 138              * and the old backing store is busy.
 139              */
 140
 141             if (!svga_have_gb_objects(svga))
 142                svga_buffer_destroy_hw_storage(ss, sbuf);
 143          }
 144
 145          sbuf->map.num_ranges = 0;
 146          sbuf->dma.flags.discard = TRUE;
 147       }
 148
 149       if (usage & PIPE_TRANSFER_UNSYNCHRONIZED) {
 150          if (!sbuf->map.num_ranges) {
 151             /*
 152              * No pending ranges to upload so far, so we can tell the host to
 153              * not synchronize on the next DMA command.
 154              */
 155
 156             sbuf->dma.flags.unsynchronized = TRUE;
 157          }
 158       } else {
 159          /*
 160           * Synchronizing, so flush any pending primitives, finish writing any
 161           * pending DMA command, and ensure the next DMA will be done in order.
 162           */
 163
 164          svga_hwtnl_flush_buffer(svga, resource);
 165
 166          if (sbuf->dma.pending) {
 167             svga_buffer_upload_flush(svga, sbuf);
 168
 169             if (svga_buffer_has_hw_storage(sbuf)) {
 170                /*
 171                 * We have a pending DMA upload from a hardware buffer, therefore
 172                 * we need to ensure that the host finishes processing that DMA
 173                 * command before the state tracker can start overwriting the
 174                 * hardware buffer.
 175                 *
 176                 * XXX: This could be avoided by tying the hardware buffer to
 177                 * the transfer (just as done with textures), which would allow
 178                 * overlapping DMAs commands to be queued on the same context
 179                 * buffer. However, due to the likelihood of software vertex
 180                 * processing, it is more convenient to hold on to the hardware
 181                 * buffer, allowing to quickly access the contents from the CPU
 182                 * without having to do a DMA download from the host.
 183                 */
 184
 185                if (usage & PIPE_TRANSFER_DONTBLOCK) {
 186                   /*
 187                    * Flushing the command buffer here will most likely cause
 188                    * the map of the hwbuf below to block, so preemptively
 189                    * return NULL here if DONTBLOCK is set to prevent unnecessary
 190                    * command buffer flushes.
 191                    */
 192
 193                   FREE(transfer);
 194                   return NULL;
 195                }
 196
 197                svga_context_flush(svga, NULL);
 198             }
 199          }
 200
 201          sbuf->dma.flags.unsynchronized = FALSE;
 202       }
 203    }
 204
 205    if (!sbuf->swbuf && !svga_buffer_has_hw_storage(sbuf)) {
 206       if (svga_buffer_create_hw_storage(ss, sbuf) != PIPE_OK) {
 207          /*
 208           * We can't create a hardware buffer big enough, so create a malloc
 209           * buffer instead.
 210           */
 211          if (0) {
 212             debug_printf("%s: failed to allocate %u KB of DMA, "
 213                          "splitting DMA transfers\n",
 214                          __FUNCTION__,
 215                          (sbuf->b.b.width0 + 1023)/1024);
 216          }
 217
 218          sbuf->swbuf = align_malloc(sbuf->b.b.width0, 16);
 219          if (!sbuf->swbuf) {
 220             FREE(transfer);
 221             return NULL;
 222          }
 223       }
 224    }
 225
 226    if (sbuf->swbuf) {
 227       /* User/malloc buffer */
 228       map = sbuf->swbuf;
 229    }
 230    else if (svga_buffer_has_hw_storage(sbuf)) {
 231       boolean retry;
 232
 233       map = svga_buffer_hw_storage_map(svga, sbuf, transfer->usage, &retry);
 234       if (map == NULL && retry) {
 235          /*
 236           * At this point, svga_buffer_get_transfer() has already
 237           * hit the DISCARD_WHOLE_RESOURCE path and flushed HWTNL
 238           * for this buffer.
 239           */
 240          svga_context_flush(svga, NULL);
 241          map = svga_buffer_hw_storage_map(svga, sbuf, transfer->usage, &retry);
 242       }
 243    }
 244    else {
 245       map = NULL;
 246    }
 247
 248    if (map) {
 249       ++sbuf->map.count;
 250       map += transfer->box.x;
 251       *ptransfer = transfer;
 252    } else {
 253       FREE(transfer);
 254    }
 255
 256    svga->hud.map_buffer_time += (os_time_get() - begin);
 257
 258    return map;
 259 }
 260
 261
 262 static void
 263 svga_buffer_transfer_flush_region( struct pipe_context *pipe,
 264                                    struct pipe_transfer *transfer,
 265                                    const struct pipe_box *box)
 266 {
 267    struct svga_screen *ss = svga_screen(pipe->screen);
 268    struct svga_buffer *sbuf = svga_buffer(transfer->resource);
 269
 270    unsigned offset = transfer->box.x + box->x;
 271    unsigned length = box->width;
 272
 273    assert(transfer->usage & PIPE_TRANSFER_WRITE);
 274    assert(transfer->usage & PIPE_TRANSFER_FLUSH_EXPLICIT);
 275
 276    pipe_mutex_lock(ss->swc_mutex);
 277    svga_buffer_add_range(sbuf, offset, offset + length);
 278    pipe_mutex_unlock(ss->swc_mutex);
 279 }
 280
 281
 282 static void
 283 svga_buffer_transfer_unmap( struct pipe_context *pipe,
 284                             struct pipe_transfer *transfer )
 285 {
 286    struct svga_screen *ss = svga_screen(pipe->screen);
 287    struct svga_context *svga = svga_context(pipe);
 288    struct svga_buffer *sbuf = svga_buffer(transfer->resource);
 289
 290    pipe_mutex_lock(ss->swc_mutex);
 291
 292    assert(sbuf->map.count);
 293    if (sbuf->map.count) {
 294       --sbuf->map.count;
 295    }
 296
 297    if (svga_buffer_has_hw_storage(sbuf)) {
 298       svga_buffer_hw_storage_unmap(svga, sbuf);
 299    }
 300
 301    if (transfer->usage & PIPE_TRANSFER_WRITE) {
 302       if (!(transfer->usage & PIPE_TRANSFER_FLUSH_EXPLICIT)) {
 303          /*
 304           * Mapped range not flushed explicitly, so flush the whole buffer,
 305           * and tell the host to discard the contents when processing the DMA
 306           * command.
 307           */
 308
 309          SVGA_DBG(DEBUG_DMA, "flushing the whole buffer\n");
 310
 311          sbuf->dma.flags.discard = TRUE;
 312
 313          svga_buffer_add_range(sbuf, 0, sbuf->b.b.width0);
 314       }
 315    }
 316
 317    pipe_mutex_unlock(ss->swc_mutex);
 318    FREE(transfer);
 319 }
 320
 321
 322 static void
 323 svga_buffer_destroy( struct pipe_screen *screen,
 324                      struct pipe_resource *buf )
 325 {
 326    struct svga_screen *ss = svga_screen(screen);
 327    struct svga_buffer *sbuf = svga_buffer( buf );
 328
 329    assert(!p_atomic_read(&buf->reference.count));
 330
 331    assert(!sbuf->dma.pending);
 332
 333    if (sbuf->handle)
 334       svga_buffer_destroy_host_surface(ss, sbuf);
 335
 336    if (sbuf->uploaded.buffer)
 337       pipe_resource_reference(&sbuf->uploaded.buffer, NULL);
 338
 339    if (sbuf->hwbuf)
 340       svga_buffer_destroy_hw_storage(ss, sbuf);
 341
 342    if (sbuf->swbuf && !sbuf->user)
 343       align_free(sbuf->swbuf);
 344
 345    ss->hud.total_resource_bytes -= sbuf->size;
 346    assert(ss->hud.num_resources > 0);
 347    if (ss->hud.num_resources > 0)
 348       ss->hud.num_resources--;
 349
 350    FREE(sbuf);
 351 }
 352
 353
 354 struct u_resource_vtbl svga_buffer_vtbl =
 355 {
 356    u_default_resource_get_handle,      /* get_handle */
 357    svga_buffer_destroy,              /* resource_destroy */
 358    svga_buffer_transfer_map,         /* transfer_map */
 359    svga_buffer_transfer_flush_region,  /* transfer_flush_region */
 360    svga_buffer_transfer_unmap,       /* transfer_unmap */
 361    u_default_transfer_inline_write   /* transfer_inline_write */
 362 };
 363
 364
 365
 366 struct pipe_resource *
 367 svga_buffer_create(struct pipe_screen *screen,
 368                    const struct pipe_resource *template)
 369 {
 370    struct svga_screen *ss = svga_screen(screen);
 371    struct svga_buffer *sbuf;
 372
 373    sbuf = CALLOC_STRUCT(svga_buffer);
 374    if (!sbuf)
 375       goto error1;
 376
 377    sbuf->b.b = *template;
 378    sbuf->b.vtbl = &svga_buffer_vtbl;
 379    pipe_reference_init(&sbuf->b.b.reference, 1);
 380    sbuf->b.b.screen = screen;
 381    sbuf->bind_flags = template->bind;
 382
 383    if (template->bind & PIPE_BIND_CONSTANT_BUFFER) {
 384       /* Constant buffers can only have the PIPE_BIND_CONSTANT_BUFFER
 385        * flag set.
 386        */
 387       if (ss->sws->have_vgpu10) {
 388          sbuf->bind_flags = PIPE_BIND_CONSTANT_BUFFER;
 389
 390          /* Constant buffer size needs to be in multiples of 16. */
 391          sbuf->b.b.width0 = align(sbuf->b.b.width0, 16);
 392       }
 393    }
 394
 395    if (svga_buffer_needs_hw_storage(template->bind)) {
 396
 397       /* If the buffer will be used for vertex/index/stream data, set all
 398        * the flags so that the buffer will be accepted for all those uses.
 399        * Note that the PIPE_BIND_ flags we get from the state tracker are
 400        * just a hint about how the buffer may be used.  And OpenGL buffer
 401        * object may be used for many different things.
 402        */
 403       if (!(template->bind & PIPE_BIND_CONSTANT_BUFFER)) {
 404          /* Not a constant buffer.  The buffer may be used for vertex data,
 405           * indexes or stream-out.
 406           */
 407          sbuf->bind_flags |= (PIPE_BIND_VERTEX_BUFFER |
 408                               PIPE_BIND_INDEX_BUFFER);
 409          if (ss->sws->have_vgpu10)
 410             sbuf->bind_flags |= PIPE_BIND_STREAM_OUTPUT;
 411       }
 412
 413       if (svga_buffer_create_host_surface(ss, sbuf) != PIPE_OK)
 414          goto error2;
 415    }
 416    else {
 417       sbuf->swbuf = align_malloc(sbuf->b.b.width0, 64);
 418       if (!sbuf->swbuf)
 419          goto error2;
 420    }
 421
 422    debug_reference(&sbuf->b.b.reference,
 423                    (debug_reference_descriptor)debug_describe_resource, 0);
 424
 425    sbuf->size = util_resource_size(&sbuf->b.b);
 426    ss->hud.total_resource_bytes += sbuf->size;
 427
 428    ss->hud.num_resources++;
 429
 430    return &sbuf->b.b;
 431
 432 error2:
 433    FREE(sbuf);
 434 error1:
 435    return NULL;
 436 }
 437
 438
 439 struct pipe_resource *
 440 svga_user_buffer_create(struct pipe_screen *screen,
 441                         void *ptr,
 442                         unsigned bytes,
 443                         unsigned bind)
 444 {
 445    struct svga_buffer *sbuf;
 446    struct svga_screen *ss = svga_screen(screen);
 447
 448    sbuf = CALLOC_STRUCT(svga_buffer);
 449    if (!sbuf)
 450       goto no_sbuf;
 451
 452    pipe_reference_init(&sbuf->b.b.reference, 1);
 453    sbuf->b.vtbl = &svga_buffer_vtbl;
 454    sbuf->b.b.screen = screen;
 455    sbuf->b.b.format = PIPE_FORMAT_R8_UNORM; /* ?? */
 456    sbuf->b.b.usage = PIPE_USAGE_IMMUTABLE;
 457    sbuf->b.b.bind = bind;
 458    sbuf->b.b.width0 = bytes;
 459    sbuf->b.b.height0 = 1;
 460    sbuf->b.b.depth0 = 1;
 461    sbuf->b.b.array_size = 1;
 462
 463    sbuf->bind_flags = bind;
 464    sbuf->swbuf = ptr;
 465    sbuf->user = TRUE;
 466
 467    debug_reference(&sbuf->b.b.reference,
 468                    (debug_reference_descriptor)debug_describe_resource, 0);
 469
 470    ss->hud.num_resources++;
 471
 472    return &sbuf->b.b;
 473
 474 no_sbuf:
 475    return NULL;
 476 }
 477
 478
 479