Merge remote-tracking branch 'mesa-public/master' into vulkan
[mesa.git] / src / gallium / drivers / svga / svga_resource_buffer.c
1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 #include "svga_cmd.h"
27
28 #include "pipe/p_state.h"
29 #include "pipe/p_defines.h"
30 #include "util/u_inlines.h"
31 #include "os/os_thread.h"
32 #include "os/os_time.h"
33 #include "util/u_math.h"
34 #include "util/u_memory.h"
35 #include "util/u_resource.h"
36
37 #include "svga_context.h"
38 #include "svga_screen.h"
39 #include "svga_resource_buffer.h"
40 #include "svga_resource_buffer_upload.h"
41 #include "svga_winsys.h"
42 #include "svga_debug.h"
43
44
45 /**
46 * Vertex and index buffers need hardware backing. Constant buffers
47 * do not. No other types of buffers currently supported.
48 */
49 static inline boolean
50 svga_buffer_needs_hw_storage(unsigned usage)
51 {
52 return (usage & (PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER |
53 PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_STREAM_OUTPUT)) != 0;
54 }
55
56
57 /**
58 * Create a buffer transfer.
59 *
60 * Unlike texture DMAs (which are written immediately to the command buffer and
61 * therefore inherently serialized with other context operations), for buffers
62 * we try to coalesce multiple range mappings (i.e, multiple calls to this
63 * function) into a single DMA command, for better efficiency in command
64 * processing. This means we need to exercise extra care here to ensure that
65 * the end result is exactly the same as if one DMA was used for every mapped
66 * range.
67 */
68 static void *
69 svga_buffer_transfer_map(struct pipe_context *pipe,
70 struct pipe_resource *resource,
71 unsigned level,
72 unsigned usage,
73 const struct pipe_box *box,
74 struct pipe_transfer **ptransfer)
75 {
76 struct svga_context *svga = svga_context(pipe);
77 struct svga_screen *ss = svga_screen(pipe->screen);
78 struct svga_buffer *sbuf = svga_buffer(resource);
79 struct pipe_transfer *transfer;
80 uint8_t *map;
81 int64_t begin = os_time_get();
82
83 transfer = CALLOC_STRUCT(pipe_transfer);
84 if (transfer == NULL) {
85 return NULL;
86 }
87
88 transfer->resource = resource;
89 transfer->level = level;
90 transfer->usage = usage;
91 transfer->box = *box;
92
93 if ((usage & PIPE_TRANSFER_READ) && sbuf->dirty) {
94 /* Only need to test for vgpu10 since only vgpu10 features (streamout,
95 * buffer copy) can modify buffers on the device.
96 */
97 if (svga_have_vgpu10(svga)) {
98 enum pipe_error ret;
99 assert(sbuf->handle);
100 ret = SVGA3D_vgpu10_ReadbackSubResource(svga->swc, sbuf->handle, 0);
101 if (ret != PIPE_OK) {
102 svga_context_flush(svga, NULL);
103 ret = SVGA3D_vgpu10_ReadbackSubResource(svga->swc, sbuf->handle, 0);
104 assert(ret == PIPE_OK);
105 }
106
107 svga_context_finish(svga);
108
109 sbuf->dirty = FALSE;
110 }
111 }
112
113 if (usage & PIPE_TRANSFER_WRITE) {
114 if (usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
115 /*
116 * Flush any pending primitives, finish writing any pending DMA
117 * commands, and tell the host to discard the buffer contents on
118 * the next DMA operation.
119 */
120
121 svga_hwtnl_flush_buffer(svga, resource);
122
123 if (sbuf->dma.pending) {
124 svga_buffer_upload_flush(svga, sbuf);
125
126 /*
127 * Instead of flushing the context command buffer, simply discard
128 * the current hwbuf, and start a new one.
129 * With GB objects, the map operation takes care of this
130 * if passed the PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE flag,
131 * and the old backing store is busy.
132 */
133
134 if (!svga_have_gb_objects(svga))
135 svga_buffer_destroy_hw_storage(ss, sbuf);
136 }
137
138 sbuf->map.num_ranges = 0;
139 sbuf->dma.flags.discard = TRUE;
140 }
141
142 if (usage & PIPE_TRANSFER_UNSYNCHRONIZED) {
143 if (!sbuf->map.num_ranges) {
144 /*
145 * No pending ranges to upload so far, so we can tell the host to
146 * not synchronize on the next DMA command.
147 */
148
149 sbuf->dma.flags.unsynchronized = TRUE;
150 }
151 } else {
152 /*
153 * Synchronizing, so flush any pending primitives, finish writing any
154 * pending DMA command, and ensure the next DMA will be done in order.
155 */
156
157 svga_hwtnl_flush_buffer(svga, resource);
158
159 if (sbuf->dma.pending) {
160 svga_buffer_upload_flush(svga, sbuf);
161
162 if (svga_buffer_has_hw_storage(sbuf)) {
163 /*
164 * We have a pending DMA upload from a hardware buffer, therefore
165 * we need to ensure that the host finishes processing that DMA
166 * command before the state tracker can start overwriting the
167 * hardware buffer.
168 *
169 * XXX: This could be avoided by tying the hardware buffer to
170 * the transfer (just as done with textures), which would allow
171 * overlapping DMAs commands to be queued on the same context
172 * buffer. However, due to the likelihood of software vertex
173 * processing, it is more convenient to hold on to the hardware
174 * buffer, allowing to quickly access the contents from the CPU
175 * without having to do a DMA download from the host.
176 */
177
178 if (usage & PIPE_TRANSFER_DONTBLOCK) {
179 /*
180 * Flushing the command buffer here will most likely cause
181 * the map of the hwbuf below to block, so preemptively
182 * return NULL here if DONTBLOCK is set to prevent unnecessary
183 * command buffer flushes.
184 */
185
186 FREE(transfer);
187 return NULL;
188 }
189
190 svga_context_flush(svga, NULL);
191 }
192 }
193
194 sbuf->dma.flags.unsynchronized = FALSE;
195 }
196 }
197
198 if (!sbuf->swbuf && !svga_buffer_has_hw_storage(sbuf)) {
199 if (svga_buffer_create_hw_storage(ss, sbuf) != PIPE_OK) {
200 /*
201 * We can't create a hardware buffer big enough, so create a malloc
202 * buffer instead.
203 */
204 if (0) {
205 debug_printf("%s: failed to allocate %u KB of DMA, "
206 "splitting DMA transfers\n",
207 __FUNCTION__,
208 (sbuf->b.b.width0 + 1023)/1024);
209 }
210
211 sbuf->swbuf = align_malloc(sbuf->b.b.width0, 16);
212 if (!sbuf->swbuf) {
213 FREE(transfer);
214 return NULL;
215 }
216 }
217 }
218
219 if (sbuf->swbuf) {
220 /* User/malloc buffer */
221 map = sbuf->swbuf;
222 }
223 else if (svga_buffer_has_hw_storage(sbuf)) {
224 boolean retry;
225
226 map = svga_buffer_hw_storage_map(svga, sbuf, transfer->usage, &retry);
227 if (map == NULL && retry) {
228 /*
229 * At this point, svga_buffer_get_transfer() has already
230 * hit the DISCARD_WHOLE_RESOURCE path and flushed HWTNL
231 * for this buffer.
232 */
233 svga_context_flush(svga, NULL);
234 map = svga_buffer_hw_storage_map(svga, sbuf, transfer->usage, &retry);
235 }
236 }
237 else {
238 map = NULL;
239 }
240
241 if (map) {
242 ++sbuf->map.count;
243 map += transfer->box.x;
244 *ptransfer = transfer;
245 } else {
246 FREE(transfer);
247 }
248
249 svga->hud.map_buffer_time += (os_time_get() - begin);
250
251 return map;
252 }
253
254
255 static void
256 svga_buffer_transfer_flush_region( struct pipe_context *pipe,
257 struct pipe_transfer *transfer,
258 const struct pipe_box *box)
259 {
260 struct svga_screen *ss = svga_screen(pipe->screen);
261 struct svga_buffer *sbuf = svga_buffer(transfer->resource);
262
263 unsigned offset = transfer->box.x + box->x;
264 unsigned length = box->width;
265
266 assert(transfer->usage & PIPE_TRANSFER_WRITE);
267 assert(transfer->usage & PIPE_TRANSFER_FLUSH_EXPLICIT);
268
269 pipe_mutex_lock(ss->swc_mutex);
270 svga_buffer_add_range(sbuf, offset, offset + length);
271 pipe_mutex_unlock(ss->swc_mutex);
272 }
273
274
275 static void
276 svga_buffer_transfer_unmap( struct pipe_context *pipe,
277 struct pipe_transfer *transfer )
278 {
279 struct svga_screen *ss = svga_screen(pipe->screen);
280 struct svga_context *svga = svga_context(pipe);
281 struct svga_buffer *sbuf = svga_buffer(transfer->resource);
282
283 pipe_mutex_lock(ss->swc_mutex);
284
285 assert(sbuf->map.count);
286 if (sbuf->map.count) {
287 --sbuf->map.count;
288 }
289
290 if (svga_buffer_has_hw_storage(sbuf)) {
291 svga_buffer_hw_storage_unmap(svga, sbuf);
292 }
293
294 if (transfer->usage & PIPE_TRANSFER_WRITE) {
295 if (!(transfer->usage & PIPE_TRANSFER_FLUSH_EXPLICIT)) {
296 /*
297 * Mapped range not flushed explicitly, so flush the whole buffer,
298 * and tell the host to discard the contents when processing the DMA
299 * command.
300 */
301
302 SVGA_DBG(DEBUG_DMA, "flushing the whole buffer\n");
303
304 sbuf->dma.flags.discard = TRUE;
305
306 svga_buffer_add_range(sbuf, 0, sbuf->b.b.width0);
307 }
308 }
309
310 pipe_mutex_unlock(ss->swc_mutex);
311 FREE(transfer);
312 }
313
314
315 static void
316 svga_buffer_destroy( struct pipe_screen *screen,
317 struct pipe_resource *buf )
318 {
319 struct svga_screen *ss = svga_screen(screen);
320 struct svga_buffer *sbuf = svga_buffer( buf );
321
322 assert(!p_atomic_read(&buf->reference.count));
323
324 assert(!sbuf->dma.pending);
325
326 if (sbuf->handle)
327 svga_buffer_destroy_host_surface(ss, sbuf);
328
329 if (sbuf->uploaded.buffer)
330 pipe_resource_reference(&sbuf->uploaded.buffer, NULL);
331
332 if (sbuf->hwbuf)
333 svga_buffer_destroy_hw_storage(ss, sbuf);
334
335 if (sbuf->swbuf && !sbuf->user)
336 align_free(sbuf->swbuf);
337
338 ss->hud.total_resource_bytes -= sbuf->size;
339 assert(ss->hud.num_resources > 0);
340 if (ss->hud.num_resources > 0)
341 ss->hud.num_resources--;
342
343 FREE(sbuf);
344 }
345
346
347 struct u_resource_vtbl svga_buffer_vtbl =
348 {
349 u_default_resource_get_handle, /* get_handle */
350 svga_buffer_destroy, /* resource_destroy */
351 svga_buffer_transfer_map, /* transfer_map */
352 svga_buffer_transfer_flush_region, /* transfer_flush_region */
353 svga_buffer_transfer_unmap, /* transfer_unmap */
354 u_default_transfer_inline_write /* transfer_inline_write */
355 };
356
357
358
359 struct pipe_resource *
360 svga_buffer_create(struct pipe_screen *screen,
361 const struct pipe_resource *template)
362 {
363 struct svga_screen *ss = svga_screen(screen);
364 struct svga_buffer *sbuf;
365
366 sbuf = CALLOC_STRUCT(svga_buffer);
367 if (!sbuf)
368 goto error1;
369
370 sbuf->b.b = *template;
371 sbuf->b.vtbl = &svga_buffer_vtbl;
372 pipe_reference_init(&sbuf->b.b.reference, 1);
373 sbuf->b.b.screen = screen;
374 sbuf->bind_flags = template->bind;
375
376 if (template->bind & PIPE_BIND_CONSTANT_BUFFER) {
377 /* Constant buffers can only have the PIPE_BIND_CONSTANT_BUFFER
378 * flag set.
379 */
380 if (ss->sws->have_vgpu10) {
381 sbuf->bind_flags = PIPE_BIND_CONSTANT_BUFFER;
382
383 /* Constant buffer size needs to be in multiples of 16. */
384 sbuf->b.b.width0 = align(sbuf->b.b.width0, 16);
385 }
386 }
387
388 if (svga_buffer_needs_hw_storage(template->bind)) {
389
390 /* If the buffer will be used for vertex/index/stream data, set all
391 * the flags so that the buffer will be accepted for all those uses.
392 * Note that the PIPE_BIND_ flags we get from the state tracker are
393 * just a hint about how the buffer may be used. And OpenGL buffer
394 * object may be used for many different things.
395 */
396 if (!(template->bind & PIPE_BIND_CONSTANT_BUFFER)) {
397 /* Not a constant buffer. The buffer may be used for vertex data,
398 * indexes or stream-out.
399 */
400 sbuf->bind_flags |= (PIPE_BIND_VERTEX_BUFFER |
401 PIPE_BIND_INDEX_BUFFER);
402 if (ss->sws->have_vgpu10)
403 sbuf->bind_flags |= PIPE_BIND_STREAM_OUTPUT;
404 }
405
406 if (svga_buffer_create_host_surface(ss, sbuf) != PIPE_OK)
407 goto error2;
408 }
409 else {
410 sbuf->swbuf = align_malloc(sbuf->b.b.width0, 64);
411 if (!sbuf->swbuf)
412 goto error2;
413 }
414
415 debug_reference(&sbuf->b.b.reference,
416 (debug_reference_descriptor)debug_describe_resource, 0);
417
418 sbuf->size = util_resource_size(&sbuf->b.b);
419 ss->hud.total_resource_bytes += sbuf->size;
420
421 ss->hud.num_resources++;
422
423 return &sbuf->b.b;
424
425 error2:
426 FREE(sbuf);
427 error1:
428 return NULL;
429 }
430
431
432 struct pipe_resource *
433 svga_user_buffer_create(struct pipe_screen *screen,
434 void *ptr,
435 unsigned bytes,
436 unsigned bind)
437 {
438 struct svga_buffer *sbuf;
439 struct svga_screen *ss = svga_screen(screen);
440
441 sbuf = CALLOC_STRUCT(svga_buffer);
442 if (!sbuf)
443 goto no_sbuf;
444
445 pipe_reference_init(&sbuf->b.b.reference, 1);
446 sbuf->b.vtbl = &svga_buffer_vtbl;
447 sbuf->b.b.screen = screen;
448 sbuf->b.b.format = PIPE_FORMAT_R8_UNORM; /* ?? */
449 sbuf->b.b.usage = PIPE_USAGE_IMMUTABLE;
450 sbuf->b.b.bind = bind;
451 sbuf->b.b.width0 = bytes;
452 sbuf->b.b.height0 = 1;
453 sbuf->b.b.depth0 = 1;
454 sbuf->b.b.array_size = 1;
455
456 sbuf->bind_flags = bind;
457 sbuf->swbuf = ptr;
458 sbuf->user = TRUE;
459
460 debug_reference(&sbuf->b.b.reference,
461 (debug_reference_descriptor)debug_describe_resource, 0);
462
463 ss->hud.num_resources++;
464
465 return &sbuf->b.b;
466
467 no_sbuf:
468 return NULL;
469 }
470
471
472