util: Move gallium's PIPE_FORMAT utils to /util/format/
[mesa.git] / src / gallium / drivers / svga / svga_resource_texture.c
1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 #include "svga3d_reg.h"
27 #include "svga3d_surfacedefs.h"
28
29 #include "pipe/p_state.h"
30 #include "pipe/p_defines.h"
31 #include "os/os_thread.h"
32 #include "util/format/u_format.h"
33 #include "util/u_inlines.h"
34 #include "util/u_math.h"
35 #include "util/u_memory.h"
36 #include "util/u_resource.h"
37 #include "util/u_upload_mgr.h"
38
39 #include "svga_cmd.h"
40 #include "svga_format.h"
41 #include "svga_screen.h"
42 #include "svga_context.h"
43 #include "svga_resource_texture.h"
44 #include "svga_resource_buffer.h"
45 #include "svga_sampler_view.h"
46 #include "svga_winsys.h"
47 #include "svga_debug.h"
48
49
50 static void
51 svga_transfer_dma_band(struct svga_context *svga,
52 struct svga_transfer *st,
53 SVGA3dTransferType transfer,
54 unsigned x, unsigned y, unsigned z,
55 unsigned w, unsigned h, unsigned d,
56 unsigned srcx, unsigned srcy, unsigned srcz,
57 SVGA3dSurfaceDMAFlags flags)
58 {
59 struct svga_texture *texture = svga_texture(st->base.resource);
60 SVGA3dCopyBox box;
61 enum pipe_error ret;
62
63 assert(!st->use_direct_map);
64
65 box.x = x;
66 box.y = y;
67 box.z = z;
68 box.w = w;
69 box.h = h;
70 box.d = d;
71 box.srcx = srcx;
72 box.srcy = srcy;
73 box.srcz = srcz;
74
75 SVGA_DBG(DEBUG_DMA, "dma %s sid %p, face %u, (%u, %u, %u) - "
76 "(%u, %u, %u), %ubpp\n",
77 transfer == SVGA3D_WRITE_HOST_VRAM ? "to" : "from",
78 texture->handle,
79 st->slice,
80 x,
81 y,
82 z,
83 x + w,
84 y + h,
85 z + 1,
86 util_format_get_blocksize(texture->b.b.format) * 8 /
87 (util_format_get_blockwidth(texture->b.b.format)
88 * util_format_get_blockheight(texture->b.b.format)));
89
90 ret = SVGA3D_SurfaceDMA(svga->swc, st, transfer, &box, 1, flags);
91 if (ret != PIPE_OK) {
92 svga_context_flush(svga, NULL);
93 ret = SVGA3D_SurfaceDMA(svga->swc, st, transfer, &box, 1, flags);
94 assert(ret == PIPE_OK);
95 }
96 }
97
98
99 static void
100 svga_transfer_dma(struct svga_context *svga,
101 struct svga_transfer *st,
102 SVGA3dTransferType transfer,
103 SVGA3dSurfaceDMAFlags flags)
104 {
105 struct svga_texture *texture = svga_texture(st->base.resource);
106 struct svga_screen *screen = svga_screen(texture->b.b.screen);
107 struct svga_winsys_screen *sws = screen->sws;
108 struct pipe_fence_handle *fence = NULL;
109
110 assert(!st->use_direct_map);
111
112 if (transfer == SVGA3D_READ_HOST_VRAM) {
113 SVGA_DBG(DEBUG_PERF, "%s: readback transfer\n", __FUNCTION__);
114 }
115
116 /* Ensure any pending operations on host surfaces are queued on the command
117 * buffer first.
118 */
119 svga_surfaces_flush(svga);
120
121 if (!st->swbuf) {
122 /* Do the DMA transfer in a single go */
123 svga_transfer_dma_band(svga, st, transfer,
124 st->box.x, st->box.y, st->box.z,
125 st->box.w, st->box.h, st->box.d,
126 0, 0, 0,
127 flags);
128
129 if (transfer == SVGA3D_READ_HOST_VRAM) {
130 svga_context_flush(svga, &fence);
131 sws->fence_finish(sws, fence, PIPE_TIMEOUT_INFINITE, 0);
132 sws->fence_reference(sws, &fence, NULL);
133 }
134 }
135 else {
136 int y, h, srcy;
137 unsigned blockheight =
138 util_format_get_blockheight(st->base.resource->format);
139
140 h = st->hw_nblocksy * blockheight;
141 srcy = 0;
142
143 for (y = 0; y < st->box.h; y += h) {
144 unsigned offset, length;
145 void *hw, *sw;
146
147 if (y + h > st->box.h)
148 h = st->box.h - y;
149
150 /* Transfer band must be aligned to pixel block boundaries */
151 assert(y % blockheight == 0);
152 assert(h % blockheight == 0);
153
154 offset = y * st->base.stride / blockheight;
155 length = h * st->base.stride / blockheight;
156
157 sw = (uint8_t *) st->swbuf + offset;
158
159 if (transfer == SVGA3D_WRITE_HOST_VRAM) {
160 unsigned usage = PIPE_TRANSFER_WRITE;
161
162 /* Wait for the previous DMAs to complete */
163 /* TODO: keep one DMA (at half the size) in the background */
164 if (y) {
165 svga_context_flush(svga, NULL);
166 usage |= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE;
167 }
168
169 hw = sws->buffer_map(sws, st->hwbuf, usage);
170 assert(hw);
171 if (hw) {
172 memcpy(hw, sw, length);
173 sws->buffer_unmap(sws, st->hwbuf);
174 }
175 }
176
177 svga_transfer_dma_band(svga, st, transfer,
178 st->box.x, y, st->box.z,
179 st->box.w, h, st->box.d,
180 0, srcy, 0, flags);
181
182 /*
183 * Prevent the texture contents to be discarded on the next band
184 * upload.
185 */
186 flags.discard = FALSE;
187
188 if (transfer == SVGA3D_READ_HOST_VRAM) {
189 svga_context_flush(svga, &fence);
190 sws->fence_finish(sws, fence, PIPE_TIMEOUT_INFINITE, 0);
191
192 hw = sws->buffer_map(sws, st->hwbuf, PIPE_TRANSFER_READ);
193 assert(hw);
194 if (hw) {
195 memcpy(sw, hw, length);
196 sws->buffer_unmap(sws, st->hwbuf);
197 }
198 }
199 }
200 }
201 }
202
203
204
205 static bool
206 svga_texture_get_handle(struct pipe_screen *screen,
207 struct pipe_resource *texture,
208 struct winsys_handle *whandle)
209 {
210 struct svga_winsys_screen *sws = svga_winsys_screen(texture->screen);
211 unsigned stride;
212
213 assert(svga_texture(texture)->key.cachable == 0);
214 svga_texture(texture)->key.cachable = 0;
215
216 stride = util_format_get_nblocksx(texture->format, texture->width0) *
217 util_format_get_blocksize(texture->format);
218
219 return sws->surface_get_handle(sws, svga_texture(texture)->handle,
220 stride, whandle);
221 }
222
223
224 static void
225 svga_texture_destroy(struct pipe_screen *screen,
226 struct pipe_resource *pt)
227 {
228 struct svga_screen *ss = svga_screen(screen);
229 struct svga_texture *tex = svga_texture(pt);
230
231 ss->texture_timestamp++;
232
233 svga_sampler_view_reference(&tex->cached_view, NULL);
234
235 /*
236 DBG("%s deleting %p\n", __FUNCTION__, (void *) tex);
237 */
238 SVGA_DBG(DEBUG_DMA, "unref sid %p (texture)\n", tex->handle);
239 svga_screen_surface_destroy(ss, &tex->key, &tex->handle);
240
241 /* Destroy the backed surface handle if exists */
242 if (tex->backed_handle)
243 svga_screen_surface_destroy(ss, &tex->backed_key, &tex->backed_handle);
244
245 ss->hud.total_resource_bytes -= tex->size;
246
247 FREE(tex->defined);
248 FREE(tex->rendered_to);
249 FREE(tex->dirty);
250 FREE(tex);
251
252 assert(ss->hud.num_resources > 0);
253 if (ss->hud.num_resources > 0)
254 ss->hud.num_resources--;
255 }
256
257
258 /**
259 * Determine if we need to read back a texture image before mapping it.
260 */
261 static inline boolean
262 need_tex_readback(struct svga_transfer *st)
263 {
264 if (st->base.usage & PIPE_TRANSFER_READ)
265 return TRUE;
266
267 if ((st->base.usage & PIPE_TRANSFER_WRITE) &&
268 ((st->base.usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) == 0)) {
269 return svga_was_texture_rendered_to(svga_texture(st->base.resource),
270 st->slice, st->base.level);
271 }
272
273 return FALSE;
274 }
275
276
277 static enum pipe_error
278 readback_image_vgpu9(struct svga_context *svga,
279 struct svga_winsys_surface *surf,
280 unsigned slice,
281 unsigned level)
282 {
283 enum pipe_error ret;
284
285 ret = SVGA3D_ReadbackGBImage(svga->swc, surf, slice, level);
286 if (ret != PIPE_OK) {
287 svga_context_flush(svga, NULL);
288 ret = SVGA3D_ReadbackGBImage(svga->swc, surf, slice, level);
289 }
290 return ret;
291 }
292
293
294 static enum pipe_error
295 readback_image_vgpu10(struct svga_context *svga,
296 struct svga_winsys_surface *surf,
297 unsigned slice,
298 unsigned level,
299 unsigned numMipLevels)
300 {
301 enum pipe_error ret;
302 unsigned subResource;
303
304 subResource = slice * numMipLevels + level;
305 ret = SVGA3D_vgpu10_ReadbackSubResource(svga->swc, surf, subResource);
306 if (ret != PIPE_OK) {
307 svga_context_flush(svga, NULL);
308 ret = SVGA3D_vgpu10_ReadbackSubResource(svga->swc, surf, subResource);
309 }
310 return ret;
311 }
312
313
314 /**
315 * Use DMA for the transfer request
316 */
317 static void *
318 svga_texture_transfer_map_dma(struct svga_context *svga,
319 struct svga_transfer *st)
320 {
321 struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws;
322 struct pipe_resource *texture = st->base.resource;
323 unsigned nblocksx, nblocksy;
324 unsigned d;
325 unsigned usage = st->base.usage;
326
327 /* we'll put the data into a tightly packed buffer */
328 nblocksx = util_format_get_nblocksx(texture->format, st->box.w);
329 nblocksy = util_format_get_nblocksy(texture->format, st->box.h);
330 d = st->box.d;
331
332 st->base.stride = nblocksx*util_format_get_blocksize(texture->format);
333 st->base.layer_stride = st->base.stride * nblocksy;
334 st->hw_nblocksy = nblocksy;
335
336 st->hwbuf = svga_winsys_buffer_create(svga, 1, 0,
337 st->hw_nblocksy * st->base.stride * d);
338
339 while (!st->hwbuf && (st->hw_nblocksy /= 2)) {
340 st->hwbuf =
341 svga_winsys_buffer_create(svga, 1, 0,
342 st->hw_nblocksy * st->base.stride * d);
343 }
344
345 if (!st->hwbuf)
346 return NULL;
347
348 if (st->hw_nblocksy < nblocksy) {
349 /* We couldn't allocate a hardware buffer big enough for the transfer,
350 * so allocate regular malloc memory instead
351 */
352 if (0) {
353 debug_printf("%s: failed to allocate %u KB of DMA, "
354 "splitting into %u x %u KB DMA transfers\n",
355 __FUNCTION__,
356 (nblocksy * st->base.stride + 1023) / 1024,
357 (nblocksy + st->hw_nblocksy - 1) / st->hw_nblocksy,
358 (st->hw_nblocksy * st->base.stride + 1023) / 1024);
359 }
360
361 st->swbuf = MALLOC(nblocksy * st->base.stride * d);
362 if (!st->swbuf) {
363 sws->buffer_destroy(sws, st->hwbuf);
364 return NULL;
365 }
366 }
367
368 if (usage & PIPE_TRANSFER_READ) {
369 SVGA3dSurfaceDMAFlags flags;
370 memset(&flags, 0, sizeof flags);
371 svga_transfer_dma(svga, st, SVGA3D_READ_HOST_VRAM, flags);
372 }
373
374 if (st->swbuf) {
375 return st->swbuf;
376 }
377 else {
378 return sws->buffer_map(sws, st->hwbuf, usage);
379 }
380 }
381
382
383 /**
384 * Use direct map for the transfer request
385 */
386 static void *
387 svga_texture_transfer_map_direct(struct svga_context *svga,
388 struct svga_transfer *st)
389 {
390 struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws;
391 struct pipe_transfer *transfer = &st->base;
392 struct pipe_resource *texture = transfer->resource;
393 struct svga_texture *tex = svga_texture(texture);
394 struct svga_winsys_surface *surf = tex->handle;
395 unsigned level = st->base.level;
396 unsigned w, h, nblocksx, nblocksy, i;
397 unsigned usage = st->base.usage;
398
399 if (need_tex_readback(st)) {
400 enum pipe_error ret;
401
402 svga_surfaces_flush(svga);
403
404 if (!svga->swc->force_coherent || tex->imported) {
405 for (i = 0; i < st->box.d; i++) {
406 if (svga_have_vgpu10(svga)) {
407 ret = readback_image_vgpu10(svga, surf, st->slice + i, level,
408 tex->b.b.last_level + 1);
409 } else {
410 ret = readback_image_vgpu9(svga, surf, st->slice + i, level);
411 }
412 }
413 svga->hud.num_readbacks++;
414 SVGA_STATS_COUNT_INC(sws, SVGA_STATS_COUNT_TEXREADBACK);
415
416 assert(ret == PIPE_OK);
417 (void) ret;
418
419 svga_context_flush(svga, NULL);
420 }
421 /*
422 * Note: if PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE were specified
423 * we could potentially clear the flag for all faces/layers/mips.
424 */
425 svga_clear_texture_rendered_to(tex, st->slice, level);
426 }
427 else {
428 assert(usage & PIPE_TRANSFER_WRITE);
429 if ((usage & PIPE_TRANSFER_UNSYNCHRONIZED) == 0) {
430 if (svga_is_texture_dirty(tex, st->slice, level)) {
431 /*
432 * do a surface flush if the subresource has been modified
433 * in this command buffer.
434 */
435 svga_surfaces_flush(svga);
436 if (!sws->surface_is_flushed(sws, surf)) {
437 svga->hud.surface_write_flushes++;
438 SVGA_STATS_COUNT_INC(sws, SVGA_STATS_COUNT_SURFACEWRITEFLUSH);
439 svga_context_flush(svga, NULL);
440 }
441 }
442 }
443 }
444
445 /* we'll directly access the guest-backed surface */
446 w = u_minify(texture->width0, level);
447 h = u_minify(texture->height0, level);
448 nblocksx = util_format_get_nblocksx(texture->format, w);
449 nblocksy = util_format_get_nblocksy(texture->format, h);
450 st->hw_nblocksy = nblocksy;
451 st->base.stride = nblocksx*util_format_get_blocksize(texture->format);
452 st->base.layer_stride = st->base.stride * nblocksy;
453
454 /*
455 * Begin mapping code
456 */
457 {
458 SVGA3dSize baseLevelSize;
459 uint8_t *map;
460 boolean retry;
461 unsigned offset, mip_width, mip_height;
462
463 map = svga->swc->surface_map(svga->swc, surf, usage, &retry);
464 if (map == NULL && retry) {
465 /*
466 * At this point, the svga_surfaces_flush() should already have
467 * called in svga_texture_get_transfer().
468 */
469 svga->hud.surface_write_flushes++;
470 svga_context_flush(svga, NULL);
471 map = svga->swc->surface_map(svga->swc, surf, usage, &retry);
472 }
473
474 /*
475 * Make sure we return NULL if the map fails
476 */
477 if (!map) {
478 return NULL;
479 }
480
481 /**
482 * Compute the offset to the specific texture slice in the buffer.
483 */
484 baseLevelSize.width = tex->b.b.width0;
485 baseLevelSize.height = tex->b.b.height0;
486 baseLevelSize.depth = tex->b.b.depth0;
487
488 if ((tex->b.b.target == PIPE_TEXTURE_1D_ARRAY) ||
489 (tex->b.b.target == PIPE_TEXTURE_2D_ARRAY) ||
490 (tex->b.b.target == PIPE_TEXTURE_CUBE_ARRAY)) {
491 st->base.layer_stride =
492 svga3dsurface_get_image_offset(tex->key.format, baseLevelSize,
493 tex->b.b.last_level + 1, 1, 0);
494 }
495
496 offset = svga3dsurface_get_image_offset(tex->key.format, baseLevelSize,
497 tex->b.b.last_level + 1, /* numMips */
498 st->slice, level);
499 if (level > 0) {
500 assert(offset > 0);
501 }
502
503 mip_width = u_minify(tex->b.b.width0, level);
504 mip_height = u_minify(tex->b.b.height0, level);
505
506 offset += svga3dsurface_get_pixel_offset(tex->key.format,
507 mip_width, mip_height,
508 st->box.x,
509 st->box.y,
510 st->box.z);
511
512 return (void *) (map + offset);
513 }
514 }
515
516
517 /**
518 * Request a transfer map to the texture resource
519 */
520 static void *
521 svga_texture_transfer_map(struct pipe_context *pipe,
522 struct pipe_resource *texture,
523 unsigned level,
524 unsigned usage,
525 const struct pipe_box *box,
526 struct pipe_transfer **ptransfer)
527 {
528 struct svga_context *svga = svga_context(pipe);
529 struct svga_winsys_screen *sws = svga_screen(pipe->screen)->sws;
530 struct svga_texture *tex = svga_texture(texture);
531 struct svga_transfer *st;
532 struct svga_winsys_surface *surf = tex->handle;
533 boolean use_direct_map = svga_have_gb_objects(svga) &&
534 !svga_have_gb_dma(svga);
535 void *map = NULL;
536 int64_t begin = svga_get_time(svga);
537
538 SVGA_STATS_TIME_PUSH(sws, SVGA_STATS_TIME_TEXTRANSFERMAP);
539
540 if (!surf)
541 goto done;
542
543 /* We can't map texture storage directly unless we have GB objects */
544 if (usage & PIPE_TRANSFER_MAP_DIRECTLY) {
545 if (svga_have_gb_objects(svga))
546 use_direct_map = TRUE;
547 else
548 goto done;
549 }
550
551 st = CALLOC_STRUCT(svga_transfer);
552 if (!st)
553 goto done;
554
555 st->base.level = level;
556 st->base.usage = usage;
557 st->base.box = *box;
558
559 /* The modified transfer map box with the array index removed from z.
560 * The array index is specified in slice.
561 */
562 st->box.x = box->x;
563 st->box.y = box->y;
564 st->box.z = box->z;
565 st->box.w = box->width;
566 st->box.h = box->height;
567 st->box.d = box->depth;
568
569 switch (tex->b.b.target) {
570 case PIPE_TEXTURE_CUBE:
571 st->slice = st->base.box.z;
572 st->box.z = 0; /* so we don't apply double offsets below */
573 break;
574 case PIPE_TEXTURE_1D_ARRAY:
575 case PIPE_TEXTURE_2D_ARRAY:
576 case PIPE_TEXTURE_CUBE_ARRAY:
577 st->slice = st->base.box.z;
578 st->box.z = 0; /* so we don't apply double offsets below */
579
580 /* Force direct map for transfering multiple slices */
581 if (st->base.box.depth > 1)
582 use_direct_map = svga_have_gb_objects(svga);
583
584 break;
585 default:
586 st->slice = 0;
587 break;
588 }
589
590 /* Force direct map for multisample surface */
591 if (texture->nr_samples > 1) {
592 assert(svga_have_gb_objects(svga));
593 assert(sws->have_sm4_1);
594 use_direct_map = TRUE;
595 }
596
597 st->use_direct_map = use_direct_map;
598 pipe_resource_reference(&st->base.resource, texture);
599
600 /* If this is the first time mapping to the surface in this
601 * command buffer, clear the dirty masks of this surface.
602 */
603 if (sws->surface_is_flushed(sws, surf)) {
604 svga_clear_texture_dirty(tex);
605 }
606
607 if (!use_direct_map) {
608 /* upload to the DMA buffer */
609 map = svga_texture_transfer_map_dma(svga, st);
610 }
611 else {
612 boolean can_use_upload = tex->can_use_upload &&
613 !(st->base.usage & PIPE_TRANSFER_READ);
614 boolean was_rendered_to =
615 svga_was_texture_rendered_to(svga_texture(texture),
616 st->slice, st->base.level);
617
618 /* If the texture was already rendered to and upload buffer
619 * is supported, then we will use upload buffer to
620 * avoid the need to read back the texture content; otherwise,
621 * we'll first try to map directly to the GB surface, if it is blocked,
622 * then we'll try the upload buffer.
623 */
624 if (was_rendered_to && can_use_upload) {
625 map = svga_texture_transfer_map_upload(svga, st);
626 }
627 else {
628 unsigned orig_usage = st->base.usage;
629
630 /* First try directly map to the GB surface */
631 if (can_use_upload)
632 st->base.usage |= PIPE_TRANSFER_DONTBLOCK;
633 map = svga_texture_transfer_map_direct(svga, st);
634 st->base.usage = orig_usage;
635
636 if (!map && can_use_upload) {
637 /* if direct map with DONTBLOCK fails, then try upload to the
638 * texture upload buffer.
639 */
640 map = svga_texture_transfer_map_upload(svga, st);
641 }
642 }
643
644 /* If upload fails, then try direct map again without forcing it
645 * to DONTBLOCK.
646 */
647 if (!map) {
648 map = svga_texture_transfer_map_direct(svga, st);
649 }
650 }
651
652 if (!map) {
653 FREE(st);
654 }
655 else {
656 *ptransfer = &st->base;
657 svga->hud.num_textures_mapped++;
658 if (usage & PIPE_TRANSFER_WRITE) {
659 /* record texture upload for HUD */
660 svga->hud.num_bytes_uploaded +=
661 st->base.layer_stride * st->box.d;
662
663 /* mark this texture level as dirty */
664 svga_set_texture_dirty(tex, st->slice, level);
665 }
666 }
667
668 done:
669 svga->hud.map_buffer_time += (svga_get_time(svga) - begin);
670 SVGA_STATS_TIME_POP(sws);
671 (void) sws;
672
673 return map;
674 }
675
676 /**
677 * Unmap a GB texture surface.
678 */
679 static void
680 svga_texture_surface_unmap(struct svga_context *svga,
681 struct pipe_transfer *transfer)
682 {
683 struct svga_winsys_surface *surf = svga_texture(transfer->resource)->handle;
684 struct svga_winsys_context *swc = svga->swc;
685 boolean rebind;
686
687 assert(surf);
688
689 swc->surface_unmap(swc, surf, &rebind);
690 if (rebind) {
691 enum pipe_error ret;
692 ret = SVGA3D_BindGBSurface(swc, surf);
693 if (ret != PIPE_OK) {
694 /* flush and retry */
695 svga_context_flush(svga, NULL);
696 ret = SVGA3D_BindGBSurface(swc, surf);
697 assert(ret == PIPE_OK);
698 }
699 if (swc->force_coherent) {
700 ret = SVGA3D_UpdateGBSurface(swc, surf);
701 if (ret != PIPE_OK) {
702 /* flush and retry */
703 svga_context_flush(svga, NULL);
704 ret = SVGA3D_UpdateGBSurface(swc, surf);
705 assert(ret == PIPE_OK);
706 }
707 }
708 }
709 }
710
711
712 static enum pipe_error
713 update_image_vgpu9(struct svga_context *svga,
714 struct svga_winsys_surface *surf,
715 const SVGA3dBox *box,
716 unsigned slice,
717 unsigned level)
718 {
719 enum pipe_error ret;
720
721 ret = SVGA3D_UpdateGBImage(svga->swc, surf, box, slice, level);
722 if (ret != PIPE_OK) {
723 svga_context_flush(svga, NULL);
724 ret = SVGA3D_UpdateGBImage(svga->swc, surf, box, slice, level);
725 }
726 return ret;
727 }
728
729
730 static enum pipe_error
731 update_image_vgpu10(struct svga_context *svga,
732 struct svga_winsys_surface *surf,
733 const SVGA3dBox *box,
734 unsigned slice,
735 unsigned level,
736 unsigned numMipLevels)
737 {
738 enum pipe_error ret;
739 unsigned subResource;
740
741 subResource = slice * numMipLevels + level;
742
743 ret = SVGA3D_vgpu10_UpdateSubResource(svga->swc, surf, box, subResource);
744 if (ret != PIPE_OK) {
745 svga_context_flush(svga, NULL);
746 ret = SVGA3D_vgpu10_UpdateSubResource(svga->swc, surf, box, subResource);
747 }
748 return ret;
749 }
750
751
752 /**
753 * unmap DMA transfer request
754 */
755 static void
756 svga_texture_transfer_unmap_dma(struct svga_context *svga,
757 struct svga_transfer *st)
758 {
759 struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws;
760
761 if (!st->swbuf)
762 sws->buffer_unmap(sws, st->hwbuf);
763
764 if (st->base.usage & PIPE_TRANSFER_WRITE) {
765 /* Use DMA to transfer texture data */
766 SVGA3dSurfaceDMAFlags flags;
767 struct pipe_resource *texture = st->base.resource;
768 struct svga_texture *tex = svga_texture(texture);
769
770
771 memset(&flags, 0, sizeof flags);
772 if (st->base.usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
773 flags.discard = TRUE;
774 }
775 if (st->base.usage & PIPE_TRANSFER_UNSYNCHRONIZED) {
776 flags.unsynchronized = TRUE;
777 }
778
779 svga_transfer_dma(svga, st, SVGA3D_WRITE_HOST_VRAM, flags);
780 svga_set_texture_rendered_to(tex, st->slice, st->base.level);
781 }
782
783 FREE(st->swbuf);
784 sws->buffer_destroy(sws, st->hwbuf);
785 }
786
787
788 /**
789 * unmap direct map transfer request
790 */
791 static void
792 svga_texture_transfer_unmap_direct(struct svga_context *svga,
793 struct svga_transfer *st)
794 {
795 struct pipe_transfer *transfer = &st->base;
796 struct svga_texture *tex = svga_texture(transfer->resource);
797
798 svga_texture_surface_unmap(svga, transfer);
799
800 /* Now send an update command to update the content in the backend. */
801 if (st->base.usage & PIPE_TRANSFER_WRITE) {
802 struct svga_winsys_surface *surf = tex->handle;
803 enum pipe_error ret;
804
805 assert(svga_have_gb_objects(svga));
806
807 /* update the effected region */
808 SVGA3dBox box = st->box;
809 unsigned nlayers;
810
811 switch (tex->b.b.target) {
812 case PIPE_TEXTURE_2D_ARRAY:
813 case PIPE_TEXTURE_CUBE_ARRAY:
814 case PIPE_TEXTURE_1D_ARRAY:
815 nlayers = box.d;
816 box.d = 1;
817 break;
818 default:
819 nlayers = 1;
820 break;
821 }
822
823
824 if (0)
825 debug_printf("%s %d, %d, %d %d x %d x %d\n",
826 __FUNCTION__,
827 box.x, box.y, box.z,
828 box.w, box.h, box.d);
829
830 if (!svga->swc->force_coherent || tex->imported) {
831 if (svga_have_vgpu10(svga)) {
832 unsigned i;
833
834 for (i = 0; i < nlayers; i++) {
835 ret = update_image_vgpu10(svga, surf, &box,
836 st->slice + i, transfer->level,
837 tex->b.b.last_level + 1);
838 assert(ret == PIPE_OK);
839 }
840 } else {
841 assert(nlayers == 1);
842 ret = update_image_vgpu9(svga, surf, &box, st->slice,
843 transfer->level);
844 assert(ret == PIPE_OK);
845 }
846 }
847 (void) ret;
848 }
849 }
850
851
852 static void
853 svga_texture_transfer_unmap(struct pipe_context *pipe,
854 struct pipe_transfer *transfer)
855 {
856 struct svga_context *svga = svga_context(pipe);
857 struct svga_screen *ss = svga_screen(pipe->screen);
858 struct svga_winsys_screen *sws = ss->sws;
859 struct svga_transfer *st = svga_transfer(transfer);
860 struct svga_texture *tex = svga_texture(transfer->resource);
861
862 SVGA_STATS_TIME_PUSH(sws, SVGA_STATS_TIME_TEXTRANSFERUNMAP);
863
864 if (!st->use_direct_map) {
865 svga_texture_transfer_unmap_dma(svga, st);
866 }
867 else if (st->upload.buf) {
868 svga_texture_transfer_unmap_upload(svga, st);
869 }
870 else {
871 svga_texture_transfer_unmap_direct(svga, st);
872 }
873
874 if (st->base.usage & PIPE_TRANSFER_WRITE) {
875 svga->hud.num_resource_updates++;
876
877 /* Mark the texture level as dirty */
878 ss->texture_timestamp++;
879 svga_age_texture_view(tex, transfer->level);
880 if (transfer->resource->target == PIPE_TEXTURE_CUBE)
881 svga_define_texture_level(tex, st->slice, transfer->level);
882 else
883 svga_define_texture_level(tex, 0, transfer->level);
884 }
885
886 pipe_resource_reference(&st->base.resource, NULL);
887 FREE(st);
888 SVGA_STATS_TIME_POP(sws);
889 (void) sws;
890 }
891
892
893 /**
894 * Does format store depth values?
895 */
896 static inline boolean
897 format_has_depth(enum pipe_format format)
898 {
899 const struct util_format_description *desc = util_format_description(format);
900 return util_format_has_depth(desc);
901 }
902
903
904 struct u_resource_vtbl svga_texture_vtbl =
905 {
906 svga_texture_get_handle, /* get_handle */
907 svga_texture_destroy, /* resource_destroy */
908 svga_texture_transfer_map, /* transfer_map */
909 u_default_transfer_flush_region, /* transfer_flush_region */
910 svga_texture_transfer_unmap, /* transfer_unmap */
911 };
912
913
914 struct pipe_resource *
915 svga_texture_create(struct pipe_screen *screen,
916 const struct pipe_resource *template)
917 {
918 struct svga_screen *svgascreen = svga_screen(screen);
919 struct svga_texture *tex;
920 unsigned bindings = template->bind;
921
922 SVGA_STATS_TIME_PUSH(svgascreen->sws,
923 SVGA_STATS_TIME_CREATETEXTURE);
924
925 assert(template->last_level < SVGA_MAX_TEXTURE_LEVELS);
926 if (template->last_level >= SVGA_MAX_TEXTURE_LEVELS) {
927 goto fail_notex;
928 }
929
930 /* Verify the number of mipmap levels isn't impossibly large. For example,
931 * if the base 2D image is 16x16, we can't have 8 mipmap levels.
932 * The state tracker should never ask us to create a resource with invalid
933 * parameters.
934 */
935 {
936 unsigned max_dim = template->width0;
937
938 switch (template->target) {
939 case PIPE_TEXTURE_1D:
940 case PIPE_TEXTURE_1D_ARRAY:
941 // nothing
942 break;
943 case PIPE_TEXTURE_2D:
944 case PIPE_TEXTURE_CUBE:
945 case PIPE_TEXTURE_CUBE_ARRAY:
946 case PIPE_TEXTURE_2D_ARRAY:
947 max_dim = MAX2(max_dim, template->height0);
948 break;
949 case PIPE_TEXTURE_3D:
950 max_dim = MAX3(max_dim, template->height0, template->depth0);
951 break;
952 case PIPE_TEXTURE_RECT:
953 case PIPE_BUFFER:
954 assert(template->last_level == 0);
955 /* the assertion below should always pass */
956 break;
957 default:
958 debug_printf("Unexpected texture target type\n");
959 }
960 assert(1 << template->last_level <= max_dim);
961 }
962
963 tex = CALLOC_STRUCT(svga_texture);
964 if (!tex) {
965 goto fail_notex;
966 }
967
968 tex->defined = CALLOC(template->depth0 * template->array_size,
969 sizeof(tex->defined[0]));
970 if (!tex->defined) {
971 FREE(tex);
972 goto fail_notex;
973 }
974
975 tex->rendered_to = CALLOC(template->depth0 * template->array_size,
976 sizeof(tex->rendered_to[0]));
977 if (!tex->rendered_to) {
978 goto fail;
979 }
980
981 tex->dirty = CALLOC(template->depth0 * template->array_size,
982 sizeof(tex->dirty[0]));
983 if (!tex->dirty) {
984 goto fail;
985 }
986
987 tex->b.b = *template;
988 tex->b.vtbl = &svga_texture_vtbl;
989 pipe_reference_init(&tex->b.b.reference, 1);
990 tex->b.b.screen = screen;
991
992 tex->key.flags = 0;
993 tex->key.size.width = template->width0;
994 tex->key.size.height = template->height0;
995 tex->key.size.depth = template->depth0;
996 tex->key.arraySize = 1;
997 tex->key.numFaces = 1;
998
999 /* nr_samples=1 must be treated as a non-multisample texture */
1000 if (tex->b.b.nr_samples == 1) {
1001 tex->b.b.nr_samples = 0;
1002 }
1003 else if (tex->b.b.nr_samples > 1) {
1004 assert(svgascreen->sws->have_sm4_1);
1005 tex->key.flags |= SVGA3D_SURFACE_MULTISAMPLE;
1006 }
1007
1008 tex->key.sampleCount = tex->b.b.nr_samples;
1009
1010 if (svgascreen->sws->have_vgpu10) {
1011 switch (template->target) {
1012 case PIPE_TEXTURE_1D:
1013 tex->key.flags |= SVGA3D_SURFACE_1D;
1014 break;
1015 case PIPE_TEXTURE_1D_ARRAY:
1016 tex->key.flags |= SVGA3D_SURFACE_1D;
1017 /* fall-through */
1018 case PIPE_TEXTURE_2D_ARRAY:
1019 tex->key.flags |= SVGA3D_SURFACE_ARRAY;
1020 tex->key.arraySize = template->array_size;
1021 break;
1022 case PIPE_TEXTURE_3D:
1023 tex->key.flags |= SVGA3D_SURFACE_VOLUME;
1024 break;
1025 case PIPE_TEXTURE_CUBE:
1026 tex->key.flags |= (SVGA3D_SURFACE_CUBEMAP | SVGA3D_SURFACE_ARRAY);
1027 tex->key.numFaces = 6;
1028 break;
1029 case PIPE_TEXTURE_CUBE_ARRAY:
1030 assert(svgascreen->sws->have_sm4_1);
1031 tex->key.flags |= (SVGA3D_SURFACE_CUBEMAP | SVGA3D_SURFACE_ARRAY);
1032 tex->key.numFaces = 1; // arraySize already includes the 6 faces
1033 tex->key.arraySize = template->array_size;
1034 break;
1035 default:
1036 break;
1037 }
1038 }
1039 else {
1040 switch (template->target) {
1041 case PIPE_TEXTURE_3D:
1042 tex->key.flags |= SVGA3D_SURFACE_VOLUME;
1043 break;
1044 case PIPE_TEXTURE_CUBE:
1045 tex->key.flags |= SVGA3D_SURFACE_CUBEMAP;
1046 tex->key.numFaces = 6;
1047 break;
1048 default:
1049 break;
1050 }
1051 }
1052
1053 tex->key.cachable = 1;
1054
1055 if ((bindings & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL)) &&
1056 !(bindings & PIPE_BIND_SAMPLER_VIEW)) {
1057 /* Also check if the format can be sampled from */
1058 if (screen->is_format_supported(screen, template->format,
1059 template->target,
1060 template->nr_samples,
1061 template->nr_storage_samples,
1062 PIPE_BIND_SAMPLER_VIEW)) {
1063 bindings |= PIPE_BIND_SAMPLER_VIEW;
1064 }
1065 }
1066
1067 if (bindings & PIPE_BIND_SAMPLER_VIEW) {
1068 tex->key.flags |= SVGA3D_SURFACE_HINT_TEXTURE;
1069 tex->key.flags |= SVGA3D_SURFACE_BIND_SHADER_RESOURCE;
1070
1071 if (!(bindings & PIPE_BIND_RENDER_TARGET)) {
1072 /* Also check if the format is color renderable */
1073 if (screen->is_format_supported(screen, template->format,
1074 template->target,
1075 template->nr_samples,
1076 template->nr_storage_samples,
1077 PIPE_BIND_RENDER_TARGET)) {
1078 bindings |= PIPE_BIND_RENDER_TARGET;
1079 }
1080 }
1081
1082 if (!(bindings & PIPE_BIND_DEPTH_STENCIL)) {
1083 /* Also check if the format is depth/stencil renderable */
1084 if (screen->is_format_supported(screen, template->format,
1085 template->target,
1086 template->nr_samples,
1087 template->nr_storage_samples,
1088 PIPE_BIND_DEPTH_STENCIL)) {
1089 bindings |= PIPE_BIND_DEPTH_STENCIL;
1090 }
1091 }
1092 }
1093
1094 if (bindings & PIPE_BIND_DISPLAY_TARGET) {
1095 tex->key.cachable = 0;
1096 }
1097
1098 if (bindings & PIPE_BIND_SHARED) {
1099 tex->key.cachable = 0;
1100 }
1101
1102 if (bindings & (PIPE_BIND_SCANOUT | PIPE_BIND_CURSOR)) {
1103 tex->key.scanout = 1;
1104 tex->key.cachable = 0;
1105 }
1106
1107 /*
1108 * Note: Previously we never passed the
1109 * SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot
1110 * know beforehand whether a texture will be used as a rendertarget or not
1111 * and it always requests PIPE_BIND_RENDER_TARGET, therefore
1112 * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose.
1113 *
1114 * However, this was changed since other state trackers
1115 * (XA for example) uses it accurately and certain device versions
1116 * relies on it in certain situations to render correctly.
1117 */
1118 if ((bindings & PIPE_BIND_RENDER_TARGET) &&
1119 !util_format_is_s3tc(template->format)) {
1120 tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET;
1121 tex->key.flags |= SVGA3D_SURFACE_BIND_RENDER_TARGET;
1122 }
1123
1124 if (bindings & PIPE_BIND_DEPTH_STENCIL) {
1125 tex->key.flags |= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
1126 tex->key.flags |= SVGA3D_SURFACE_BIND_DEPTH_STENCIL;
1127 }
1128
1129 tex->key.numMipLevels = template->last_level + 1;
1130
1131 tex->key.format = svga_translate_format(svgascreen, template->format,
1132 bindings);
1133 if (tex->key.format == SVGA3D_FORMAT_INVALID) {
1134 goto fail;
1135 }
1136
1137 /* Use typeless formats for sRGB and depth resources. Typeless
1138 * formats can be reinterpreted as other formats. For example,
1139 * SVGA3D_R8G8B8A8_UNORM_TYPELESS can be interpreted as
1140 * SVGA3D_R8G8B8A8_UNORM_SRGB or SVGA3D_R8G8B8A8_UNORM.
1141 */
1142 if (svgascreen->sws->have_vgpu10 &&
1143 (util_format_is_srgb(template->format) ||
1144 format_has_depth(template->format))) {
1145 SVGA3dSurfaceFormat typeless = svga_typeless_format(tex->key.format);
1146 if (0) {
1147 debug_printf("Convert resource type %s -> %s (bind 0x%x)\n",
1148 svga_format_name(tex->key.format),
1149 svga_format_name(typeless),
1150 bindings);
1151 }
1152
1153 if (svga_format_is_uncompressed_snorm(tex->key.format)) {
1154 /* We can't normally render to snorm surfaces, but once we
1155 * substitute a typeless format, we can if the rendertarget view
1156 * is unorm. This can happen with GL_ARB_copy_image.
1157 */
1158 tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET;
1159 tex->key.flags |= SVGA3D_SURFACE_BIND_RENDER_TARGET;
1160 }
1161
1162 tex->key.format = typeless;
1163 }
1164
1165 SVGA_DBG(DEBUG_DMA, "surface_create for texture\n", tex->handle);
1166 tex->handle = svga_screen_surface_create(svgascreen, bindings,
1167 tex->b.b.usage,
1168 &tex->validated, &tex->key);
1169 if (!tex->handle) {
1170 goto fail;
1171 }
1172
1173 SVGA_DBG(DEBUG_DMA, " --> got sid %p (texture)\n", tex->handle);
1174
1175 debug_reference(&tex->b.b.reference,
1176 (debug_reference_descriptor)debug_describe_resource, 0);
1177
1178 tex->size = util_resource_size(template);
1179
1180 /* Determine if texture upload buffer can be used to upload this texture */
1181 tex->can_use_upload = svga_texture_transfer_map_can_upload(svgascreen,
1182 &tex->b.b);
1183
1184 /* Initialize the backing resource cache */
1185 tex->backed_handle = NULL;
1186
1187 svgascreen->hud.total_resource_bytes += tex->size;
1188 svgascreen->hud.num_resources++;
1189
1190 SVGA_STATS_TIME_POP(svgascreen->sws);
1191
1192 return &tex->b.b;
1193
1194 fail:
1195 if (tex->dirty)
1196 FREE(tex->dirty);
1197 if (tex->rendered_to)
1198 FREE(tex->rendered_to);
1199 if (tex->defined)
1200 FREE(tex->defined);
1201 FREE(tex);
1202 fail_notex:
1203 SVGA_STATS_TIME_POP(svgascreen->sws);
1204 return NULL;
1205 }
1206
1207
1208 struct pipe_resource *
1209 svga_texture_from_handle(struct pipe_screen *screen,
1210 const struct pipe_resource *template,
1211 struct winsys_handle *whandle)
1212 {
1213 struct svga_winsys_screen *sws = svga_winsys_screen(screen);
1214 struct svga_screen *ss = svga_screen(screen);
1215 struct svga_winsys_surface *srf;
1216 struct svga_texture *tex;
1217 enum SVGA3dSurfaceFormat format = 0;
1218 assert(screen);
1219
1220 /* Only supports one type */
1221 if ((template->target != PIPE_TEXTURE_2D &&
1222 template->target != PIPE_TEXTURE_RECT) ||
1223 template->last_level != 0 ||
1224 template->depth0 != 1) {
1225 return NULL;
1226 }
1227
1228 srf = sws->surface_from_handle(sws, whandle, &format);
1229
1230 if (!srf)
1231 return NULL;
1232
1233 if (!svga_format_is_shareable(ss, template->format, format,
1234 template->bind, true))
1235 goto out_unref;
1236
1237 tex = CALLOC_STRUCT(svga_texture);
1238 if (!tex)
1239 goto out_unref;
1240
1241 tex->defined = CALLOC(template->depth0 * template->array_size,
1242 sizeof(tex->defined[0]));
1243 if (!tex->defined)
1244 goto out_no_defined;
1245
1246 tex->b.b = *template;
1247 tex->b.vtbl = &svga_texture_vtbl;
1248 pipe_reference_init(&tex->b.b.reference, 1);
1249 tex->b.b.screen = screen;
1250
1251 SVGA_DBG(DEBUG_DMA, "wrap surface sid %p\n", srf);
1252
1253 tex->key.cachable = 0;
1254 tex->key.format = format;
1255 tex->handle = srf;
1256
1257 tex->rendered_to = CALLOC(1, sizeof(tex->rendered_to[0]));
1258 if (!tex->rendered_to)
1259 goto out_no_rendered_to;
1260
1261 tex->dirty = CALLOC(1, sizeof(tex->dirty[0]));
1262 if (!tex->dirty)
1263 goto out_no_dirty;
1264
1265 tex->imported = TRUE;
1266
1267 ss->hud.num_resources++;
1268
1269 return &tex->b.b;
1270
1271 out_no_dirty:
1272 FREE(tex->rendered_to);
1273 out_no_rendered_to:
1274 FREE(tex->defined);
1275 out_no_defined:
1276 FREE(tex);
1277 out_unref:
1278 sws->surface_reference(sws, &srf, NULL);
1279 return NULL;
1280 }
1281
1282 bool
1283 svga_texture_generate_mipmap(struct pipe_context *pipe,
1284 struct pipe_resource *pt,
1285 enum pipe_format format,
1286 unsigned base_level,
1287 unsigned last_level,
1288 unsigned first_layer,
1289 unsigned last_layer)
1290 {
1291 struct pipe_sampler_view templ, *psv;
1292 struct svga_pipe_sampler_view *sv;
1293 struct svga_context *svga = svga_context(pipe);
1294 struct svga_texture *tex = svga_texture(pt);
1295 enum pipe_error ret;
1296
1297 assert(svga_have_vgpu10(svga));
1298
1299 /* Only support 2D texture for now */
1300 if (pt->target != PIPE_TEXTURE_2D)
1301 return false;
1302
1303 /* Fallback to the mipmap generation utility for those formats that
1304 * do not support hw generate mipmap
1305 */
1306 if (!svga_format_support_gen_mips(format))
1307 return false;
1308
1309 /* Make sure the texture surface was created with
1310 * SVGA3D_SURFACE_BIND_RENDER_TARGET
1311 */
1312 if (!tex->handle || !(tex->key.flags & SVGA3D_SURFACE_BIND_RENDER_TARGET))
1313 return false;
1314
1315 templ.format = format;
1316 templ.u.tex.first_layer = first_layer;
1317 templ.u.tex.last_layer = last_layer;
1318 templ.u.tex.first_level = base_level;
1319 templ.u.tex.last_level = last_level;
1320
1321 psv = pipe->create_sampler_view(pipe, pt, &templ);
1322 if (psv == NULL)
1323 return false;
1324
1325 sv = svga_pipe_sampler_view(psv);
1326 ret = svga_validate_pipe_sampler_view(svga, sv);
1327 if (ret != PIPE_OK) {
1328 svga_context_flush(svga, NULL);
1329 ret = svga_validate_pipe_sampler_view(svga, sv);
1330 assert(ret == PIPE_OK);
1331 }
1332
1333 ret = SVGA3D_vgpu10_GenMips(svga->swc, sv->id, tex->handle);
1334 if (ret != PIPE_OK) {
1335 svga_context_flush(svga, NULL);
1336 ret = SVGA3D_vgpu10_GenMips(svga->swc, sv->id, tex->handle);
1337 }
1338 pipe_sampler_view_reference(&psv, NULL);
1339
1340 svga->hud.num_generate_mipmap++;
1341
1342 return true;
1343 }
1344
1345
1346 /* texture upload buffer default size in bytes */
1347 #define TEX_UPLOAD_DEFAULT_SIZE (1024 * 1024)
1348
1349 /**
1350 * Create a texture upload buffer
1351 */
1352 boolean
1353 svga_texture_transfer_map_upload_create(struct svga_context *svga)
1354 {
1355 svga->tex_upload = u_upload_create(&svga->pipe, TEX_UPLOAD_DEFAULT_SIZE,
1356 PIPE_BIND_CUSTOM, PIPE_USAGE_STAGING, 0);
1357 if (svga->tex_upload)
1358 u_upload_disable_persistent(svga->tex_upload);
1359
1360 return svga->tex_upload != NULL;
1361 }
1362
1363
1364 /**
1365 * Destroy the texture upload buffer
1366 */
1367 void
1368 svga_texture_transfer_map_upload_destroy(struct svga_context *svga)
1369 {
1370 u_upload_destroy(svga->tex_upload);
1371 }
1372
1373
1374 /**
1375 * Returns true if this transfer map request can use the upload buffer.
1376 */
1377 boolean
1378 svga_texture_transfer_map_can_upload(const struct svga_screen *svgascreen,
1379 const struct pipe_resource *texture)
1380 {
1381 if (svgascreen->sws->have_transfer_from_buffer_cmd == FALSE)
1382 return FALSE;
1383
1384 /* TransferFromBuffer command is not well supported with multi-samples surface */
1385 if (texture->nr_samples > 1)
1386 return FALSE;
1387
1388 if (util_format_is_compressed(texture->format)) {
1389 /* XXX Need to take a closer look to see why texture upload
1390 * with 3D texture with compressed format fails
1391 */
1392 if (texture->target == PIPE_TEXTURE_3D)
1393 return FALSE;
1394 }
1395 else if (texture->format == PIPE_FORMAT_R9G9B9E5_FLOAT) {
1396 return FALSE;
1397 }
1398
1399 return TRUE;
1400 }
1401
1402
1403 /**
1404 * Use upload buffer for the transfer map request.
1405 */
1406 void *
1407 svga_texture_transfer_map_upload(struct svga_context *svga,
1408 struct svga_transfer *st)
1409 {
1410 struct pipe_resource *texture = st->base.resource;
1411 struct pipe_resource *tex_buffer = NULL;
1412 void *tex_map;
1413 unsigned nblocksx, nblocksy;
1414 unsigned offset;
1415 unsigned upload_size;
1416
1417 assert(svga->tex_upload);
1418
1419 st->upload.box.x = st->base.box.x;
1420 st->upload.box.y = st->base.box.y;
1421 st->upload.box.z = st->base.box.z;
1422 st->upload.box.w = st->base.box.width;
1423 st->upload.box.h = st->base.box.height;
1424 st->upload.box.d = st->base.box.depth;
1425 st->upload.nlayers = 1;
1426
1427 switch (texture->target) {
1428 case PIPE_TEXTURE_CUBE:
1429 st->upload.box.z = 0;
1430 break;
1431 case PIPE_TEXTURE_2D_ARRAY:
1432 case PIPE_TEXTURE_CUBE_ARRAY:
1433 st->upload.nlayers = st->base.box.depth;
1434 st->upload.box.z = 0;
1435 st->upload.box.d = 1;
1436 break;
1437 case PIPE_TEXTURE_1D_ARRAY:
1438 st->upload.nlayers = st->base.box.depth;
1439 st->upload.box.y = st->upload.box.z = 0;
1440 st->upload.box.d = 1;
1441 break;
1442 default:
1443 break;
1444 }
1445
1446 nblocksx = util_format_get_nblocksx(texture->format, st->base.box.width);
1447 nblocksy = util_format_get_nblocksy(texture->format, st->base.box.height);
1448
1449 st->base.stride = nblocksx * util_format_get_blocksize(texture->format);
1450 st->base.layer_stride = st->base.stride * nblocksy;
1451
1452 /* In order to use the TransferFromBuffer command to update the
1453 * texture content from the buffer, the layer stride for a multi-layers
1454 * surface needs to be in multiples of 16 bytes.
1455 */
1456 if (st->upload.nlayers > 1 && st->base.layer_stride & 15)
1457 return NULL;
1458
1459 upload_size = st->base.layer_stride * st->base.box.depth;
1460 upload_size = align(upload_size, 16);
1461
1462 #ifdef DEBUG
1463 if (util_format_is_compressed(texture->format)) {
1464 struct svga_texture *tex = svga_texture(texture);
1465 unsigned blockw, blockh, bytesPerBlock;
1466
1467 svga_format_size(tex->key.format, &blockw, &blockh, &bytesPerBlock);
1468
1469 /* dest box must start on block boundary */
1470 assert((st->base.box.x % blockw) == 0);
1471 assert((st->base.box.y % blockh) == 0);
1472 }
1473 #endif
1474
1475 /* If the upload size exceeds the default buffer size, the
1476 * upload buffer manager code will try to allocate a new buffer
1477 * with the new buffer size.
1478 */
1479 u_upload_alloc(svga->tex_upload, 0, upload_size, 16,
1480 &offset, &tex_buffer, &tex_map);
1481
1482 if (!tex_map) {
1483 return NULL;
1484 }
1485
1486 st->upload.buf = tex_buffer;
1487 st->upload.map = tex_map;
1488 st->upload.offset = offset;
1489
1490 return tex_map;
1491 }
1492
1493
1494 /**
1495 * Unmap upload map transfer request
1496 */
1497 void
1498 svga_texture_transfer_unmap_upload(struct svga_context *svga,
1499 struct svga_transfer *st)
1500 {
1501 struct svga_winsys_surface *srcsurf;
1502 struct svga_winsys_surface *dstsurf;
1503 struct pipe_resource *texture = st->base.resource;
1504 struct svga_texture *tex = svga_texture(texture);
1505 enum pipe_error ret;
1506 unsigned subResource;
1507 unsigned numMipLevels;
1508 unsigned i, layer;
1509 unsigned offset = st->upload.offset;
1510
1511 assert(svga->tex_upload);
1512 assert(st->upload.buf);
1513
1514 /* unmap the texture upload buffer */
1515 u_upload_unmap(svga->tex_upload);
1516
1517 srcsurf = svga_buffer_handle(svga, st->upload.buf, 0);
1518 dstsurf = svga_texture(texture)->handle;
1519 assert(dstsurf);
1520
1521 numMipLevels = texture->last_level + 1;
1522
1523 for (i = 0, layer = st->slice; i < st->upload.nlayers; i++, layer++) {
1524 subResource = layer * numMipLevels + st->base.level;
1525
1526 /* send a transferFromBuffer command to update the host texture surface */
1527 assert((offset & 15) == 0);
1528
1529 ret = SVGA3D_vgpu10_TransferFromBuffer(svga->swc, srcsurf,
1530 offset,
1531 st->base.stride,
1532 st->base.layer_stride,
1533 dstsurf, subResource,
1534 &st->upload.box);
1535 if (ret != PIPE_OK) {
1536 svga_context_flush(svga, NULL);
1537 ret = SVGA3D_vgpu10_TransferFromBuffer(svga->swc, srcsurf,
1538 offset,
1539 st->base.stride,
1540 st->base.layer_stride,
1541 dstsurf, subResource,
1542 &st->upload.box);
1543 assert(ret == PIPE_OK);
1544 }
1545 offset += st->base.layer_stride;
1546
1547 /* Set rendered-to flag */
1548 svga_set_texture_rendered_to(tex, layer, st->base.level);
1549 }
1550
1551 pipe_resource_reference(&st->upload.buf, NULL);
1552 }
1553
1554 /**
1555 * Does the device format backing this surface have an
1556 * alpha channel?
1557 *
1558 * \param texture[in] The texture whose format we're querying
1559 * \return TRUE if the format has an alpha channel, FALSE otherwise
1560 *
1561 * For locally created textures, the device (svga) format is typically
1562 * identical to svga_format(texture->format), and we can use the gallium
1563 * format tests to determine whether the device format has an alpha channel
1564 * or not. However, for textures backed by imported svga surfaces that is
1565 * not always true, and we have to look at the SVGA3D utilities.
1566 */
1567 boolean
1568 svga_texture_device_format_has_alpha(struct pipe_resource *texture)
1569 {
1570 /* the svga_texture() call below is invalid for PIPE_BUFFER resources */
1571 assert(texture->target != PIPE_BUFFER);
1572
1573 enum svga3d_block_desc block_desc =
1574 svga3dsurface_get_desc(svga_texture(texture)->key.format)->block_desc;
1575
1576 return !!(block_desc & SVGA3DBLOCKDESC_ALPHA);
1577 }