b61f85955a2424d766f71907cd49298f51d7a7cc
[mesa.git] / src / gallium / drivers / svga / svga_resource_texture.c
1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 #include "svga_cmd.h"
27
28 #include "pipe/p_state.h"
29 #include "pipe/p_defines.h"
30 #include "util/u_inlines.h"
31 #include "os/os_thread.h"
32 #include "util/u_format.h"
33 #include "util/u_math.h"
34 #include "util/u_memory.h"
35
36 #include "svga_screen.h"
37 #include "svga_context.h"
38 #include "svga_resource_texture.h"
39 #include "svga_resource_buffer.h"
40 #include "svga_sampler_view.h"
41 #include "svga_winsys.h"
42 #include "svga_debug.h"
43
44
45 /* XXX: This isn't a real hardware flag, but just a hack for kernel to
46 * know about primary surfaces. Find a better way to accomplish this.
47 */
48 #define SVGA3D_SURFACE_HINT_SCANOUT (1 << 9)
49
50
51 /*
52 * Helper function and arrays
53 */
54
55 SVGA3dSurfaceFormat
56 svga_translate_format(enum pipe_format format)
57 {
58 switch(format) {
59
60 case PIPE_FORMAT_B8G8R8A8_UNORM:
61 return SVGA3D_A8R8G8B8;
62 case PIPE_FORMAT_B8G8R8X8_UNORM:
63 return SVGA3D_X8R8G8B8;
64
65 /* Required for GL2.1:
66 */
67 case PIPE_FORMAT_B8G8R8A8_SRGB:
68 return SVGA3D_A8R8G8B8;
69
70 case PIPE_FORMAT_B5G6R5_UNORM:
71 return SVGA3D_R5G6B5;
72 case PIPE_FORMAT_B5G5R5A1_UNORM:
73 return SVGA3D_A1R5G5B5;
74 case PIPE_FORMAT_B4G4R4A4_UNORM:
75 return SVGA3D_A4R4G4B4;
76
77
78 /* XXX: Doesn't seem to work properly.
79 case PIPE_FORMAT_Z32_UNORM:
80 return SVGA3D_Z_D32;
81 */
82 case PIPE_FORMAT_Z16_UNORM:
83 return SVGA3D_Z_D16;
84 case PIPE_FORMAT_S8_USCALED_Z24_UNORM:
85 return SVGA3D_Z_D24S8;
86 case PIPE_FORMAT_X8Z24_UNORM:
87 return SVGA3D_Z_D24X8;
88
89 case PIPE_FORMAT_A8_UNORM:
90 return SVGA3D_ALPHA8;
91 case PIPE_FORMAT_L8_UNORM:
92 return SVGA3D_LUMINANCE8;
93
94 case PIPE_FORMAT_DXT1_RGB:
95 case PIPE_FORMAT_DXT1_RGBA:
96 return SVGA3D_DXT1;
97 case PIPE_FORMAT_DXT3_RGBA:
98 return SVGA3D_DXT3;
99 case PIPE_FORMAT_DXT5_RGBA:
100 return SVGA3D_DXT5;
101
102 default:
103 return SVGA3D_FORMAT_INVALID;
104 }
105 }
106
107
108 SVGA3dSurfaceFormat
109 svga_translate_format_render(enum pipe_format format)
110 {
111 switch(format) {
112 case PIPE_FORMAT_B8G8R8A8_UNORM:
113 case PIPE_FORMAT_B8G8R8X8_UNORM:
114 case PIPE_FORMAT_B5G5R5A1_UNORM:
115 case PIPE_FORMAT_B4G4R4A4_UNORM:
116 case PIPE_FORMAT_B5G6R5_UNORM:
117 case PIPE_FORMAT_S8_USCALED_Z24_UNORM:
118 case PIPE_FORMAT_X8Z24_UNORM:
119 case PIPE_FORMAT_Z32_UNORM:
120 case PIPE_FORMAT_Z16_UNORM:
121 case PIPE_FORMAT_L8_UNORM:
122 return svga_translate_format(format);
123
124 default:
125 return SVGA3D_FORMAT_INVALID;
126 }
127 }
128
129
130 static INLINE void
131 svga_transfer_dma_band(struct svga_context *svga,
132 struct svga_transfer *st,
133 SVGA3dTransferType transfer,
134 unsigned y, unsigned h, unsigned srcy,
135 SVGA3dSurfaceDMAFlags flags)
136 {
137 struct svga_texture *texture = svga_texture(st->base.resource);
138 SVGA3dCopyBox box;
139 enum pipe_error ret;
140
141 box.x = st->base.box.x;
142 box.y = y;
143 box.z = st->base.box.z;
144 box.w = st->base.box.width;
145 box.h = h;
146 box.d = 1;
147 box.srcx = 0;
148 box.srcy = srcy;
149 box.srcz = 0;
150
151 if (st->base.resource->target == PIPE_TEXTURE_CUBE) {
152 st->face = st->base.box.z;
153 box.z = 0;
154 }
155 else
156 st->face = 0;
157
158 SVGA_DBG(DEBUG_DMA, "dma %s sid %p, face %u, (%u, %u, %u) - (%u, %u, %u), %ubpp\n",
159 transfer == SVGA3D_WRITE_HOST_VRAM ? "to" : "from",
160 texture->handle,
161 st->face,
162 st->base.box.x,
163 y,
164 box.z,
165 st->base.box.x + st->base.box.width,
166 y + h,
167 box.z + 1,
168 util_format_get_blocksize(texture->b.b.format) * 8 /
169 (util_format_get_blockwidth(texture->b.b.format)*util_format_get_blockheight(texture->b.b.format)));
170
171 ret = SVGA3D_SurfaceDMA(svga->swc, st, transfer, &box, 1, flags);
172 if(ret != PIPE_OK) {
173 svga_context_flush(svga, NULL);
174 ret = SVGA3D_SurfaceDMA(svga->swc, st, transfer, &box, 1, flags);
175 assert(ret == PIPE_OK);
176 }
177 }
178
179
180 static INLINE void
181 svga_transfer_dma(struct svga_context *svga,
182 struct svga_transfer *st,
183 SVGA3dTransferType transfer,
184 SVGA3dSurfaceDMAFlags flags)
185 {
186 struct svga_texture *texture = svga_texture(st->base.resource);
187 struct svga_screen *screen = svga_screen(texture->b.b.screen);
188 struct svga_winsys_screen *sws = screen->sws;
189 struct pipe_fence_handle *fence = NULL;
190
191 if (transfer == SVGA3D_READ_HOST_VRAM) {
192 SVGA_DBG(DEBUG_PERF, "%s: readback transfer\n", __FUNCTION__);
193 }
194
195 /* Ensure any pending operations on host surfaces are queued on the command
196 * buffer first.
197 */
198 svga_surfaces_flush( svga );
199
200 if(!st->swbuf) {
201 /* Do the DMA transfer in a single go */
202
203 svga_transfer_dma_band(svga, st, transfer,
204 st->base.box.y, st->base.box.height, 0,
205 flags);
206
207 if(transfer == SVGA3D_READ_HOST_VRAM) {
208 svga_context_flush(svga, &fence);
209 sws->fence_finish(sws, fence, 0);
210 sws->fence_reference(sws, &fence, NULL);
211 }
212 }
213 else {
214 unsigned y, h, srcy;
215 unsigned blockheight = util_format_get_blockheight(st->base.resource->format);
216 h = st->hw_nblocksy * blockheight;
217 srcy = 0;
218 for(y = 0; y < st->base.box.height; y += h) {
219 unsigned offset, length;
220 void *hw, *sw;
221
222 if (y + h > st->base.box.height)
223 h = st->base.box.height - y;
224
225 /* Transfer band must be aligned to pixel block boundaries */
226 assert(y % blockheight == 0);
227 assert(h % blockheight == 0);
228
229 offset = y * st->base.stride / blockheight;
230 length = h * st->base.stride / blockheight;
231
232 sw = (uint8_t *)st->swbuf + offset;
233
234 if(transfer == SVGA3D_WRITE_HOST_VRAM) {
235 /* Wait for the previous DMAs to complete */
236 /* TODO: keep one DMA (at half the size) in the background */
237 if(y) {
238 svga_context_flush(svga, &fence);
239 sws->fence_finish(sws, fence, 0);
240 sws->fence_reference(sws, &fence, NULL);
241 }
242
243 hw = sws->buffer_map(sws, st->hwbuf, PIPE_TRANSFER_WRITE);
244 assert(hw);
245 if(hw) {
246 memcpy(hw, sw, length);
247 sws->buffer_unmap(sws, st->hwbuf);
248 }
249 }
250
251 svga_transfer_dma_band(svga, st, transfer, y, h, srcy, flags);
252
253 /*
254 * Prevent the texture contents to be discarded on the next band
255 * upload.
256 */
257
258 flags.discard = FALSE;
259
260 if(transfer == SVGA3D_READ_HOST_VRAM) {
261 svga_context_flush(svga, &fence);
262 sws->fence_finish(sws, fence, 0);
263
264 hw = sws->buffer_map(sws, st->hwbuf, PIPE_TRANSFER_READ);
265 assert(hw);
266 if(hw) {
267 memcpy(sw, hw, length);
268 sws->buffer_unmap(sws, st->hwbuf);
269 }
270 }
271 }
272 }
273 }
274
275
276
277
278
279 static boolean
280 svga_texture_get_handle(struct pipe_screen *screen,
281 struct pipe_resource *texture,
282 struct winsys_handle *whandle)
283 {
284 struct svga_winsys_screen *sws = svga_winsys_screen(texture->screen);
285 unsigned stride;
286
287 assert(svga_texture(texture)->key.cachable == 0);
288 svga_texture(texture)->key.cachable = 0;
289 stride = util_format_get_nblocksx(texture->format, texture->width0) *
290 util_format_get_blocksize(texture->format);
291 return sws->surface_get_handle(sws, svga_texture(texture)->handle, stride, whandle);
292 }
293
294
295 static void
296 svga_texture_destroy(struct pipe_screen *screen,
297 struct pipe_resource *pt)
298 {
299 struct svga_screen *ss = svga_screen(screen);
300 struct svga_texture *tex = (struct svga_texture *)pt;
301
302 ss->texture_timestamp++;
303
304 svga_sampler_view_reference(&tex->cached_view, NULL);
305
306 /*
307 DBG("%s deleting %p\n", __FUNCTION__, (void *) tex);
308 */
309 SVGA_DBG(DEBUG_DMA, "unref sid %p (texture)\n", tex->handle);
310 svga_screen_surface_destroy(ss, &tex->key, &tex->handle);
311
312 FREE(tex);
313 }
314
315
316
317
318
319
320
321 /* XXX: Still implementing this as if it was a screen function, but
322 * can now modify it to queue transfers on the context.
323 */
324 static struct pipe_transfer *
325 svga_texture_get_transfer(struct pipe_context *pipe,
326 struct pipe_resource *texture,
327 unsigned level,
328 unsigned usage,
329 const struct pipe_box *box)
330 {
331 struct svga_context *svga = svga_context(pipe);
332 struct svga_screen *ss = svga_screen(pipe->screen);
333 struct svga_winsys_screen *sws = ss->sws;
334 struct svga_transfer *st;
335 unsigned nblocksx = util_format_get_nblocksx(texture->format, box->width);
336 unsigned nblocksy = util_format_get_nblocksy(texture->format, box->height);
337
338 /* We can't map texture storage directly */
339 if (usage & PIPE_TRANSFER_MAP_DIRECTLY)
340 return NULL;
341
342 assert(box->depth == 1);
343 st = CALLOC_STRUCT(svga_transfer);
344 if (!st)
345 return NULL;
346
347 pipe_resource_reference(&st->base.resource, texture);
348 st->base.level = level;
349 st->base.usage = usage;
350 st->base.box = *box;
351 st->base.stride = nblocksx*util_format_get_blocksize(texture->format);
352 st->base.layer_stride = 0;
353
354 st->hw_nblocksy = nblocksy;
355
356 st->hwbuf = svga_winsys_buffer_create(svga,
357 1,
358 0,
359 st->hw_nblocksy*st->base.stride);
360 while(!st->hwbuf && (st->hw_nblocksy /= 2)) {
361 st->hwbuf = svga_winsys_buffer_create(svga,
362 1,
363 0,
364 st->hw_nblocksy*st->base.stride);
365 }
366
367 if(!st->hwbuf)
368 goto no_hwbuf;
369
370 if(st->hw_nblocksy < nblocksy) {
371 /* We couldn't allocate a hardware buffer big enough for the transfer,
372 * so allocate regular malloc memory instead */
373 if (0) {
374 debug_printf("%s: failed to allocate %u KB of DMA, "
375 "splitting into %u x %u KB DMA transfers\n",
376 __FUNCTION__,
377 (nblocksy*st->base.stride + 1023)/1024,
378 (nblocksy + st->hw_nblocksy - 1)/st->hw_nblocksy,
379 (st->hw_nblocksy*st->base.stride + 1023)/1024);
380 }
381
382 st->swbuf = MALLOC(nblocksy*st->base.stride);
383 if(!st->swbuf)
384 goto no_swbuf;
385 }
386
387 if (usage & PIPE_TRANSFER_READ) {
388 SVGA3dSurfaceDMAFlags flags;
389 memset(&flags, 0, sizeof flags);
390 svga_transfer_dma(svga, st, SVGA3D_READ_HOST_VRAM, flags);
391 }
392
393 return &st->base;
394
395 no_swbuf:
396 sws->buffer_destroy(sws, st->hwbuf);
397 no_hwbuf:
398 FREE(st);
399 return NULL;
400 }
401
402
403 /* XXX: Still implementing this as if it was a screen function, but
404 * can now modify it to queue transfers on the context.
405 */
406 static void *
407 svga_texture_transfer_map( struct pipe_context *pipe,
408 struct pipe_transfer *transfer )
409 {
410 struct svga_screen *ss = svga_screen(pipe->screen);
411 struct svga_winsys_screen *sws = ss->sws;
412 struct svga_transfer *st = svga_transfer(transfer);
413
414 if(st->swbuf)
415 return st->swbuf;
416 else
417 /* The wait for read transfers already happened when svga_transfer_dma
418 * was called. */
419 return sws->buffer_map(sws, st->hwbuf, transfer->usage);
420 }
421
422
423 /* XXX: Still implementing this as if it was a screen function, but
424 * can now modify it to queue transfers on the context.
425 */
426 static void
427 svga_texture_transfer_unmap(struct pipe_context *pipe,
428 struct pipe_transfer *transfer)
429 {
430 struct svga_screen *ss = svga_screen(pipe->screen);
431 struct svga_winsys_screen *sws = ss->sws;
432 struct svga_transfer *st = svga_transfer(transfer);
433
434 if(!st->swbuf)
435 sws->buffer_unmap(sws, st->hwbuf);
436 }
437
438
439 static void
440 svga_texture_transfer_destroy(struct pipe_context *pipe,
441 struct pipe_transfer *transfer)
442 {
443 struct svga_context *svga = svga_context(pipe);
444 struct svga_texture *tex = svga_texture(transfer->resource);
445 struct svga_screen *ss = svga_screen(pipe->screen);
446 struct svga_winsys_screen *sws = ss->sws;
447 struct svga_transfer *st = svga_transfer(transfer);
448
449 if (st->base.usage & PIPE_TRANSFER_WRITE) {
450 SVGA3dSurfaceDMAFlags flags;
451
452 memset(&flags, 0, sizeof flags);
453 if (transfer->usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
454 flags.discard = TRUE;
455 }
456 if (transfer->usage & PIPE_TRANSFER_UNSYNCHRONIZED) {
457 flags.unsynchronized = TRUE;
458 }
459
460 svga_transfer_dma(svga, st, SVGA3D_WRITE_HOST_VRAM, flags);
461 ss->texture_timestamp++;
462 tex->view_age[transfer->level] = ++(tex->age);
463 if (transfer->resource->target == PIPE_TEXTURE_CUBE)
464 tex->defined[transfer->box.z][transfer->level] = TRUE;
465 else
466 tex->defined[0][transfer->level] = TRUE;
467 }
468
469 pipe_resource_reference(&st->base.resource, NULL);
470 FREE(st->swbuf);
471 sws->buffer_destroy(sws, st->hwbuf);
472 FREE(st);
473 }
474
475
476
477
478
479 struct u_resource_vtbl svga_texture_vtbl =
480 {
481 svga_texture_get_handle, /* get_handle */
482 svga_texture_destroy, /* resource_destroy */
483 svga_texture_get_transfer, /* get_transfer */
484 svga_texture_transfer_destroy, /* transfer_destroy */
485 svga_texture_transfer_map, /* transfer_map */
486 u_default_transfer_flush_region, /* transfer_flush_region */
487 svga_texture_transfer_unmap, /* transfer_unmap */
488 u_default_transfer_inline_write /* transfer_inline_write */
489 };
490
491
492
493
494 struct pipe_resource *
495 svga_texture_create(struct pipe_screen *screen,
496 const struct pipe_resource *template)
497 {
498 struct svga_screen *svgascreen = svga_screen(screen);
499 struct svga_texture *tex = CALLOC_STRUCT(svga_texture);
500
501 if (!tex)
502 goto error1;
503
504 tex->b.b = *template;
505 tex->b.vtbl = &svga_texture_vtbl;
506 pipe_reference_init(&tex->b.b.reference, 1);
507 tex->b.b.screen = screen;
508
509 assert(template->last_level < SVGA_MAX_TEXTURE_LEVELS);
510 if(template->last_level >= SVGA_MAX_TEXTURE_LEVELS)
511 goto error2;
512
513 tex->key.flags = 0;
514 tex->key.size.width = template->width0;
515 tex->key.size.height = template->height0;
516 tex->key.size.depth = template->depth0;
517
518 if(template->target == PIPE_TEXTURE_CUBE) {
519 tex->key.flags |= SVGA3D_SURFACE_CUBEMAP;
520 tex->key.numFaces = 6;
521 }
522 else {
523 tex->key.numFaces = 1;
524 }
525
526 /* XXX: Disabled for now */
527 tex->key.cachable = 0;
528
529 if (template->bind & PIPE_BIND_SAMPLER_VIEW)
530 tex->key.flags |= SVGA3D_SURFACE_HINT_TEXTURE;
531
532 if (template->bind & PIPE_BIND_DISPLAY_TARGET) {
533 tex->key.cachable = 0;
534 }
535
536 if (template->bind & PIPE_BIND_SHARED) {
537 tex->key.cachable = 0;
538 }
539
540 if (template->bind & PIPE_BIND_SCANOUT) {
541 tex->key.flags |= SVGA3D_SURFACE_HINT_SCANOUT;
542 tex->key.cachable = 0;
543 }
544
545 /*
546 * XXX: Never pass the SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot
547 * know beforehand whether a texture will be used as a rendertarget or not
548 * and it always requests PIPE_BIND_RENDER_TARGET, therefore
549 * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose.
550 */
551 #if 0
552 if((template->bind & PIPE_BIND_RENDER_TARGET) &&
553 !util_format_is_s3tc(template->format))
554 tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET;
555 #endif
556
557 if(template->bind & PIPE_BIND_DEPTH_STENCIL)
558 tex->key.flags |= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
559
560 tex->key.numMipLevels = template->last_level + 1;
561
562 tex->key.format = svga_translate_format(template->format);
563 if(tex->key.format == SVGA3D_FORMAT_INVALID)
564 goto error2;
565
566 SVGA_DBG(DEBUG_DMA, "surface_create for texture\n", tex->handle);
567 tex->handle = svga_screen_surface_create(svgascreen, &tex->key);
568 if (tex->handle)
569 SVGA_DBG(DEBUG_DMA, " --> got sid %p (texture)\n", tex->handle);
570
571 debug_reference(&tex->b.b.reference,
572 (debug_reference_descriptor)debug_describe_resource, 0);
573
574 return &tex->b.b;
575
576 error2:
577 FREE(tex);
578 error1:
579 return NULL;
580 }
581
582
583
584
585 struct pipe_resource *
586 svga_texture_from_handle(struct pipe_screen *screen,
587 const struct pipe_resource *template,
588 struct winsys_handle *whandle)
589 {
590 struct svga_winsys_screen *sws = svga_winsys_screen(screen);
591 struct svga_winsys_surface *srf;
592 struct svga_texture *tex;
593 enum SVGA3dSurfaceFormat format = 0;
594 assert(screen);
595
596 /* Only supports one type */
597 if ((template->target != PIPE_TEXTURE_2D &&
598 template->target != PIPE_TEXTURE_RECT) ||
599 template->last_level != 0 ||
600 template->depth0 != 1) {
601 return NULL;
602 }
603
604 srf = sws->surface_from_handle(sws, whandle, &format);
605
606 if (!srf)
607 return NULL;
608
609 if (svga_translate_format(template->format) != format) {
610 unsigned f1 = svga_translate_format(template->format);
611 unsigned f2 = format;
612
613 /* It's okay for XRGB and ARGB or depth with/out stencil to get mixed up */
614 if ( !( (f1 == SVGA3D_X8R8G8B8 && f2 == SVGA3D_A8R8G8B8) ||
615 (f1 == SVGA3D_A8R8G8B8 && f2 == SVGA3D_X8R8G8B8) ||
616 (f1 == SVGA3D_Z_D24X8 && f2 == SVGA3D_Z_D24S8) ) ) {
617 debug_printf("%s wrong format %u != %u\n", __FUNCTION__, f1, f2);
618 return NULL;
619 }
620 }
621
622 tex = CALLOC_STRUCT(svga_texture);
623 if (!tex)
624 return NULL;
625
626 tex->b.b = *template;
627 tex->b.vtbl = &svga_texture_vtbl;
628 pipe_reference_init(&tex->b.b.reference, 1);
629 tex->b.b.screen = screen;
630
631 if (format == SVGA3D_X8R8G8B8)
632 tex->b.b.format = PIPE_FORMAT_B8G8R8X8_UNORM;
633 else if (format == SVGA3D_A8R8G8B8)
634 tex->b.b.format = PIPE_FORMAT_B8G8R8A8_UNORM;
635 else {
636 /* ?? */
637 }
638
639 SVGA_DBG(DEBUG_DMA, "wrap surface sid %p\n", srf);
640
641 tex->key.cachable = 0;
642 tex->handle = srf;
643
644 return &tex->b.b;
645 }
646