src/gallium/drivers/svga/svga_resource_texture.c

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #include "svga3d_reg.h"
  27 #include "svga3d_surfacedefs.h"
  28
  29 #include "pipe/p_state.h"
  30 #include "pipe/p_defines.h"
  31 #include "os/os_thread.h"
  32 #include "util/u_format.h"
  33 #include "util/u_inlines.h"
  34 #include "util/u_math.h"
  35 #include "util/u_memory.h"
  36 #include "util/u_resource.h"
  37 #include "util/u_upload_mgr.h"
  38
  39 #include "svga_cmd.h"
  40 #include "svga_format.h"
  41 #include "svga_screen.h"
  42 #include "svga_context.h"
  43 #include "svga_resource_texture.h"
  44 #include "svga_resource_buffer.h"
  45 #include "svga_sampler_view.h"
  46 #include "svga_winsys.h"
  47 #include "svga_debug.h"
  48
  49
  50 static void
  51 svga_transfer_dma_band(struct svga_context *svga,
  52                        struct svga_transfer *st,
  53                        SVGA3dTransferType transfer,
  54                        unsigned x, unsigned y, unsigned z,
  55                        unsigned w, unsigned h, unsigned d,
  56                        unsigned srcx, unsigned srcy, unsigned srcz,
  57                        SVGA3dSurfaceDMAFlags flags)
  58 {
  59    struct svga_texture *texture = svga_texture(st->base.resource);
  60    SVGA3dCopyBox box;
  61    enum pipe_error ret;
  62
  63    assert(!st->use_direct_map);
  64
  65    box.x = x;
  66    box.y = y;
  67    box.z = z;
  68    box.w = w;
  69    box.h = h;
  70    box.d = d;
  71    box.srcx = srcx;
  72    box.srcy = srcy;
  73    box.srcz = srcz;
  74
  75    SVGA_DBG(DEBUG_DMA, "dma %s sid %p, face %u, (%u, %u, %u) - "
  76             "(%u, %u, %u), %ubpp\n",
  77             transfer == SVGA3D_WRITE_HOST_VRAM ? "to" : "from",
  78             texture->handle,
  79             st->slice,
  80             x,
  81             y,
  82             z,
  83             x + w,
  84             y + h,
  85             z + 1,
  86             util_format_get_blocksize(texture->b.b.format) * 8 /
  87             (util_format_get_blockwidth(texture->b.b.format)
  88              * util_format_get_blockheight(texture->b.b.format)));
  89
  90    ret = SVGA3D_SurfaceDMA(svga->swc, st, transfer, &box, 1, flags);
  91    if (ret != PIPE_OK) {
  92       svga_context_flush(svga, NULL);
  93       ret = SVGA3D_SurfaceDMA(svga->swc, st, transfer, &box, 1, flags);
  94       assert(ret == PIPE_OK);
  95    }
  96 }
  97
  98
  99 static void
 100 svga_transfer_dma(struct svga_context *svga,
 101                   struct svga_transfer *st,
 102                   SVGA3dTransferType transfer,
 103                   SVGA3dSurfaceDMAFlags flags)
 104 {
 105    struct svga_texture *texture = svga_texture(st->base.resource);
 106    struct svga_screen *screen = svga_screen(texture->b.b.screen);
 107    struct svga_winsys_screen *sws = screen->sws;
 108    struct pipe_fence_handle *fence = NULL;
 109
 110    assert(!st->use_direct_map);
 111
 112    if (transfer == SVGA3D_READ_HOST_VRAM) {
 113       SVGA_DBG(DEBUG_PERF, "%s: readback transfer\n", __FUNCTION__);
 114    }
 115
 116    /* Ensure any pending operations on host surfaces are queued on the command
 117     * buffer first.
 118     */
 119    svga_surfaces_flush( svga );
 120
 121    if (!st->swbuf) {
 122       /* Do the DMA transfer in a single go */
 123       svga_transfer_dma_band(svga, st, transfer,
 124                              st->base.box.x, st->base.box.y, st->base.box.z,
 125                              st->base.box.width, st->base.box.height, st->base.box.depth,
 126                              0, 0, 0,
 127                              flags);
 128
 129       if (transfer == SVGA3D_READ_HOST_VRAM) {
 130          svga_context_flush(svga, &fence);
 131          sws->fence_finish(sws, fence, 0);
 132          sws->fence_reference(sws, &fence, NULL);
 133       }
 134    }
 135    else {
 136       int y, h, srcy;
 137       unsigned blockheight =
 138          util_format_get_blockheight(st->base.resource->format);
 139
 140       h = st->hw_nblocksy * blockheight;
 141       srcy = 0;
 142
 143       for (y = 0; y < st->base.box.height; y += h) {
 144          unsigned offset, length;
 145          void *hw, *sw;
 146
 147          if (y + h > st->base.box.height)
 148             h = st->base.box.height - y;
 149
 150          /* Transfer band must be aligned to pixel block boundaries */
 151          assert(y % blockheight == 0);
 152          assert(h % blockheight == 0);
 153
 154          offset = y * st->base.stride / blockheight;
 155          length = h * st->base.stride / blockheight;
 156
 157          sw = (uint8_t *) st->swbuf + offset;
 158
 159          if (transfer == SVGA3D_WRITE_HOST_VRAM) {
 160             unsigned usage = PIPE_TRANSFER_WRITE;
 161
 162             /* Wait for the previous DMAs to complete */
 163             /* TODO: keep one DMA (at half the size) in the background */
 164             if (y) {
 165                svga_context_flush(svga, NULL);
 166                usage |= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE;
 167             }
 168
 169             hw = sws->buffer_map(sws, st->hwbuf, usage);
 170             assert(hw);
 171             if (hw) {
 172                memcpy(hw, sw, length);
 173                sws->buffer_unmap(sws, st->hwbuf);
 174             }
 175          }
 176
 177          svga_transfer_dma_band(svga, st, transfer,
 178                                 st->base.box.x, y, st->base.box.z,
 179                                 st->base.box.width, h, st->base.box.depth,
 180                                 0, srcy, 0, flags);
 181
 182          /*
 183           * Prevent the texture contents to be discarded on the next band
 184           * upload.
 185           */
 186          flags.discard = FALSE;
 187
 188          if (transfer == SVGA3D_READ_HOST_VRAM) {
 189             svga_context_flush(svga, &fence);
 190             sws->fence_finish(sws, fence, 0);
 191
 192             hw = sws->buffer_map(sws, st->hwbuf, PIPE_TRANSFER_READ);
 193             assert(hw);
 194             if (hw) {
 195                memcpy(sw, hw, length);
 196                sws->buffer_unmap(sws, st->hwbuf);
 197             }
 198          }
 199       }
 200    }
 201 }
 202
 203
 204
 205 static boolean
 206 svga_texture_get_handle(struct pipe_screen *screen,
 207                         struct pipe_resource *texture,
 208                         struct winsys_handle *whandle)
 209 {
 210    struct svga_winsys_screen *sws = svga_winsys_screen(texture->screen);
 211    unsigned stride;
 212
 213    assert(svga_texture(texture)->key.cachable == 0);
 214    svga_texture(texture)->key.cachable = 0;
 215
 216    stride = util_format_get_nblocksx(texture->format, texture->width0) *
 217             util_format_get_blocksize(texture->format);
 218
 219    return sws->surface_get_handle(sws, svga_texture(texture)->handle,
 220                                   stride, whandle);
 221 }
 222
 223
 224 static void
 225 svga_texture_destroy(struct pipe_screen *screen,
 226                      struct pipe_resource *pt)
 227 {
 228    struct svga_screen *ss = svga_screen(screen);
 229    struct svga_texture *tex = svga_texture(pt);
 230
 231    ss->texture_timestamp++;
 232
 233    svga_sampler_view_reference(&tex->cached_view, NULL);
 234
 235    /*
 236      DBG("%s deleting %p\n", __FUNCTION__, (void *) tex);
 237    */
 238    SVGA_DBG(DEBUG_DMA, "unref sid %p (texture)\n", tex->handle);
 239    svga_screen_surface_destroy(ss, &tex->key, &tex->handle);
 240
 241    ss->hud.total_resource_bytes -= tex->size;
 242
 243    FREE(tex->defined);
 244    FREE(tex->rendered_to);
 245    FREE(tex->dirty);
 246    FREE(tex);
 247
 248    assert(ss->hud.num_resources > 0);
 249    if (ss->hud.num_resources > 0)
 250       ss->hud.num_resources--;
 251 }
 252
 253
 254 /**
 255  * Determine if we need to read back a texture image before mapping it.
 256  */
 257 static boolean
 258 need_tex_readback(struct pipe_transfer *transfer)
 259 {
 260    struct svga_texture *t = svga_texture(transfer->resource);
 261
 262    if (transfer->usage & PIPE_TRANSFER_READ)
 263       return TRUE;
 264
 265    if ((transfer->usage & PIPE_TRANSFER_WRITE) &&
 266        ((transfer->usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) == 0)) {
 267       unsigned face;
 268
 269       if (transfer->resource->target == PIPE_TEXTURE_CUBE) {
 270          assert(transfer->box.depth == 1);
 271          face = transfer->box.z;
 272       }
 273       else {
 274          face = 0;
 275       }
 276       if (svga_was_texture_rendered_to(t, face, transfer->level)) {
 277          return TRUE;
 278       }
 279    }
 280
 281    return FALSE;
 282 }
 283
 284
 285 static enum pipe_error
 286 readback_image_vgpu9(struct svga_context *svga,
 287                    struct svga_winsys_surface *surf,
 288                    unsigned slice,
 289                    unsigned level)
 290 {
 291    enum pipe_error ret;
 292
 293    ret = SVGA3D_ReadbackGBImage(svga->swc, surf, slice, level);
 294    if (ret != PIPE_OK) {
 295       svga_context_flush(svga, NULL);
 296       ret = SVGA3D_ReadbackGBImage(svga->swc, surf, slice, level);
 297    }
 298    return ret;
 299 }
 300
 301
 302 static enum pipe_error
 303 readback_image_vgpu10(struct svga_context *svga,
 304                     struct svga_winsys_surface *surf,
 305                     unsigned slice,
 306                     unsigned level,
 307                     unsigned numMipLevels)
 308 {
 309    enum pipe_error ret;
 310    unsigned subResource;
 311
 312    subResource = slice * numMipLevels + level;
 313    ret = SVGA3D_vgpu10_ReadbackSubResource(svga->swc, surf, subResource);
 314    if (ret != PIPE_OK) {
 315       svga_context_flush(svga, NULL);
 316       ret = SVGA3D_vgpu10_ReadbackSubResource(svga->swc, surf, subResource);
 317    }
 318    return ret;
 319 }
 320
 321
 322 /**
 323  * Use DMA for the transfer request
 324  */
 325 static void *
 326 svga_texture_transfer_map_dma(struct svga_context *svga,
 327                               struct svga_transfer *st)
 328 {
 329    struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws;
 330    struct pipe_resource *texture = st->base.resource;
 331    unsigned nblocksx, nblocksy;
 332    unsigned d;
 333    unsigned usage = st->base.usage;
 334
 335    /* we'll put the data into a tightly packed buffer */
 336    nblocksx = util_format_get_nblocksx(texture->format, st->base.box.width);
 337    nblocksy = util_format_get_nblocksy(texture->format, st->base.box.height);
 338    d = st->base.box.depth;
 339
 340    st->base.stride = nblocksx*util_format_get_blocksize(texture->format);
 341    st->base.layer_stride = st->base.stride * nblocksy;
 342    st->hw_nblocksy = nblocksy;
 343
 344    st->hwbuf = svga_winsys_buffer_create(svga, 1, 0,
 345                                          st->hw_nblocksy * st->base.stride * d);
 346
 347    while (!st->hwbuf && (st->hw_nblocksy /= 2)) {
 348       st->hwbuf =
 349          svga_winsys_buffer_create(svga, 1, 0,
 350                                    st->hw_nblocksy * st->base.stride * d);
 351    }
 352
 353    if (!st->hwbuf)
 354       return NULL;
 355
 356    if (st->hw_nblocksy < nblocksy) {
 357       /* We couldn't allocate a hardware buffer big enough for the transfer,
 358        * so allocate regular malloc memory instead
 359        */
 360       if (0) {
 361          debug_printf("%s: failed to allocate %u KB of DMA, "
 362                       "splitting into %u x %u KB DMA transfers\n",
 363                       __FUNCTION__,
 364                       (nblocksy * st->base.stride + 1023) / 1024,
 365                       (nblocksy + st->hw_nblocksy - 1) / st->hw_nblocksy,
 366                       (st->hw_nblocksy * st->base.stride + 1023) / 1024);
 367       }
 368
 369       st->swbuf = MALLOC(nblocksy * st->base.stride * d);
 370       if (!st->swbuf) {
 371          sws->buffer_destroy(sws, st->hwbuf);
 372          return NULL;
 373       }
 374    }
 375
 376    if (usage & PIPE_TRANSFER_READ) {
 377       SVGA3dSurfaceDMAFlags flags;
 378       memset(&flags, 0, sizeof flags);
 379       svga_transfer_dma(svga, st, SVGA3D_READ_HOST_VRAM, flags);
 380    }
 381
 382    if (st->swbuf) {
 383       return st->swbuf;
 384    }
 385    else {
 386       return sws->buffer_map(sws, st->hwbuf, usage);
 387    }
 388 }
 389
 390
 391 /**
 392  * Use direct map for the transfer request
 393  */
 394 static void *
 395 svga_texture_transfer_map_direct(struct svga_context *svga,
 396                                  struct svga_transfer *st)
 397 {
 398    struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws;
 399    struct pipe_transfer *transfer = &st->base;
 400    struct pipe_resource *texture = transfer->resource;
 401    struct svga_texture *tex = svga_texture(texture);
 402    struct svga_winsys_surface *surf = tex->handle;
 403    unsigned level = st->base.level;
 404    unsigned w, h, nblocksx, nblocksy;
 405    unsigned usage = st->base.usage;
 406
 407    /* we'll directly access the guest-backed surface */
 408    w = u_minify(texture->width0, level);
 409    h = u_minify(texture->height0, level);
 410    nblocksx = util_format_get_nblocksx(texture->format, w);
 411    nblocksy = util_format_get_nblocksy(texture->format, h);
 412    st->hw_nblocksy = nblocksy;
 413    st->base.stride = nblocksx*util_format_get_blocksize(texture->format);
 414    st->base.layer_stride = st->base.stride * nblocksy;
 415
 416    if (need_tex_readback(transfer)) {
 417       enum pipe_error ret;
 418
 419       svga_surfaces_flush(svga);
 420
 421       if (svga_have_vgpu10(svga)) {
 422          ret = readback_image_vgpu10(svga, surf, st->slice, level,
 423                                      tex->b.b.last_level + 1);
 424       } else {
 425          ret = readback_image_vgpu9(svga, surf, st->slice, level);
 426       }
 427
 428       svga->hud.num_readbacks++;
 429       SVGA_STATS_COUNT_INC(sws, SVGA_STATS_COUNT_TEXREADBACK);
 430
 431       assert(ret == PIPE_OK);
 432       (void) ret;
 433
 434       svga_context_flush(svga, NULL);
 435
 436       /*
 437        * Note: if PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE were specified
 438        * we could potentially clear the flag for all faces/layers/mips.
 439        */
 440       svga_clear_texture_rendered_to(tex, st->slice, level);
 441    }
 442    else {
 443       assert(usage & PIPE_TRANSFER_WRITE);
 444       if ((usage & PIPE_TRANSFER_UNSYNCHRONIZED) == 0) {
 445          if (svga_is_texture_dirty(tex, st->slice, level)) {
 446             /*
 447              * do a surface flush if the subresource has been modified
 448              * in this command buffer.
 449              */
 450             svga_surfaces_flush(svga);
 451             if (!sws->surface_is_flushed(sws, surf)) {
 452                svga->hud.surface_write_flushes++;
 453                SVGA_STATS_COUNT_INC(sws, SVGA_STATS_COUNT_SURFACEWRITEFLUSH);
 454                svga_context_flush(svga, NULL);
 455             }
 456          }
 457       }
 458    }
 459
 460    /*
 461     * Begin mapping code
 462     */
 463    {
 464       SVGA3dSize baseLevelSize;
 465       uint8_t *map;
 466       boolean retry;
 467       unsigned offset, mip_width, mip_height;
 468
 469       map = svga->swc->surface_map(svga->swc, surf, usage, &retry);
 470       if (map == NULL && retry) {
 471          /*
 472           * At this point, the svga_surfaces_flush() should already have
 473           * called in svga_texture_get_transfer().
 474           */
 475          svga->hud.surface_write_flushes++;
 476          svga_context_flush(svga, NULL);
 477          map = svga->swc->surface_map(svga->swc, surf, usage, &retry);
 478       }
 479
 480       /*
 481        * Make sure we return NULL if the map fails
 482        */
 483       if (!map) {
 484          return NULL;
 485       }
 486
 487       /**
 488        * Compute the offset to the specific texture slice in the buffer.
 489        */
 490       baseLevelSize.width = tex->b.b.width0;
 491       baseLevelSize.height = tex->b.b.height0;
 492       baseLevelSize.depth = tex->b.b.depth0;
 493
 494       if ((tex->b.b.target == PIPE_TEXTURE_1D_ARRAY) ||
 495           (tex->b.b.target == PIPE_TEXTURE_2D_ARRAY)) {
 496          st->base.layer_stride =
 497             svga3dsurface_get_image_offset(tex->key.format, baseLevelSize,
 498                                            tex->b.b.last_level + 1, 1, 0);
 499       }
 500
 501       offset = svga3dsurface_get_image_offset(tex->key.format, baseLevelSize,
 502                                               tex->b.b.last_level + 1, /* numMips */
 503                                               st->slice, level);
 504       if (level > 0) {
 505          assert(offset > 0);
 506       }
 507
 508       mip_width = u_minify(tex->b.b.width0, level);
 509       mip_height = u_minify(tex->b.b.height0, level);
 510
 511       offset += svga3dsurface_get_pixel_offset(tex->key.format,
 512                                                mip_width, mip_height,
 513                                                st->base.box.x,
 514                                                st->base.box.y,
 515                                                st->base.box.z);
 516
 517       return (void *) (map + offset);
 518    }
 519 }
 520
 521
 522 /**
 523  * Request a transfer map to the texture resource
 524  */
 525 static void *
 526 svga_texture_transfer_map(struct pipe_context *pipe,
 527                           struct pipe_resource *texture,
 528                           unsigned level,
 529                           unsigned usage,
 530                           const struct pipe_box *box,
 531                           struct pipe_transfer **ptransfer)
 532 {
 533    struct svga_context *svga = svga_context(pipe);
 534    struct svga_winsys_screen *sws = svga_screen(pipe->screen)->sws;
 535    struct svga_texture *tex = svga_texture(texture);
 536    struct svga_transfer *st;
 537    struct svga_winsys_surface *surf = tex->handle;
 538    boolean use_direct_map = svga_have_gb_objects(svga) &&
 539                             !svga_have_gb_dma(svga);
 540    void *map = NULL;
 541    int64_t begin = svga_get_time(svga);
 542
 543    SVGA_STATS_TIME_PUSH(sws, SVGA_STATS_TIME_TEXTRANSFERMAP);
 544
 545    if (!surf)
 546       goto done;
 547
 548    /* We can't map texture storage directly unless we have GB objects */
 549    if (usage & PIPE_TRANSFER_MAP_DIRECTLY) {
 550       if (svga_have_gb_objects(svga))
 551          use_direct_map = TRUE;
 552       else
 553          goto done;
 554    }
 555
 556    st = CALLOC_STRUCT(svga_transfer);
 557    if (!st)
 558       goto done;
 559
 560    st->base.level = level;
 561    st->base.usage = usage;
 562    st->base.box = *box;
 563
 564    switch (tex->b.b.target) {
 565    case PIPE_TEXTURE_CUBE:
 566       st->slice = st->base.box.z;
 567       st->base.box.z = 0;   /* so we don't apply double offsets below */
 568       break;
 569    case PIPE_TEXTURE_2D_ARRAY:
 570    case PIPE_TEXTURE_1D_ARRAY:
 571       st->slice = st->base.box.z;
 572       st->base.box.z = 0;   /* so we don't apply double offsets below */
 573
 574       /* Force direct map for transfering multiple slices */
 575       if (st->base.box.depth > 1)
 576          use_direct_map = svga_have_gb_objects(svga);
 577
 578       break;
 579    default:
 580       st->slice = 0;
 581       break;
 582    }
 583
 584    st->use_direct_map = use_direct_map;
 585    pipe_resource_reference(&st->base.resource, texture);
 586
 587    /* If this is the first time mapping to the surface in this
 588     * command buffer, clear the dirty masks of this surface.
 589     */
 590    if (sws->surface_is_flushed(sws, surf)) {
 591       svga_clear_texture_dirty(tex);
 592    }
 593
 594    if (!use_direct_map) {
 595       /* upload to the DMA buffer */
 596       map = svga_texture_transfer_map_dma(svga, st);
 597    }
 598    else {
 599       if (svga_texture_transfer_map_can_upload(svga, st)) {
 600          /* upload to the texture upload buffer */
 601          map = svga_texture_transfer_map_upload(svga, st);
 602       }
 603
 604       if (!map) {
 605          /* map directly to the GBS surface */
 606          map = svga_texture_transfer_map_direct(svga, st);
 607       }
 608    }
 609
 610    if (!map) {
 611       FREE(st);
 612    }
 613    else {
 614       *ptransfer = &st->base;
 615       svga->hud.num_textures_mapped++;
 616       if (usage & PIPE_TRANSFER_WRITE) {
 617          /* record texture upload for HUD */
 618          svga->hud.num_bytes_uploaded +=
 619             st->base.layer_stride * st->base.box.depth;
 620
 621          /* mark this texture level as dirty */
 622          svga_set_texture_dirty(tex, st->slice, level);
 623       }
 624    }
 625
 626 done:
 627    svga->hud.map_buffer_time += (svga_get_time(svga) - begin);
 628    SVGA_STATS_TIME_POP(sws);
 629    (void) sws;
 630
 631    return map;
 632 }
 633
 634 /**
 635  * Unmap a GB texture surface.
 636  */
 637 static void
 638 svga_texture_surface_unmap(struct svga_context *svga,
 639                            struct pipe_transfer *transfer)
 640 {
 641    struct svga_winsys_surface *surf = svga_texture(transfer->resource)->handle;
 642    struct svga_winsys_context *swc = svga->swc;
 643    boolean rebind;
 644
 645    assert(surf);
 646
 647    swc->surface_unmap(swc, surf, &rebind);
 648    if (rebind) {
 649       enum pipe_error ret;
 650       ret = SVGA3D_BindGBSurface(swc, surf);
 651       if (ret != PIPE_OK) {
 652          /* flush and retry */
 653          svga_context_flush(svga, NULL);
 654          ret = SVGA3D_BindGBSurface(swc, surf);
 655          assert(ret == PIPE_OK);
 656       }
 657    }
 658 }
 659
 660
 661 static enum pipe_error
 662 update_image_vgpu9(struct svga_context *svga,
 663                    struct svga_winsys_surface *surf,
 664                    const SVGA3dBox *box,
 665                    unsigned slice,
 666                    unsigned level)
 667 {
 668    enum pipe_error ret;
 669
 670    ret = SVGA3D_UpdateGBImage(svga->swc, surf, box, slice, level);
 671    if (ret != PIPE_OK) {
 672       svga_context_flush(svga, NULL);
 673       ret = SVGA3D_UpdateGBImage(svga->swc, surf, box, slice, level);
 674    }
 675    return ret;
 676 }
 677
 678
 679 static enum pipe_error
 680 update_image_vgpu10(struct svga_context *svga,
 681                     struct svga_winsys_surface *surf,
 682                     const SVGA3dBox *box,
 683                     unsigned slice,
 684                     unsigned level,
 685                     unsigned numMipLevels)
 686 {
 687    enum pipe_error ret;
 688    unsigned subResource;
 689
 690    subResource = slice * numMipLevels + level;
 691    ret = SVGA3D_vgpu10_UpdateSubResource(svga->swc, surf, box, subResource);
 692    if (ret != PIPE_OK) {
 693       svga_context_flush(svga, NULL);
 694       ret = SVGA3D_vgpu10_UpdateSubResource(svga->swc, surf, box, subResource);
 695    }
 696    return ret;
 697 }
 698
 699
 700 /**
 701  * unmap DMA transfer request
 702  */
 703 static void
 704 svga_texture_transfer_unmap_dma(struct svga_context *svga,
 705                                 struct svga_transfer *st)
 706 {
 707    struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws;
 708
 709    if (st->hwbuf)
 710       sws->buffer_unmap(sws, st->hwbuf);
 711
 712    if (st->base.usage & PIPE_TRANSFER_WRITE) {
 713       /* Use DMA to transfer texture data */
 714       SVGA3dSurfaceDMAFlags flags;
 715
 716       memset(&flags, 0, sizeof flags);
 717       if (st->base.usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
 718          flags.discard = TRUE;
 719       }
 720       if (st->base.usage & PIPE_TRANSFER_UNSYNCHRONIZED) {
 721          flags.unsynchronized = TRUE;
 722       }
 723
 724       svga_transfer_dma(svga, st, SVGA3D_WRITE_HOST_VRAM, flags);
 725    }
 726
 727    FREE(st->swbuf);
 728    sws->buffer_destroy(sws, st->hwbuf);
 729 }
 730
 731
 732 /**
 733  * unmap direct map transfer request
 734  */
 735 static void
 736 svga_texture_transfer_unmap_direct(struct svga_context *svga,
 737                                    struct svga_transfer *st)
 738 {
 739    struct pipe_transfer *transfer = &st->base;
 740    struct svga_texture *tex = svga_texture(transfer->resource);
 741
 742    svga_texture_surface_unmap(svga, transfer);
 743
 744    /* Now send an update command to update the content in the backend. */
 745    if (st->base.usage & PIPE_TRANSFER_WRITE) {
 746       struct svga_winsys_surface *surf = tex->handle;
 747       SVGA3dBox box;
 748       enum pipe_error ret;
 749       unsigned nlayers = 1;
 750
 751       assert(svga_have_gb_objects(svga));
 752
 753       /* update the effected region */
 754       box.x = transfer->box.x;
 755       box.y = transfer->box.y;
 756       box.w = transfer->box.width;
 757       box.h = transfer->box.height;
 758       box.d = transfer->box.depth;
 759
 760       switch (tex->b.b.target) {
 761       case PIPE_TEXTURE_CUBE:
 762          box.z = 0;
 763          break;
 764       case PIPE_TEXTURE_2D_ARRAY:
 765          nlayers = box.d;
 766          box.z = 0;
 767          box.d = 1;
 768          break;
 769       case PIPE_TEXTURE_1D_ARRAY:
 770          nlayers = box.d;
 771          box.y = box.z = 0;
 772          box.d = 1;
 773          break;
 774       default:
 775          box.z = transfer->box.z;
 776          break;
 777       }
 778
 779       if (0)
 780          debug_printf("%s %d, %d, %d  %d x %d x %d\n",
 781                       __FUNCTION__,
 782                       box.x, box.y, box.z,
 783                       box.w, box.h, box.d);
 784
 785       if (svga_have_vgpu10(svga)) {
 786          unsigned i;
 787          for (i = 0; i < nlayers; i++) {
 788             ret = update_image_vgpu10(svga, surf, &box,
 789                                       st->slice + i, transfer->level,
 790                                       tex->b.b.last_level + 1);
 791             assert(ret == PIPE_OK);
 792          }
 793       } else {
 794          assert(nlayers == 1);
 795          ret = update_image_vgpu9(svga, surf, &box, st->slice, transfer->level);
 796          assert(ret == PIPE_OK);
 797       }
 798       (void) ret;
 799    }
 800 }
 801
 802 static void
 803 svga_texture_transfer_unmap(struct pipe_context *pipe,
 804                             struct pipe_transfer *transfer)
 805 {
 806    struct svga_context *svga = svga_context(pipe);
 807    struct svga_screen *ss = svga_screen(pipe->screen);
 808    struct svga_winsys_screen *sws = ss->sws;
 809    struct svga_transfer *st = svga_transfer(transfer);
 810    struct svga_texture *tex = svga_texture(transfer->resource);
 811
 812    SVGA_STATS_TIME_PUSH(sws, SVGA_STATS_TIME_TEXTRANSFERUNMAP);
 813
 814    if (!st->use_direct_map) {
 815       svga_texture_transfer_unmap_dma(svga, st);
 816    }
 817    else if (st->upload.buf) {
 818       svga_texture_transfer_unmap_upload(svga, st);
 819    }
 820    else {
 821       svga_texture_transfer_unmap_direct(svga, st);
 822    }
 823
 824    if (st->base.usage & PIPE_TRANSFER_WRITE) {
 825       svga->hud.num_resource_updates++;
 826
 827       /* Mark the texture level as dirty */
 828       ss->texture_timestamp++;
 829       svga_age_texture_view(tex, transfer->level);
 830       if (transfer->resource->target == PIPE_TEXTURE_CUBE)
 831          svga_define_texture_level(tex, st->slice, transfer->level);
 832       else
 833          svga_define_texture_level(tex, 0, transfer->level);
 834    }
 835
 836    pipe_resource_reference(&st->base.resource, NULL);
 837    FREE(st);
 838    SVGA_STATS_TIME_POP(sws);
 839    (void) sws;
 840 }
 841
 842
 843 /**
 844  * Does format store depth values?
 845  */
 846 static inline boolean
 847 format_has_depth(enum pipe_format format)
 848 {
 849    const struct util_format_description *desc = util_format_description(format);
 850    return util_format_has_depth(desc);
 851 }
 852
 853
 854 struct u_resource_vtbl svga_texture_vtbl =
 855 {
 856    svga_texture_get_handle,           /* get_handle */
 857    svga_texture_destroy,              /* resource_destroy */
 858    svga_texture_transfer_map,         /* transfer_map */
 859    u_default_transfer_flush_region,   /* transfer_flush_region */
 860    svga_texture_transfer_unmap,       /* transfer_unmap */
 861 };
 862
 863
 864 struct pipe_resource *
 865 svga_texture_create(struct pipe_screen *screen,
 866                     const struct pipe_resource *template)
 867 {
 868    struct svga_screen *svgascreen = svga_screen(screen);
 869    struct svga_texture *tex;
 870    unsigned bindings = template->bind;
 871
 872    SVGA_STATS_TIME_PUSH(svgascreen->sws,
 873                         SVGA_STATS_TIME_CREATETEXTURE);
 874
 875    assert(template->last_level < SVGA_MAX_TEXTURE_LEVELS);
 876    if (template->last_level >= SVGA_MAX_TEXTURE_LEVELS) {
 877       goto fail_notex;
 878    }
 879
 880    tex = CALLOC_STRUCT(svga_texture);
 881    if (!tex) {
 882       goto fail_notex;
 883    }
 884
 885    tex->defined = CALLOC(template->depth0 * template->array_size,
 886                          sizeof(tex->defined[0]));
 887    if (!tex->defined) {
 888       FREE(tex);
 889       goto fail_notex;
 890    }
 891
 892    tex->rendered_to = CALLOC(template->depth0 * template->array_size,
 893                              sizeof(tex->rendered_to[0]));
 894    if (!tex->rendered_to) {
 895       goto fail;
 896    }
 897
 898    tex->dirty = CALLOC(template->depth0 * template->array_size,
 899                              sizeof(tex->dirty[0]));
 900    if (!tex->dirty) {
 901       goto fail;
 902    }
 903
 904    tex->b.b = *template;
 905    tex->b.vtbl = &svga_texture_vtbl;
 906    pipe_reference_init(&tex->b.b.reference, 1);
 907    tex->b.b.screen = screen;
 908
 909    tex->key.flags = 0;
 910    tex->key.size.width = template->width0;
 911    tex->key.size.height = template->height0;
 912    tex->key.size.depth = template->depth0;
 913    tex->key.arraySize = 1;
 914    tex->key.numFaces = 1;
 915
 916    /* single sample texture can be treated as non-multisamples texture */
 917    tex->key.sampleCount = template->nr_samples > 1 ? template->nr_samples : 0;
 918
 919    if (template->nr_samples > 1) {
 920       tex->key.flags |= SVGA3D_SURFACE_MASKABLE_ANTIALIAS;
 921    }
 922
 923    if (svgascreen->sws->have_vgpu10) {
 924       switch (template->target) {
 925       case PIPE_TEXTURE_1D:
 926          tex->key.flags |= SVGA3D_SURFACE_1D;
 927          break;
 928       case PIPE_TEXTURE_1D_ARRAY:
 929          tex->key.flags |= SVGA3D_SURFACE_1D;
 930          /* fall-through */
 931       case PIPE_TEXTURE_2D_ARRAY:
 932          tex->key.flags |= SVGA3D_SURFACE_ARRAY;
 933          tex->key.arraySize = template->array_size;
 934          break;
 935       case PIPE_TEXTURE_3D:
 936          tex->key.flags |= SVGA3D_SURFACE_VOLUME;
 937          break;
 938       case PIPE_TEXTURE_CUBE:
 939          tex->key.flags |= (SVGA3D_SURFACE_CUBEMAP | SVGA3D_SURFACE_ARRAY);
 940          tex->key.numFaces = 6;
 941          break;
 942       default:
 943          break;
 944       }
 945    }
 946    else {
 947       switch (template->target) {
 948       case PIPE_TEXTURE_3D:
 949          tex->key.flags |= SVGA3D_SURFACE_VOLUME;
 950          break;
 951       case PIPE_TEXTURE_CUBE:
 952          tex->key.flags |= SVGA3D_SURFACE_CUBEMAP;
 953          tex->key.numFaces = 6;
 954          break;
 955       default:
 956          break;
 957       }
 958    }
 959
 960    tex->key.cachable = 1;
 961
 962    if ((bindings & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL)) &&
 963        !(bindings & PIPE_BIND_SAMPLER_VIEW)) {
 964       /* Also check if the format can be sampled from */
 965       if (screen->is_format_supported(screen, template->format,
 966                                       template->target,
 967                                       template->nr_samples,
 968                                       PIPE_BIND_SAMPLER_VIEW)) {
 969          bindings |= PIPE_BIND_SAMPLER_VIEW;
 970       }
 971    }
 972
 973    if (bindings & PIPE_BIND_SAMPLER_VIEW) {
 974       tex->key.flags |= SVGA3D_SURFACE_HINT_TEXTURE;
 975       tex->key.flags |= SVGA3D_SURFACE_BIND_SHADER_RESOURCE;
 976
 977       if (!(bindings & PIPE_BIND_RENDER_TARGET)) {
 978          /* Also check if the format is color renderable */
 979          if (screen->is_format_supported(screen, template->format,
 980                                          template->target,
 981                                          template->nr_samples,
 982                                          PIPE_BIND_RENDER_TARGET)) {
 983             bindings |= PIPE_BIND_RENDER_TARGET;
 984          }
 985       }
 986
 987       if (!(bindings & PIPE_BIND_DEPTH_STENCIL)) {
 988          /* Also check if the format is depth/stencil renderable */
 989          if (screen->is_format_supported(screen, template->format,
 990                                          template->target,
 991                                          template->nr_samples,
 992                                          PIPE_BIND_DEPTH_STENCIL)) {
 993             bindings |= PIPE_BIND_DEPTH_STENCIL;
 994          }
 995       }
 996    }
 997
 998    if (bindings & PIPE_BIND_DISPLAY_TARGET) {
 999       tex->key.cachable = 0;
1000    }
1001
1002    if (bindings & PIPE_BIND_SHARED) {
1003       tex->key.cachable = 0;
1004    }
1005
1006    if (bindings & (PIPE_BIND_SCANOUT | PIPE_BIND_CURSOR)) {
1007       tex->key.scanout = 1;
1008       tex->key.cachable = 0;
1009    }
1010
1011    /*
1012     * Note: Previously we never passed the
1013     * SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot
1014     * know beforehand whether a texture will be used as a rendertarget or not
1015     * and it always requests PIPE_BIND_RENDER_TARGET, therefore
1016     * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose.
1017     *
1018     * However, this was changed since other state trackers
1019     * (XA for example) uses it accurately and certain device versions
1020     * relies on it in certain situations to render correctly.
1021     */
1022    if ((bindings & PIPE_BIND_RENDER_TARGET) &&
1023        !util_format_is_s3tc(template->format)) {
1024       tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET;
1025       tex->key.flags |= SVGA3D_SURFACE_BIND_RENDER_TARGET;
1026    }
1027
1028    if (bindings & PIPE_BIND_DEPTH_STENCIL) {
1029       tex->key.flags |= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
1030       tex->key.flags |= SVGA3D_SURFACE_BIND_DEPTH_STENCIL;
1031    }
1032
1033    tex->key.numMipLevels = template->last_level + 1;
1034
1035    tex->key.format = svga_translate_format(svgascreen, template->format,
1036                                            bindings);
1037    if (tex->key.format == SVGA3D_FORMAT_INVALID) {
1038       goto fail;
1039    }
1040
1041    /* The actual allocation is done with a typeless format.  Typeless
1042     * formats can be reinterpreted as other formats.  For example,
1043     * SVGA3D_R8G8B8A8_UNORM_TYPELESS can be interpreted as
1044     * SVGA3D_R8G8B8A8_UNORM_SRGB or SVGA3D_R8G8B8A8_UNORM.
1045     * Do not use typeless formats for SHARED, DISPLAY_TARGET or SCANOUT
1046     * buffers.
1047     */
1048    if (svgascreen->sws->have_vgpu10
1049        && ((bindings & (PIPE_BIND_SHARED |
1050                         PIPE_BIND_DISPLAY_TARGET |
1051                         PIPE_BIND_SCANOUT)) == 0)) {
1052       SVGA3dSurfaceFormat typeless = svga_typeless_format(tex->key.format);
1053       if (0) {
1054          debug_printf("Convert resource type %s -> %s (bind 0x%x)\n",
1055                       svga_format_name(tex->key.format),
1056                       svga_format_name(typeless),
1057                       bindings);
1058       }
1059
1060       if (svga_format_is_uncompressed_snorm(tex->key.format)) {
1061          /* We can't normally render to snorm surfaces, but once we
1062           * substitute a typeless format, we can if the rendertarget view
1063           * is unorm.  This can happen with GL_ARB_copy_image.
1064           */
1065          tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET;
1066          tex->key.flags |= SVGA3D_SURFACE_BIND_RENDER_TARGET;
1067       }
1068
1069       tex->key.format = typeless;
1070    }
1071
1072    SVGA_DBG(DEBUG_DMA, "surface_create for texture\n", tex->handle);
1073    tex->handle = svga_screen_surface_create(svgascreen, bindings,
1074                                             tex->b.b.usage, &tex->key);
1075    if (!tex->handle) {
1076       goto fail;
1077    }
1078
1079    SVGA_DBG(DEBUG_DMA, "  --> got sid %p (texture)\n", tex->handle);
1080
1081    debug_reference(&tex->b.b.reference,
1082                    (debug_reference_descriptor)debug_describe_resource, 0);
1083
1084    tex->size = util_resource_size(template);
1085    svgascreen->hud.total_resource_bytes += tex->size;
1086    svgascreen->hud.num_resources++;
1087
1088    SVGA_STATS_TIME_POP(svgascreen->sws);
1089
1090    return &tex->b.b;
1091
1092 fail:
1093    if (tex->dirty)
1094       FREE(tex->dirty);
1095    if (tex->rendered_to)
1096       FREE(tex->rendered_to);
1097    if (tex->defined)
1098       FREE(tex->defined);
1099    FREE(tex);
1100 fail_notex:
1101    SVGA_STATS_TIME_POP(svgascreen->sws);
1102    return NULL;
1103 }
1104
1105
1106 struct pipe_resource *
1107 svga_texture_from_handle(struct pipe_screen *screen,
1108                          const struct pipe_resource *template,
1109                          struct winsys_handle *whandle)
1110 {
1111    struct svga_winsys_screen *sws = svga_winsys_screen(screen);
1112    struct svga_screen *ss = svga_screen(screen);
1113    struct svga_winsys_surface *srf;
1114    struct svga_texture *tex;
1115    enum SVGA3dSurfaceFormat format = 0;
1116    assert(screen);
1117
1118    /* Only supports one type */
1119    if ((template->target != PIPE_TEXTURE_2D &&
1120        template->target != PIPE_TEXTURE_RECT) ||
1121        template->last_level != 0 ||
1122        template->depth0 != 1) {
1123       return NULL;
1124    }
1125
1126    srf = sws->surface_from_handle(sws, whandle, &format);
1127
1128    if (!srf)
1129       return NULL;
1130
1131    if (svga_translate_format(svga_screen(screen), template->format,
1132                              template->bind) != format) {
1133       unsigned f1 = svga_translate_format(svga_screen(screen),
1134                                           template->format, template->bind);
1135       unsigned f2 = format;
1136
1137       /* It's okay for XRGB and ARGB or depth with/out stencil to get mixed up.
1138        */
1139       if (f1 == SVGA3D_B8G8R8A8_UNORM)
1140          f1 = SVGA3D_A8R8G8B8;
1141       if (f1 == SVGA3D_B8G8R8X8_UNORM)
1142          f1 = SVGA3D_X8R8G8B8;
1143
1144       if ( !( (f1 == f2) ||
1145               (f1 == SVGA3D_X8R8G8B8 && f2 == SVGA3D_A8R8G8B8) ||
1146               (f1 == SVGA3D_X8R8G8B8 && f2 == SVGA3D_B8G8R8X8_UNORM) ||
1147               (f1 == SVGA3D_A8R8G8B8 && f2 == SVGA3D_X8R8G8B8) ||
1148               (f1 == SVGA3D_A8R8G8B8 && f2 == SVGA3D_B8G8R8A8_UNORM) ||
1149               (f1 == SVGA3D_Z_D24X8 && f2 == SVGA3D_Z_D24S8) ||
1150               (f1 == SVGA3D_Z_DF24 && f2 == SVGA3D_Z_D24S8_INT) ) ) {
1151          debug_printf("%s wrong format %s != %s\n", __FUNCTION__,
1152                       svga_format_name(f1), svga_format_name(f2));
1153          return NULL;
1154       }
1155    }
1156
1157    tex = CALLOC_STRUCT(svga_texture);
1158    if (!tex)
1159       return NULL;
1160
1161    tex->defined = CALLOC(template->depth0 * template->array_size,
1162                          sizeof(tex->defined[0]));
1163    if (!tex->defined) {
1164       FREE(tex);
1165       return NULL;
1166    }
1167
1168    tex->b.b = *template;
1169    tex->b.vtbl = &svga_texture_vtbl;
1170    pipe_reference_init(&tex->b.b.reference, 1);
1171    tex->b.b.screen = screen;
1172
1173    SVGA_DBG(DEBUG_DMA, "wrap surface sid %p\n", srf);
1174
1175    tex->key.cachable = 0;
1176    tex->key.format = format;
1177    tex->handle = srf;
1178
1179    tex->rendered_to = CALLOC(1, sizeof(tex->rendered_to[0]));
1180    if (!tex->rendered_to)
1181       goto fail;
1182
1183    tex->dirty = CALLOC(1, sizeof(tex->dirty[0]));
1184    if (!tex->dirty)
1185       goto fail;
1186
1187    tex->imported = TRUE;
1188
1189    ss->hud.num_resources++;
1190
1191    return &tex->b.b;
1192
1193 fail:
1194    if (tex->defined)
1195       FREE(tex->defined);
1196    if (tex->rendered_to)
1197       FREE(tex->rendered_to);
1198    if (tex->dirty)
1199       FREE(tex->dirty);
1200    FREE(tex);
1201    return NULL;
1202 }
1203
1204 boolean
1205 svga_texture_generate_mipmap(struct pipe_context *pipe,
1206                              struct pipe_resource *pt,
1207                              enum pipe_format format,
1208                              unsigned base_level,
1209                              unsigned last_level,
1210                              unsigned first_layer,
1211                              unsigned last_layer)
1212 {
1213    struct pipe_sampler_view templ, *psv;
1214    struct svga_pipe_sampler_view *sv;
1215    struct svga_context *svga = svga_context(pipe);
1216    struct svga_texture *tex = svga_texture(pt);
1217    enum pipe_error ret;
1218
1219    assert(svga_have_vgpu10(svga));
1220
1221    /* Only support 2D texture for now */
1222    if (pt->target != PIPE_TEXTURE_2D)
1223       return FALSE;
1224
1225    /* Fallback to the mipmap generation utility for those formats that
1226     * do not support hw generate mipmap
1227     */
1228    if (!svga_format_support_gen_mips(format))
1229       return FALSE;
1230
1231    /* Make sure the texture surface was created with
1232     * SVGA3D_SURFACE_BIND_RENDER_TARGET
1233     */
1234    if (!tex->handle || !(tex->key.flags & SVGA3D_SURFACE_BIND_RENDER_TARGET))
1235       return FALSE;
1236
1237    templ.format = format;
1238    templ.u.tex.first_layer = first_layer;
1239    templ.u.tex.last_layer = last_layer;
1240    templ.u.tex.first_level = base_level;
1241    templ.u.tex.last_level = last_level;
1242
1243    psv = pipe->create_sampler_view(pipe, pt, &templ);
1244    if (psv == NULL)
1245       return FALSE;
1246
1247    sv = svga_pipe_sampler_view(psv);
1248    ret = svga_validate_pipe_sampler_view(svga, sv);
1249    if (ret != PIPE_OK) {
1250       svga_context_flush(svga, NULL);
1251       ret = svga_validate_pipe_sampler_view(svga, sv);
1252       assert(ret == PIPE_OK);
1253    }
1254
1255    ret = SVGA3D_vgpu10_GenMips(svga->swc, sv->id, tex->handle);
1256    if (ret != PIPE_OK) {
1257       svga_context_flush(svga, NULL);
1258       ret = SVGA3D_vgpu10_GenMips(svga->swc, sv->id, tex->handle);
1259    }
1260    pipe_sampler_view_reference(&psv, NULL);
1261
1262    svga->hud.num_generate_mipmap++;
1263
1264    return TRUE;
1265 }
1266
1267
1268 /* texture upload buffer default size in bytes */
1269 #define TEX_UPLOAD_DEFAULT_SIZE (1024 * 1024)
1270
1271 /**
1272  * Create a texture upload buffer
1273  */
1274 boolean
1275 svga_texture_transfer_map_upload_create(struct svga_context *svga)
1276 {
1277    svga->tex_upload = u_upload_create(&svga->pipe, TEX_UPLOAD_DEFAULT_SIZE,
1278                                       0, PIPE_USAGE_STAGING);
1279    return svga->tex_upload != NULL;
1280 }
1281
1282
1283 /**
1284  * Destroy the texture upload buffer
1285  */
1286 void
1287 svga_texture_transfer_map_upload_destroy(struct svga_context *svga)
1288 {
1289    u_upload_destroy(svga->tex_upload);
1290 }
1291
1292
1293 /**
1294  * Returns true if this transfer map request can use the upload buffer.
1295  */
1296 boolean
1297 svga_texture_transfer_map_can_upload(struct svga_context *svga,
1298                                      struct svga_transfer *st)
1299 {
1300    struct pipe_resource *texture = st->base.resource;
1301
1302    if (!svga_have_vgpu10(svga))
1303       return FALSE;
1304
1305    if (svga_sws(svga)->have_transfer_from_buffer_cmd == FALSE)
1306       return FALSE;
1307
1308    if (st->base.usage & PIPE_TRANSFER_READ)
1309       return FALSE;
1310
1311    /* TransferFromBuffer command is not well supported with multi-samples surface */
1312    if (texture->nr_samples > 1)
1313       return FALSE;
1314
1315    if (util_format_is_compressed(texture->format)) {
1316       /* XXX Need to take a closer look to see why texture upload
1317        * with 3D texture with compressed format fails
1318        */
1319       if (texture->target == PIPE_TEXTURE_3D)
1320           return FALSE;
1321
1322 #ifdef DEBUG
1323       {
1324          struct svga_texture *tex = svga_texture(texture);
1325          unsigned blockw, blockh, bytesPerBlock;
1326
1327          svga_format_size(tex->key.format, &blockw, &blockh, &bytesPerBlock);
1328
1329          /* dest box must start on block boundary */
1330          assert((st->base.box.x % blockw) == 0);
1331          assert((st->base.box.y % blockh) == 0);
1332       }
1333 #endif
1334    }
1335    else if (texture->format == PIPE_FORMAT_R9G9B9E5_FLOAT) {
1336       return FALSE;
1337    }
1338
1339    return TRUE;
1340 }
1341
1342
1343 /**
1344  * Use upload buffer for the transfer map request.
1345  */
1346 void *
1347 svga_texture_transfer_map_upload(struct svga_context *svga,
1348                                  struct svga_transfer *st)
1349 {
1350    struct pipe_resource *texture = st->base.resource;
1351    struct pipe_resource *tex_buffer = NULL;
1352    void *tex_map;
1353    unsigned nblocksx, nblocksy;
1354    unsigned offset;
1355    unsigned upload_size;
1356
1357    assert(svga->tex_upload);
1358
1359    st->upload.box.x = st->base.box.x;
1360    st->upload.box.y = st->base.box.y;
1361    st->upload.box.z = st->base.box.z;
1362    st->upload.box.w = st->base.box.width;
1363    st->upload.box.h = st->base.box.height;
1364    st->upload.box.d = st->base.box.depth;
1365    st->upload.nlayers = 1;
1366
1367    switch (texture->target) {
1368    case PIPE_TEXTURE_CUBE:
1369       st->upload.box.z = 0;
1370       break;
1371    case PIPE_TEXTURE_2D_ARRAY:
1372       st->upload.nlayers = st->base.box.depth;
1373       st->upload.box.z = 0;
1374       st->upload.box.d = 1;
1375       break;
1376    case PIPE_TEXTURE_1D_ARRAY:
1377       st->upload.nlayers = st->base.box.depth;
1378       st->upload.box.y = st->upload.box.z = 0;
1379       st->upload.box.d = 1;
1380       break;
1381    default:
1382       break;
1383    }
1384
1385    nblocksx = util_format_get_nblocksx(texture->format, st->base.box.width);
1386    nblocksy = util_format_get_nblocksy(texture->format, st->base.box.height);
1387
1388    st->base.stride = nblocksx * util_format_get_blocksize(texture->format);
1389    st->base.layer_stride = st->base.stride * nblocksy;
1390
1391    /* In order to use the TransferFromBuffer command to update the
1392     * texture content from the buffer, the layer stride for a multi-layers
1393     * surface needs to be in multiples of 16 bytes.
1394     */
1395    if (st->upload.nlayers > 1 && st->base.layer_stride & 15)
1396       return NULL;
1397
1398    upload_size = st->base.layer_stride * st->base.box.depth;
1399    upload_size = align(upload_size, 16);
1400
1401    /* If the upload size exceeds the default buffer size, the
1402     * upload buffer manager code will try to allocate a new buffer
1403     * with the new buffer size.
1404     */
1405    u_upload_alloc(svga->tex_upload, 0, upload_size, 16,
1406                   &offset, &tex_buffer, &tex_map);
1407
1408    if (!tex_map) {
1409       return NULL;
1410    }
1411
1412    st->upload.buf = tex_buffer;
1413    st->upload.map = tex_map;
1414    st->upload.offset = offset;
1415
1416    return tex_map;
1417 }
1418
1419
1420 /**
1421  * Unmap upload map transfer request
1422  */
1423 void
1424 svga_texture_transfer_unmap_upload(struct svga_context *svga,
1425                                    struct svga_transfer *st)
1426 {
1427    struct svga_winsys_surface *srcsurf;
1428    struct svga_winsys_surface *dstsurf;
1429    struct pipe_resource *texture = st->base.resource;
1430    struct svga_texture *tex = svga_texture(texture);
1431    enum pipe_error ret;
1432    unsigned subResource;
1433    unsigned numMipLevels;
1434    unsigned i, layer;
1435    unsigned offset = st->upload.offset;
1436
1437    assert(svga->tex_upload);
1438    assert(st->upload.buf);
1439
1440    /* unmap the texture upload buffer */
1441    u_upload_unmap(svga->tex_upload);
1442
1443    srcsurf = svga_buffer_handle(svga, st->upload.buf);
1444    dstsurf = svga_texture(texture)->handle;
1445    assert(dstsurf);
1446
1447    numMipLevels = texture->last_level + 1;
1448
1449    for (i = 0, layer = st->slice; i < st->upload.nlayers; i++, layer++) {
1450       subResource = layer * numMipLevels + st->base.level;
1451
1452       /* send a transferFromBuffer command to update the host texture surface */
1453       assert((offset & 15) == 0);
1454
1455       ret = SVGA3D_vgpu10_TransferFromBuffer(svga->swc, srcsurf,
1456                                              offset,
1457                                              st->base.stride,
1458                                              st->base.layer_stride,
1459                                              dstsurf, subResource,
1460                                              &st->upload.box);
1461       if (ret != PIPE_OK) {
1462          svga_context_flush(svga, NULL);
1463          ret = SVGA3D_vgpu10_TransferFromBuffer(svga->swc, srcsurf,
1464                                                 offset,
1465                                                 st->base.stride,
1466                                                 st->base.layer_stride,
1467                                                 dstsurf, subResource,
1468                                                 &st->upload.box);
1469          assert(ret == PIPE_OK);
1470       }
1471       offset += st->base.layer_stride;
1472
1473       /* Set rendered-to flag */
1474       svga_set_texture_rendered_to(tex, layer, st->base.level);
1475    }
1476
1477    pipe_resource_reference(&st->upload.buf, NULL);
1478 }