1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 **********************************************************/
26 #include "svga3d_reg.h"
27 #include "svga3d_surfacedefs.h"
29 #include "pipe/p_state.h"
30 #include "pipe/p_defines.h"
31 #include "os/os_thread.h"
32 #include "util/u_format.h"
33 #include "util/u_inlines.h"
34 #include "util/u_math.h"
35 #include "util/u_memory.h"
36 #include "util/u_resource.h"
37 #include "util/u_upload_mgr.h"
40 #include "svga_format.h"
41 #include "svga_screen.h"
42 #include "svga_context.h"
43 #include "svga_resource_texture.h"
44 #include "svga_resource_buffer.h"
45 #include "svga_sampler_view.h"
46 #include "svga_winsys.h"
47 #include "svga_debug.h"
51 svga_transfer_dma_band(struct svga_context
*svga
,
52 struct svga_transfer
*st
,
53 SVGA3dTransferType transfer
,
54 unsigned x
, unsigned y
, unsigned z
,
55 unsigned w
, unsigned h
, unsigned d
,
56 unsigned srcx
, unsigned srcy
, unsigned srcz
,
57 SVGA3dSurfaceDMAFlags flags
)
59 struct svga_texture
*texture
= svga_texture(st
->base
.resource
);
63 assert(!st
->use_direct_map
);
75 SVGA_DBG(DEBUG_DMA
, "dma %s sid %p, face %u, (%u, %u, %u) - "
76 "(%u, %u, %u), %ubpp\n",
77 transfer
== SVGA3D_WRITE_HOST_VRAM
? "to" : "from",
86 util_format_get_blocksize(texture
->b
.b
.format
) * 8 /
87 (util_format_get_blockwidth(texture
->b
.b
.format
)
88 * util_format_get_blockheight(texture
->b
.b
.format
)));
90 ret
= SVGA3D_SurfaceDMA(svga
->swc
, st
, transfer
, &box
, 1, flags
);
92 svga_context_flush(svga
, NULL
);
93 ret
= SVGA3D_SurfaceDMA(svga
->swc
, st
, transfer
, &box
, 1, flags
);
94 assert(ret
== PIPE_OK
);
100 svga_transfer_dma(struct svga_context
*svga
,
101 struct svga_transfer
*st
,
102 SVGA3dTransferType transfer
,
103 SVGA3dSurfaceDMAFlags flags
)
105 struct svga_texture
*texture
= svga_texture(st
->base
.resource
);
106 struct svga_screen
*screen
= svga_screen(texture
->b
.b
.screen
);
107 struct svga_winsys_screen
*sws
= screen
->sws
;
108 struct pipe_fence_handle
*fence
= NULL
;
110 assert(!st
->use_direct_map
);
112 if (transfer
== SVGA3D_READ_HOST_VRAM
) {
113 SVGA_DBG(DEBUG_PERF
, "%s: readback transfer\n", __FUNCTION__
);
116 /* Ensure any pending operations on host surfaces are queued on the command
119 svga_surfaces_flush( svga
);
122 /* Do the DMA transfer in a single go */
123 svga_transfer_dma_band(svga
, st
, transfer
,
124 st
->base
.box
.x
, st
->base
.box
.y
, st
->base
.box
.z
,
125 st
->base
.box
.width
, st
->base
.box
.height
, st
->base
.box
.depth
,
129 if (transfer
== SVGA3D_READ_HOST_VRAM
) {
130 svga_context_flush(svga
, &fence
);
131 sws
->fence_finish(sws
, fence
, PIPE_TIMEOUT_INFINITE
, 0);
132 sws
->fence_reference(sws
, &fence
, NULL
);
137 unsigned blockheight
=
138 util_format_get_blockheight(st
->base
.resource
->format
);
140 h
= st
->hw_nblocksy
* blockheight
;
143 for (y
= 0; y
< st
->base
.box
.height
; y
+= h
) {
144 unsigned offset
, length
;
147 if (y
+ h
> st
->base
.box
.height
)
148 h
= st
->base
.box
.height
- y
;
150 /* Transfer band must be aligned to pixel block boundaries */
151 assert(y
% blockheight
== 0);
152 assert(h
% blockheight
== 0);
154 offset
= y
* st
->base
.stride
/ blockheight
;
155 length
= h
* st
->base
.stride
/ blockheight
;
157 sw
= (uint8_t *) st
->swbuf
+ offset
;
159 if (transfer
== SVGA3D_WRITE_HOST_VRAM
) {
160 unsigned usage
= PIPE_TRANSFER_WRITE
;
162 /* Wait for the previous DMAs to complete */
163 /* TODO: keep one DMA (at half the size) in the background */
165 svga_context_flush(svga
, NULL
);
166 usage
|= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
;
169 hw
= sws
->buffer_map(sws
, st
->hwbuf
, usage
);
172 memcpy(hw
, sw
, length
);
173 sws
->buffer_unmap(sws
, st
->hwbuf
);
177 svga_transfer_dma_band(svga
, st
, transfer
,
178 st
->base
.box
.x
, y
, st
->base
.box
.z
,
179 st
->base
.box
.width
, h
, st
->base
.box
.depth
,
183 * Prevent the texture contents to be discarded on the next band
186 flags
.discard
= FALSE
;
188 if (transfer
== SVGA3D_READ_HOST_VRAM
) {
189 svga_context_flush(svga
, &fence
);
190 sws
->fence_finish(sws
, fence
, PIPE_TIMEOUT_INFINITE
, 0);
192 hw
= sws
->buffer_map(sws
, st
->hwbuf
, PIPE_TRANSFER_READ
);
195 memcpy(sw
, hw
, length
);
196 sws
->buffer_unmap(sws
, st
->hwbuf
);
206 svga_texture_get_handle(struct pipe_screen
*screen
,
207 struct pipe_resource
*texture
,
208 struct winsys_handle
*whandle
)
210 struct svga_winsys_screen
*sws
= svga_winsys_screen(texture
->screen
);
213 assert(svga_texture(texture
)->key
.cachable
== 0);
214 svga_texture(texture
)->key
.cachable
= 0;
216 stride
= util_format_get_nblocksx(texture
->format
, texture
->width0
) *
217 util_format_get_blocksize(texture
->format
);
219 return sws
->surface_get_handle(sws
, svga_texture(texture
)->handle
,
225 svga_texture_destroy(struct pipe_screen
*screen
,
226 struct pipe_resource
*pt
)
228 struct svga_screen
*ss
= svga_screen(screen
);
229 struct svga_texture
*tex
= svga_texture(pt
);
231 ss
->texture_timestamp
++;
233 svga_sampler_view_reference(&tex
->cached_view
, NULL
);
236 DBG("%s deleting %p\n", __FUNCTION__, (void *) tex);
238 SVGA_DBG(DEBUG_DMA
, "unref sid %p (texture)\n", tex
->handle
);
239 svga_screen_surface_destroy(ss
, &tex
->key
, &tex
->handle
);
241 /* Destroy the backed surface handle if exists */
242 if (tex
->backed_handle
)
243 svga_screen_surface_destroy(ss
, &tex
->backed_key
, &tex
->backed_handle
);
245 ss
->hud
.total_resource_bytes
-= tex
->size
;
248 FREE(tex
->rendered_to
);
252 assert(ss
->hud
.num_resources
> 0);
253 if (ss
->hud
.num_resources
> 0)
254 ss
->hud
.num_resources
--;
259 * Determine if the resource was rendered to
261 static inline boolean
262 was_tex_rendered_to(struct pipe_resource
*resource
,
263 const struct pipe_transfer
*transfer
)
267 switch (resource
->target
) {
268 case PIPE_TEXTURE_CUBE
:
269 assert(transfer
->box
.depth
== 1);
270 case PIPE_TEXTURE_1D_ARRAY
:
271 case PIPE_TEXTURE_2D_ARRAY
:
272 case PIPE_TEXTURE_CUBE_ARRAY
:
273 layer_face
= transfer
->box
.z
;
279 return svga_was_texture_rendered_to(svga_texture(resource
),
280 layer_face
, transfer
->level
);
285 * Determine if we need to read back a texture image before mapping it.
287 static inline boolean
288 need_tex_readback(struct pipe_transfer
*transfer
)
290 if (transfer
->usage
& PIPE_TRANSFER_READ
)
293 if ((transfer
->usage
& PIPE_TRANSFER_WRITE
) &&
294 ((transfer
->usage
& PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
) == 0)) {
295 return was_tex_rendered_to(transfer
->resource
, transfer
);
302 static enum pipe_error
303 readback_image_vgpu9(struct svga_context
*svga
,
304 struct svga_winsys_surface
*surf
,
310 ret
= SVGA3D_ReadbackGBImage(svga
->swc
, surf
, slice
, level
);
311 if (ret
!= PIPE_OK
) {
312 svga_context_flush(svga
, NULL
);
313 ret
= SVGA3D_ReadbackGBImage(svga
->swc
, surf
, slice
, level
);
319 static enum pipe_error
320 readback_image_vgpu10(struct svga_context
*svga
,
321 struct svga_winsys_surface
*surf
,
324 unsigned numMipLevels
)
327 unsigned subResource
;
329 subResource
= slice
* numMipLevels
+ level
;
330 ret
= SVGA3D_vgpu10_ReadbackSubResource(svga
->swc
, surf
, subResource
);
331 if (ret
!= PIPE_OK
) {
332 svga_context_flush(svga
, NULL
);
333 ret
= SVGA3D_vgpu10_ReadbackSubResource(svga
->swc
, surf
, subResource
);
340 * Use DMA for the transfer request
343 svga_texture_transfer_map_dma(struct svga_context
*svga
,
344 struct svga_transfer
*st
)
346 struct svga_winsys_screen
*sws
= svga_screen(svga
->pipe
.screen
)->sws
;
347 struct pipe_resource
*texture
= st
->base
.resource
;
348 unsigned nblocksx
, nblocksy
;
350 unsigned usage
= st
->base
.usage
;
352 /* we'll put the data into a tightly packed buffer */
353 nblocksx
= util_format_get_nblocksx(texture
->format
, st
->base
.box
.width
);
354 nblocksy
= util_format_get_nblocksy(texture
->format
, st
->base
.box
.height
);
355 d
= st
->base
.box
.depth
;
357 st
->base
.stride
= nblocksx
*util_format_get_blocksize(texture
->format
);
358 st
->base
.layer_stride
= st
->base
.stride
* nblocksy
;
359 st
->hw_nblocksy
= nblocksy
;
361 st
->hwbuf
= svga_winsys_buffer_create(svga
, 1, 0,
362 st
->hw_nblocksy
* st
->base
.stride
* d
);
364 while (!st
->hwbuf
&& (st
->hw_nblocksy
/= 2)) {
366 svga_winsys_buffer_create(svga
, 1, 0,
367 st
->hw_nblocksy
* st
->base
.stride
* d
);
373 if (st
->hw_nblocksy
< nblocksy
) {
374 /* We couldn't allocate a hardware buffer big enough for the transfer,
375 * so allocate regular malloc memory instead
378 debug_printf("%s: failed to allocate %u KB of DMA, "
379 "splitting into %u x %u KB DMA transfers\n",
381 (nblocksy
* st
->base
.stride
+ 1023) / 1024,
382 (nblocksy
+ st
->hw_nblocksy
- 1) / st
->hw_nblocksy
,
383 (st
->hw_nblocksy
* st
->base
.stride
+ 1023) / 1024);
386 st
->swbuf
= MALLOC(nblocksy
* st
->base
.stride
* d
);
388 sws
->buffer_destroy(sws
, st
->hwbuf
);
393 if (usage
& PIPE_TRANSFER_READ
) {
394 SVGA3dSurfaceDMAFlags flags
;
395 memset(&flags
, 0, sizeof flags
);
396 svga_transfer_dma(svga
, st
, SVGA3D_READ_HOST_VRAM
, flags
);
403 return sws
->buffer_map(sws
, st
->hwbuf
, usage
);
409 * Use direct map for the transfer request
412 svga_texture_transfer_map_direct(struct svga_context
*svga
,
413 struct svga_transfer
*st
)
415 struct svga_winsys_screen
*sws
= svga_screen(svga
->pipe
.screen
)->sws
;
416 struct pipe_transfer
*transfer
= &st
->base
;
417 struct pipe_resource
*texture
= transfer
->resource
;
418 struct svga_texture
*tex
= svga_texture(texture
);
419 struct svga_winsys_surface
*surf
= tex
->handle
;
420 unsigned level
= st
->base
.level
;
421 unsigned w
, h
, nblocksx
, nblocksy
, i
;
422 unsigned usage
= st
->base
.usage
;
424 if (need_tex_readback(transfer
)) {
427 svga_surfaces_flush(svga
);
429 for (i
= 0; i
< st
->base
.box
.depth
; i
++) {
430 if (svga_have_vgpu10(svga
)) {
431 ret
= readback_image_vgpu10(svga
, surf
, st
->slice
+ i
, level
,
432 tex
->b
.b
.last_level
+ 1);
434 ret
= readback_image_vgpu9(svga
, surf
, st
->slice
+ i
, level
);
437 svga
->hud
.num_readbacks
++;
438 SVGA_STATS_COUNT_INC(sws
, SVGA_STATS_COUNT_TEXREADBACK
);
440 assert(ret
== PIPE_OK
);
443 svga_context_flush(svga
, NULL
);
445 * Note: if PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE were specified
446 * we could potentially clear the flag for all faces/layers/mips.
448 svga_clear_texture_rendered_to(tex
, st
->slice
, level
);
451 assert(usage
& PIPE_TRANSFER_WRITE
);
452 if ((usage
& PIPE_TRANSFER_UNSYNCHRONIZED
) == 0) {
453 if (svga_is_texture_dirty(tex
, st
->slice
, level
)) {
455 * do a surface flush if the subresource has been modified
456 * in this command buffer.
458 svga_surfaces_flush(svga
);
459 if (!sws
->surface_is_flushed(sws
, surf
)) {
460 svga
->hud
.surface_write_flushes
++;
461 SVGA_STATS_COUNT_INC(sws
, SVGA_STATS_COUNT_SURFACEWRITEFLUSH
);
462 svga_context_flush(svga
, NULL
);
468 /* we'll directly access the guest-backed surface */
469 w
= u_minify(texture
->width0
, level
);
470 h
= u_minify(texture
->height0
, level
);
471 nblocksx
= util_format_get_nblocksx(texture
->format
, w
);
472 nblocksy
= util_format_get_nblocksy(texture
->format
, h
);
473 st
->hw_nblocksy
= nblocksy
;
474 st
->base
.stride
= nblocksx
*util_format_get_blocksize(texture
->format
);
475 st
->base
.layer_stride
= st
->base
.stride
* nblocksy
;
481 SVGA3dSize baseLevelSize
;
484 unsigned offset
, mip_width
, mip_height
;
486 map
= svga
->swc
->surface_map(svga
->swc
, surf
, usage
, &retry
);
487 if (map
== NULL
&& retry
) {
489 * At this point, the svga_surfaces_flush() should already have
490 * called in svga_texture_get_transfer().
492 svga
->hud
.surface_write_flushes
++;
493 svga_context_flush(svga
, NULL
);
494 map
= svga
->swc
->surface_map(svga
->swc
, surf
, usage
, &retry
);
498 * Make sure we return NULL if the map fails
505 * Compute the offset to the specific texture slice in the buffer.
507 baseLevelSize
.width
= tex
->b
.b
.width0
;
508 baseLevelSize
.height
= tex
->b
.b
.height0
;
509 baseLevelSize
.depth
= tex
->b
.b
.depth0
;
511 if ((tex
->b
.b
.target
== PIPE_TEXTURE_1D_ARRAY
) ||
512 (tex
->b
.b
.target
== PIPE_TEXTURE_2D_ARRAY
) ||
513 (tex
->b
.b
.target
== PIPE_TEXTURE_CUBE_ARRAY
)) {
514 st
->base
.layer_stride
=
515 svga3dsurface_get_image_offset(tex
->key
.format
, baseLevelSize
,
516 tex
->b
.b
.last_level
+ 1, 1, 0);
519 offset
= svga3dsurface_get_image_offset(tex
->key
.format
, baseLevelSize
,
520 tex
->b
.b
.last_level
+ 1, /* numMips */
526 mip_width
= u_minify(tex
->b
.b
.width0
, level
);
527 mip_height
= u_minify(tex
->b
.b
.height0
, level
);
529 offset
+= svga3dsurface_get_pixel_offset(tex
->key
.format
,
530 mip_width
, mip_height
,
535 return (void *) (map
+ offset
);
541 * Request a transfer map to the texture resource
544 svga_texture_transfer_map(struct pipe_context
*pipe
,
545 struct pipe_resource
*texture
,
548 const struct pipe_box
*box
,
549 struct pipe_transfer
**ptransfer
)
551 struct svga_context
*svga
= svga_context(pipe
);
552 struct svga_winsys_screen
*sws
= svga_screen(pipe
->screen
)->sws
;
553 struct svga_texture
*tex
= svga_texture(texture
);
554 struct svga_transfer
*st
;
555 struct svga_winsys_surface
*surf
= tex
->handle
;
556 boolean use_direct_map
= svga_have_gb_objects(svga
) &&
557 !svga_have_gb_dma(svga
);
559 int64_t begin
= svga_get_time(svga
);
561 SVGA_STATS_TIME_PUSH(sws
, SVGA_STATS_TIME_TEXTRANSFERMAP
);
566 /* We can't map texture storage directly unless we have GB objects */
567 if (usage
& PIPE_TRANSFER_MAP_DIRECTLY
) {
568 if (svga_have_gb_objects(svga
))
569 use_direct_map
= TRUE
;
574 st
= CALLOC_STRUCT(svga_transfer
);
578 st
->base
.level
= level
;
579 st
->base
.usage
= usage
;
582 switch (tex
->b
.b
.target
) {
583 case PIPE_TEXTURE_CUBE
:
584 st
->slice
= st
->base
.box
.z
;
585 st
->base
.box
.z
= 0; /* so we don't apply double offsets below */
587 case PIPE_TEXTURE_1D_ARRAY
:
588 case PIPE_TEXTURE_2D_ARRAY
:
589 case PIPE_TEXTURE_CUBE_ARRAY
:
590 st
->slice
= st
->base
.box
.z
;
591 st
->base
.box
.z
= 0; /* so we don't apply double offsets below */
593 /* Force direct map for transfering multiple slices */
594 if (st
->base
.box
.depth
> 1)
595 use_direct_map
= svga_have_gb_objects(svga
);
603 st
->use_direct_map
= use_direct_map
;
604 pipe_resource_reference(&st
->base
.resource
, texture
);
606 /* If this is the first time mapping to the surface in this
607 * command buffer, clear the dirty masks of this surface.
609 if (sws
->surface_is_flushed(sws
, surf
)) {
610 svga_clear_texture_dirty(tex
);
613 if (!use_direct_map
) {
614 /* upload to the DMA buffer */
615 map
= svga_texture_transfer_map_dma(svga
, st
);
618 boolean can_use_upload
= tex
->can_use_upload
&&
619 !(st
->base
.usage
& PIPE_TRANSFER_READ
);
620 boolean was_rendered_to
= was_tex_rendered_to(texture
, &st
->base
);
622 /* If the texture was already rendered to and upload buffer
623 * is supported, then we will use upload buffer to
624 * avoid the need to read back the texture content; otherwise,
625 * we'll first try to map directly to the GB surface, if it is blocked,
626 * then we'll try the upload buffer.
628 if (was_rendered_to
&& can_use_upload
) {
629 map
= svga_texture_transfer_map_upload(svga
, st
);
632 unsigned orig_usage
= st
->base
.usage
;
634 /* First try directly map to the GB surface */
636 st
->base
.usage
|= PIPE_TRANSFER_DONTBLOCK
;
637 map
= svga_texture_transfer_map_direct(svga
, st
);
638 st
->base
.usage
= orig_usage
;
640 if (!map
&& can_use_upload
) {
641 /* if direct map with DONTBLOCK fails, then try upload to the
642 * texture upload buffer.
644 map
= svga_texture_transfer_map_upload(svga
, st
);
648 /* If upload fails, then try direct map again without forcing it
652 map
= svga_texture_transfer_map_direct(svga
, st
);
660 *ptransfer
= &st
->base
;
661 svga
->hud
.num_textures_mapped
++;
662 if (usage
& PIPE_TRANSFER_WRITE
) {
663 /* record texture upload for HUD */
664 svga
->hud
.num_bytes_uploaded
+=
665 st
->base
.layer_stride
* st
->base
.box
.depth
;
667 /* mark this texture level as dirty */
668 svga_set_texture_dirty(tex
, st
->slice
, level
);
673 svga
->hud
.map_buffer_time
+= (svga_get_time(svga
) - begin
);
674 SVGA_STATS_TIME_POP(sws
);
681 * Unmap a GB texture surface.
684 svga_texture_surface_unmap(struct svga_context
*svga
,
685 struct pipe_transfer
*transfer
)
687 struct svga_winsys_surface
*surf
= svga_texture(transfer
->resource
)->handle
;
688 struct svga_winsys_context
*swc
= svga
->swc
;
693 swc
->surface_unmap(swc
, surf
, &rebind
);
696 ret
= SVGA3D_BindGBSurface(swc
, surf
);
697 if (ret
!= PIPE_OK
) {
698 /* flush and retry */
699 svga_context_flush(svga
, NULL
);
700 ret
= SVGA3D_BindGBSurface(swc
, surf
);
701 assert(ret
== PIPE_OK
);
707 static enum pipe_error
708 update_image_vgpu9(struct svga_context
*svga
,
709 struct svga_winsys_surface
*surf
,
710 const SVGA3dBox
*box
,
716 ret
= SVGA3D_UpdateGBImage(svga
->swc
, surf
, box
, slice
, level
);
717 if (ret
!= PIPE_OK
) {
718 svga_context_flush(svga
, NULL
);
719 ret
= SVGA3D_UpdateGBImage(svga
->swc
, surf
, box
, slice
, level
);
725 static enum pipe_error
726 update_image_vgpu10(struct svga_context
*svga
,
727 struct svga_winsys_surface
*surf
,
728 const SVGA3dBox
*box
,
731 unsigned numMipLevels
)
734 unsigned subResource
;
736 subResource
= slice
* numMipLevels
+ level
;
738 ret
= SVGA3D_vgpu10_UpdateSubResource(svga
->swc
, surf
, box
, subResource
);
739 if (ret
!= PIPE_OK
) {
740 svga_context_flush(svga
, NULL
);
741 ret
= SVGA3D_vgpu10_UpdateSubResource(svga
->swc
, surf
, box
, subResource
);
748 * unmap DMA transfer request
751 svga_texture_transfer_unmap_dma(struct svga_context
*svga
,
752 struct svga_transfer
*st
)
754 struct svga_winsys_screen
*sws
= svga_screen(svga
->pipe
.screen
)->sws
;
757 sws
->buffer_unmap(sws
, st
->hwbuf
);
759 if (st
->base
.usage
& PIPE_TRANSFER_WRITE
) {
760 /* Use DMA to transfer texture data */
761 SVGA3dSurfaceDMAFlags flags
;
763 memset(&flags
, 0, sizeof flags
);
764 if (st
->base
.usage
& PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
) {
765 flags
.discard
= TRUE
;
767 if (st
->base
.usage
& PIPE_TRANSFER_UNSYNCHRONIZED
) {
768 flags
.unsynchronized
= TRUE
;
771 svga_transfer_dma(svga
, st
, SVGA3D_WRITE_HOST_VRAM
, flags
);
775 sws
->buffer_destroy(sws
, st
->hwbuf
);
780 * unmap direct map transfer request
783 svga_texture_transfer_unmap_direct(struct svga_context
*svga
,
784 struct svga_transfer
*st
)
786 struct pipe_transfer
*transfer
= &st
->base
;
787 struct svga_texture
*tex
= svga_texture(transfer
->resource
);
789 svga_texture_surface_unmap(svga
, transfer
);
791 /* Now send an update command to update the content in the backend. */
792 if (st
->base
.usage
& PIPE_TRANSFER_WRITE
) {
793 struct svga_winsys_surface
*surf
= tex
->handle
;
796 unsigned nlayers
= 1;
798 assert(svga_have_gb_objects(svga
));
800 /* update the effected region */
801 box
.x
= transfer
->box
.x
;
802 box
.y
= transfer
->box
.y
;
803 box
.w
= transfer
->box
.width
;
804 box
.h
= transfer
->box
.height
;
805 box
.d
= transfer
->box
.depth
;
807 switch (tex
->b
.b
.target
) {
808 case PIPE_TEXTURE_CUBE
:
811 case PIPE_TEXTURE_2D_ARRAY
:
812 case PIPE_TEXTURE_CUBE_ARRAY
:
817 case PIPE_TEXTURE_1D_ARRAY
:
823 box
.z
= transfer
->box
.z
;
828 debug_printf("%s %d, %d, %d %d x %d x %d\n",
831 box
.w
, box
.h
, box
.d
);
833 if (svga_have_vgpu10(svga
)) {
836 for (i
= 0; i
< nlayers
; i
++) {
837 ret
= update_image_vgpu10(svga
, surf
, &box
,
838 st
->slice
+ i
, transfer
->level
,
839 tex
->b
.b
.last_level
+ 1);
840 assert(ret
== PIPE_OK
);
843 assert(nlayers
== 1);
844 ret
= update_image_vgpu9(svga
, surf
, &box
, st
->slice
, transfer
->level
);
845 assert(ret
== PIPE_OK
);
852 svga_texture_transfer_unmap(struct pipe_context
*pipe
,
853 struct pipe_transfer
*transfer
)
855 struct svga_context
*svga
= svga_context(pipe
);
856 struct svga_screen
*ss
= svga_screen(pipe
->screen
);
857 struct svga_winsys_screen
*sws
= ss
->sws
;
858 struct svga_transfer
*st
= svga_transfer(transfer
);
859 struct svga_texture
*tex
= svga_texture(transfer
->resource
);
861 SVGA_STATS_TIME_PUSH(sws
, SVGA_STATS_TIME_TEXTRANSFERUNMAP
);
863 if (!st
->use_direct_map
) {
864 svga_texture_transfer_unmap_dma(svga
, st
);
866 else if (st
->upload
.buf
) {
867 svga_texture_transfer_unmap_upload(svga
, st
);
870 svga_texture_transfer_unmap_direct(svga
, st
);
873 if (st
->base
.usage
& PIPE_TRANSFER_WRITE
) {
874 svga
->hud
.num_resource_updates
++;
876 /* Mark the texture level as dirty */
877 ss
->texture_timestamp
++;
878 svga_age_texture_view(tex
, transfer
->level
);
879 if (transfer
->resource
->target
== PIPE_TEXTURE_CUBE
)
880 svga_define_texture_level(tex
, st
->slice
, transfer
->level
);
882 svga_define_texture_level(tex
, 0, transfer
->level
);
885 pipe_resource_reference(&st
->base
.resource
, NULL
);
887 SVGA_STATS_TIME_POP(sws
);
893 * Does format store depth values?
895 static inline boolean
896 format_has_depth(enum pipe_format format
)
898 const struct util_format_description
*desc
= util_format_description(format
);
899 return util_format_has_depth(desc
);
903 struct u_resource_vtbl svga_texture_vtbl
=
905 svga_texture_get_handle
, /* get_handle */
906 svga_texture_destroy
, /* resource_destroy */
907 svga_texture_transfer_map
, /* transfer_map */
908 u_default_transfer_flush_region
, /* transfer_flush_region */
909 svga_texture_transfer_unmap
, /* transfer_unmap */
913 struct pipe_resource
*
914 svga_texture_create(struct pipe_screen
*screen
,
915 const struct pipe_resource
*template)
917 struct svga_screen
*svgascreen
= svga_screen(screen
);
918 struct svga_texture
*tex
;
919 unsigned bindings
= template->bind
;
921 SVGA_STATS_TIME_PUSH(svgascreen
->sws
,
922 SVGA_STATS_TIME_CREATETEXTURE
);
924 assert(template->last_level
< SVGA_MAX_TEXTURE_LEVELS
);
925 if (template->last_level
>= SVGA_MAX_TEXTURE_LEVELS
) {
929 /* Verify the number of mipmap levels isn't impossibly large. For example,
930 * if the base 2D image is 16x16, we can't have 8 mipmap levels.
931 * The state tracker should never ask us to create a resource with invalid
935 unsigned max_dim
= template->width0
;
937 switch (template->target
) {
938 case PIPE_TEXTURE_1D
:
939 case PIPE_TEXTURE_1D_ARRAY
:
942 case PIPE_TEXTURE_2D
:
943 case PIPE_TEXTURE_CUBE
:
944 case PIPE_TEXTURE_CUBE_ARRAY
:
945 case PIPE_TEXTURE_2D_ARRAY
:
946 max_dim
= MAX2(max_dim
, template->height0
);
948 case PIPE_TEXTURE_3D
:
949 max_dim
= MAX3(max_dim
, template->height0
, template->depth0
);
951 case PIPE_TEXTURE_RECT
:
953 assert(template->last_level
== 0);
954 /* the assertion below should always pass */
957 debug_printf("Unexpected texture target type\n");
959 assert(1 << template->last_level
<= max_dim
);
962 tex
= CALLOC_STRUCT(svga_texture
);
967 tex
->defined
= CALLOC(template->depth0
* template->array_size
,
968 sizeof(tex
->defined
[0]));
974 tex
->rendered_to
= CALLOC(template->depth0
* template->array_size
,
975 sizeof(tex
->rendered_to
[0]));
976 if (!tex
->rendered_to
) {
980 tex
->dirty
= CALLOC(template->depth0
* template->array_size
,
981 sizeof(tex
->dirty
[0]));
986 tex
->b
.b
= *template;
987 tex
->b
.vtbl
= &svga_texture_vtbl
;
988 pipe_reference_init(&tex
->b
.b
.reference
, 1);
989 tex
->b
.b
.screen
= screen
;
992 tex
->key
.size
.width
= template->width0
;
993 tex
->key
.size
.height
= template->height0
;
994 tex
->key
.size
.depth
= template->depth0
;
995 tex
->key
.arraySize
= 1;
996 tex
->key
.numFaces
= 1;
998 /* nr_samples=1 must be treated as a non-multisample texture */
999 if (tex
->b
.b
.nr_samples
== 1) {
1000 tex
->b
.b
.nr_samples
= 0;
1002 else if (tex
->b
.b
.nr_samples
> 1) {
1003 tex
->key
.flags
|= SVGA3D_SURFACE_MASKABLE_ANTIALIAS
;
1006 tex
->key
.sampleCount
= tex
->b
.b
.nr_samples
;
1008 if (svgascreen
->sws
->have_vgpu10
) {
1009 switch (template->target
) {
1010 case PIPE_TEXTURE_1D
:
1011 tex
->key
.flags
|= SVGA3D_SURFACE_1D
;
1013 case PIPE_TEXTURE_1D_ARRAY
:
1014 tex
->key
.flags
|= SVGA3D_SURFACE_1D
;
1016 case PIPE_TEXTURE_2D_ARRAY
:
1017 tex
->key
.flags
|= SVGA3D_SURFACE_ARRAY
;
1018 tex
->key
.arraySize
= template->array_size
;
1020 case PIPE_TEXTURE_3D
:
1021 tex
->key
.flags
|= SVGA3D_SURFACE_VOLUME
;
1023 case PIPE_TEXTURE_CUBE
:
1024 tex
->key
.flags
|= (SVGA3D_SURFACE_CUBEMAP
| SVGA3D_SURFACE_ARRAY
);
1025 tex
->key
.numFaces
= 6;
1027 case PIPE_TEXTURE_CUBE_ARRAY
:
1028 assert(svgascreen
->sws
->have_sm4_1
);
1029 tex
->key
.flags
|= (SVGA3D_SURFACE_CUBEMAP
| SVGA3D_SURFACE_ARRAY
);
1030 tex
->key
.numFaces
= 1; // arraySize already includes the 6 faces
1031 tex
->key
.arraySize
= template->array_size
;
1038 switch (template->target
) {
1039 case PIPE_TEXTURE_3D
:
1040 tex
->key
.flags
|= SVGA3D_SURFACE_VOLUME
;
1042 case PIPE_TEXTURE_CUBE
:
1043 tex
->key
.flags
|= SVGA3D_SURFACE_CUBEMAP
;
1044 tex
->key
.numFaces
= 6;
1051 tex
->key
.cachable
= 1;
1053 if ((bindings
& (PIPE_BIND_RENDER_TARGET
| PIPE_BIND_DEPTH_STENCIL
)) &&
1054 !(bindings
& PIPE_BIND_SAMPLER_VIEW
)) {
1055 /* Also check if the format can be sampled from */
1056 if (screen
->is_format_supported(screen
, template->format
,
1058 template->nr_samples
,
1059 template->nr_storage_samples
,
1060 PIPE_BIND_SAMPLER_VIEW
)) {
1061 bindings
|= PIPE_BIND_SAMPLER_VIEW
;
1065 if (bindings
& PIPE_BIND_SAMPLER_VIEW
) {
1066 tex
->key
.flags
|= SVGA3D_SURFACE_HINT_TEXTURE
;
1067 tex
->key
.flags
|= SVGA3D_SURFACE_BIND_SHADER_RESOURCE
;
1069 if (!(bindings
& PIPE_BIND_RENDER_TARGET
)) {
1070 /* Also check if the format is color renderable */
1071 if (screen
->is_format_supported(screen
, template->format
,
1073 template->nr_samples
,
1074 template->nr_storage_samples
,
1075 PIPE_BIND_RENDER_TARGET
)) {
1076 bindings
|= PIPE_BIND_RENDER_TARGET
;
1080 if (!(bindings
& PIPE_BIND_DEPTH_STENCIL
)) {
1081 /* Also check if the format is depth/stencil renderable */
1082 if (screen
->is_format_supported(screen
, template->format
,
1084 template->nr_samples
,
1085 template->nr_storage_samples
,
1086 PIPE_BIND_DEPTH_STENCIL
)) {
1087 bindings
|= PIPE_BIND_DEPTH_STENCIL
;
1092 if (bindings
& PIPE_BIND_DISPLAY_TARGET
) {
1093 tex
->key
.cachable
= 0;
1096 if (bindings
& PIPE_BIND_SHARED
) {
1097 tex
->key
.cachable
= 0;
1100 if (bindings
& (PIPE_BIND_SCANOUT
| PIPE_BIND_CURSOR
)) {
1101 tex
->key
.scanout
= 1;
1102 tex
->key
.cachable
= 0;
1106 * Note: Previously we never passed the
1107 * SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot
1108 * know beforehand whether a texture will be used as a rendertarget or not
1109 * and it always requests PIPE_BIND_RENDER_TARGET, therefore
1110 * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose.
1112 * However, this was changed since other state trackers
1113 * (XA for example) uses it accurately and certain device versions
1114 * relies on it in certain situations to render correctly.
1116 if ((bindings
& PIPE_BIND_RENDER_TARGET
) &&
1117 !util_format_is_s3tc(template->format
)) {
1118 tex
->key
.flags
|= SVGA3D_SURFACE_HINT_RENDERTARGET
;
1119 tex
->key
.flags
|= SVGA3D_SURFACE_BIND_RENDER_TARGET
;
1122 if (bindings
& PIPE_BIND_DEPTH_STENCIL
) {
1123 tex
->key
.flags
|= SVGA3D_SURFACE_HINT_DEPTHSTENCIL
;
1124 tex
->key
.flags
|= SVGA3D_SURFACE_BIND_DEPTH_STENCIL
;
1127 tex
->key
.numMipLevels
= template->last_level
+ 1;
1129 tex
->key
.format
= svga_translate_format(svgascreen
, template->format
,
1131 if (tex
->key
.format
== SVGA3D_FORMAT_INVALID
) {
1135 /* Use typeless formats for sRGB and depth resources. Typeless
1136 * formats can be reinterpreted as other formats. For example,
1137 * SVGA3D_R8G8B8A8_UNORM_TYPELESS can be interpreted as
1138 * SVGA3D_R8G8B8A8_UNORM_SRGB or SVGA3D_R8G8B8A8_UNORM.
1140 if (svgascreen
->sws
->have_vgpu10
&&
1141 (util_format_is_srgb(template->format
) ||
1142 format_has_depth(template->format
))) {
1143 SVGA3dSurfaceFormat typeless
= svga_typeless_format(tex
->key
.format
);
1145 debug_printf("Convert resource type %s -> %s (bind 0x%x)\n",
1146 svga_format_name(tex
->key
.format
),
1147 svga_format_name(typeless
),
1151 if (svga_format_is_uncompressed_snorm(tex
->key
.format
)) {
1152 /* We can't normally render to snorm surfaces, but once we
1153 * substitute a typeless format, we can if the rendertarget view
1154 * is unorm. This can happen with GL_ARB_copy_image.
1156 tex
->key
.flags
|= SVGA3D_SURFACE_HINT_RENDERTARGET
;
1157 tex
->key
.flags
|= SVGA3D_SURFACE_BIND_RENDER_TARGET
;
1160 tex
->key
.format
= typeless
;
1163 SVGA_DBG(DEBUG_DMA
, "surface_create for texture\n", tex
->handle
);
1164 tex
->handle
= svga_screen_surface_create(svgascreen
, bindings
,
1166 &tex
->validated
, &tex
->key
);
1171 SVGA_DBG(DEBUG_DMA
, " --> got sid %p (texture)\n", tex
->handle
);
1173 debug_reference(&tex
->b
.b
.reference
,
1174 (debug_reference_descriptor
)debug_describe_resource
, 0);
1176 tex
->size
= util_resource_size(template);
1178 /* Determine if texture upload buffer can be used to upload this texture */
1179 tex
->can_use_upload
= svga_texture_transfer_map_can_upload(svgascreen
,
1182 /* Initialize the backing resource cache */
1183 tex
->backed_handle
= NULL
;
1185 svgascreen
->hud
.total_resource_bytes
+= tex
->size
;
1186 svgascreen
->hud
.num_resources
++;
1188 SVGA_STATS_TIME_POP(svgascreen
->sws
);
1195 if (tex
->rendered_to
)
1196 FREE(tex
->rendered_to
);
1201 SVGA_STATS_TIME_POP(svgascreen
->sws
);
1206 struct pipe_resource
*
1207 svga_texture_from_handle(struct pipe_screen
*screen
,
1208 const struct pipe_resource
*template,
1209 struct winsys_handle
*whandle
)
1211 struct svga_winsys_screen
*sws
= svga_winsys_screen(screen
);
1212 struct svga_screen
*ss
= svga_screen(screen
);
1213 struct svga_winsys_surface
*srf
;
1214 struct svga_texture
*tex
;
1215 enum SVGA3dSurfaceFormat format
= 0;
1218 /* Only supports one type */
1219 if ((template->target
!= PIPE_TEXTURE_2D
&&
1220 template->target
!= PIPE_TEXTURE_RECT
) ||
1221 template->last_level
!= 0 ||
1222 template->depth0
!= 1) {
1226 srf
= sws
->surface_from_handle(sws
, whandle
, &format
);
1231 if (!svga_format_is_shareable(ss
, template->format
, format
,
1232 template->bind
, true))
1235 tex
= CALLOC_STRUCT(svga_texture
);
1239 tex
->defined
= CALLOC(template->depth0
* template->array_size
,
1240 sizeof(tex
->defined
[0]));
1242 goto out_no_defined
;
1244 tex
->b
.b
= *template;
1245 tex
->b
.vtbl
= &svga_texture_vtbl
;
1246 pipe_reference_init(&tex
->b
.b
.reference
, 1);
1247 tex
->b
.b
.screen
= screen
;
1249 SVGA_DBG(DEBUG_DMA
, "wrap surface sid %p\n", srf
);
1251 tex
->key
.cachable
= 0;
1252 tex
->key
.format
= format
;
1255 tex
->rendered_to
= CALLOC(1, sizeof(tex
->rendered_to
[0]));
1256 if (!tex
->rendered_to
)
1257 goto out_no_rendered_to
;
1259 tex
->dirty
= CALLOC(1, sizeof(tex
->dirty
[0]));
1263 tex
->imported
= TRUE
;
1265 ss
->hud
.num_resources
++;
1270 FREE(tex
->rendered_to
);
1276 sws
->surface_reference(sws
, &srf
, NULL
);
1281 svga_texture_generate_mipmap(struct pipe_context
*pipe
,
1282 struct pipe_resource
*pt
,
1283 enum pipe_format format
,
1284 unsigned base_level
,
1285 unsigned last_level
,
1286 unsigned first_layer
,
1287 unsigned last_layer
)
1289 struct pipe_sampler_view templ
, *psv
;
1290 struct svga_pipe_sampler_view
*sv
;
1291 struct svga_context
*svga
= svga_context(pipe
);
1292 struct svga_texture
*tex
= svga_texture(pt
);
1293 enum pipe_error ret
;
1295 assert(svga_have_vgpu10(svga
));
1297 /* Only support 2D texture for now */
1298 if (pt
->target
!= PIPE_TEXTURE_2D
)
1301 /* Fallback to the mipmap generation utility for those formats that
1302 * do not support hw generate mipmap
1304 if (!svga_format_support_gen_mips(format
))
1307 /* Make sure the texture surface was created with
1308 * SVGA3D_SURFACE_BIND_RENDER_TARGET
1310 if (!tex
->handle
|| !(tex
->key
.flags
& SVGA3D_SURFACE_BIND_RENDER_TARGET
))
1313 templ
.format
= format
;
1314 templ
.u
.tex
.first_layer
= first_layer
;
1315 templ
.u
.tex
.last_layer
= last_layer
;
1316 templ
.u
.tex
.first_level
= base_level
;
1317 templ
.u
.tex
.last_level
= last_level
;
1319 psv
= pipe
->create_sampler_view(pipe
, pt
, &templ
);
1323 sv
= svga_pipe_sampler_view(psv
);
1324 ret
= svga_validate_pipe_sampler_view(svga
, sv
);
1325 if (ret
!= PIPE_OK
) {
1326 svga_context_flush(svga
, NULL
);
1327 ret
= svga_validate_pipe_sampler_view(svga
, sv
);
1328 assert(ret
== PIPE_OK
);
1331 ret
= SVGA3D_vgpu10_GenMips(svga
->swc
, sv
->id
, tex
->handle
);
1332 if (ret
!= PIPE_OK
) {
1333 svga_context_flush(svga
, NULL
);
1334 ret
= SVGA3D_vgpu10_GenMips(svga
->swc
, sv
->id
, tex
->handle
);
1336 pipe_sampler_view_reference(&psv
, NULL
);
1338 svga
->hud
.num_generate_mipmap
++;
1344 /* texture upload buffer default size in bytes */
1345 #define TEX_UPLOAD_DEFAULT_SIZE (1024 * 1024)
1348 * Create a texture upload buffer
1351 svga_texture_transfer_map_upload_create(struct svga_context
*svga
)
1353 svga
->tex_upload
= u_upload_create(&svga
->pipe
, TEX_UPLOAD_DEFAULT_SIZE
,
1354 0, PIPE_USAGE_STAGING
, 0);
1355 return svga
->tex_upload
!= NULL
;
1360 * Destroy the texture upload buffer
1363 svga_texture_transfer_map_upload_destroy(struct svga_context
*svga
)
1365 u_upload_destroy(svga
->tex_upload
);
1370 * Returns true if this transfer map request can use the upload buffer.
1373 svga_texture_transfer_map_can_upload(const struct svga_screen
*svgascreen
,
1374 const struct pipe_resource
*texture
)
1376 if (svgascreen
->sws
->have_transfer_from_buffer_cmd
== FALSE
)
1379 /* TransferFromBuffer command is not well supported with multi-samples surface */
1380 if (texture
->nr_samples
> 1)
1383 if (util_format_is_compressed(texture
->format
)) {
1384 /* XXX Need to take a closer look to see why texture upload
1385 * with 3D texture with compressed format fails
1387 if (texture
->target
== PIPE_TEXTURE_3D
)
1390 else if (texture
->format
== PIPE_FORMAT_R9G9B9E5_FLOAT
) {
1399 * Use upload buffer for the transfer map request.
1402 svga_texture_transfer_map_upload(struct svga_context
*svga
,
1403 struct svga_transfer
*st
)
1405 struct pipe_resource
*texture
= st
->base
.resource
;
1406 struct pipe_resource
*tex_buffer
= NULL
;
1408 unsigned nblocksx
, nblocksy
;
1410 unsigned upload_size
;
1412 assert(svga
->tex_upload
);
1414 st
->upload
.box
.x
= st
->base
.box
.x
;
1415 st
->upload
.box
.y
= st
->base
.box
.y
;
1416 st
->upload
.box
.z
= st
->base
.box
.z
;
1417 st
->upload
.box
.w
= st
->base
.box
.width
;
1418 st
->upload
.box
.h
= st
->base
.box
.height
;
1419 st
->upload
.box
.d
= st
->base
.box
.depth
;
1420 st
->upload
.nlayers
= 1;
1422 switch (texture
->target
) {
1423 case PIPE_TEXTURE_CUBE
:
1424 st
->upload
.box
.z
= 0;
1426 case PIPE_TEXTURE_2D_ARRAY
:
1427 case PIPE_TEXTURE_CUBE_ARRAY
:
1428 st
->upload
.nlayers
= st
->base
.box
.depth
;
1429 st
->upload
.box
.z
= 0;
1430 st
->upload
.box
.d
= 1;
1432 case PIPE_TEXTURE_1D_ARRAY
:
1433 st
->upload
.nlayers
= st
->base
.box
.depth
;
1434 st
->upload
.box
.y
= st
->upload
.box
.z
= 0;
1435 st
->upload
.box
.d
= 1;
1441 nblocksx
= util_format_get_nblocksx(texture
->format
, st
->base
.box
.width
);
1442 nblocksy
= util_format_get_nblocksy(texture
->format
, st
->base
.box
.height
);
1444 st
->base
.stride
= nblocksx
* util_format_get_blocksize(texture
->format
);
1445 st
->base
.layer_stride
= st
->base
.stride
* nblocksy
;
1447 /* In order to use the TransferFromBuffer command to update the
1448 * texture content from the buffer, the layer stride for a multi-layers
1449 * surface needs to be in multiples of 16 bytes.
1451 if (st
->upload
.nlayers
> 1 && st
->base
.layer_stride
& 15)
1454 upload_size
= st
->base
.layer_stride
* st
->base
.box
.depth
;
1455 upload_size
= align(upload_size
, 16);
1458 if (util_format_is_compressed(texture
->format
)) {
1459 struct svga_texture
*tex
= svga_texture(texture
);
1460 unsigned blockw
, blockh
, bytesPerBlock
;
1462 svga_format_size(tex
->key
.format
, &blockw
, &blockh
, &bytesPerBlock
);
1464 /* dest box must start on block boundary */
1465 assert((st
->base
.box
.x
% blockw
) == 0);
1466 assert((st
->base
.box
.y
% blockh
) == 0);
1470 /* If the upload size exceeds the default buffer size, the
1471 * upload buffer manager code will try to allocate a new buffer
1472 * with the new buffer size.
1474 u_upload_alloc(svga
->tex_upload
, 0, upload_size
, 16,
1475 &offset
, &tex_buffer
, &tex_map
);
1481 st
->upload
.buf
= tex_buffer
;
1482 st
->upload
.map
= tex_map
;
1483 st
->upload
.offset
= offset
;
1490 * Unmap upload map transfer request
1493 svga_texture_transfer_unmap_upload(struct svga_context
*svga
,
1494 struct svga_transfer
*st
)
1496 struct svga_winsys_surface
*srcsurf
;
1497 struct svga_winsys_surface
*dstsurf
;
1498 struct pipe_resource
*texture
= st
->base
.resource
;
1499 struct svga_texture
*tex
= svga_texture(texture
);
1500 enum pipe_error ret
;
1501 unsigned subResource
;
1502 unsigned numMipLevels
;
1504 unsigned offset
= st
->upload
.offset
;
1506 assert(svga
->tex_upload
);
1507 assert(st
->upload
.buf
);
1509 /* unmap the texture upload buffer */
1510 u_upload_unmap(svga
->tex_upload
);
1512 srcsurf
= svga_buffer_handle(svga
, st
->upload
.buf
, 0);
1513 dstsurf
= svga_texture(texture
)->handle
;
1516 numMipLevels
= texture
->last_level
+ 1;
1518 for (i
= 0, layer
= st
->slice
; i
< st
->upload
.nlayers
; i
++, layer
++) {
1519 subResource
= layer
* numMipLevels
+ st
->base
.level
;
1521 /* send a transferFromBuffer command to update the host texture surface */
1522 assert((offset
& 15) == 0);
1524 ret
= SVGA3D_vgpu10_TransferFromBuffer(svga
->swc
, srcsurf
,
1527 st
->base
.layer_stride
,
1528 dstsurf
, subResource
,
1530 if (ret
!= PIPE_OK
) {
1531 svga_context_flush(svga
, NULL
);
1532 ret
= SVGA3D_vgpu10_TransferFromBuffer(svga
->swc
, srcsurf
,
1535 st
->base
.layer_stride
,
1536 dstsurf
, subResource
,
1538 assert(ret
== PIPE_OK
);
1540 offset
+= st
->base
.layer_stride
;
1542 /* Set rendered-to flag */
1543 svga_set_texture_rendered_to(tex
, layer
, st
->base
.level
);
1546 pipe_resource_reference(&st
->upload
.buf
, NULL
);
1550 * Does the device format backing this surface have an
1553 * \param texture[in] The texture whose format we're querying
1554 * \return TRUE if the format has an alpha channel, FALSE otherwise
1556 * For locally created textures, the device (svga) format is typically
1557 * identical to svga_format(texture->format), and we can use the gallium
1558 * format tests to determine whether the device format has an alpha channel
1559 * or not. However, for textures backed by imported svga surfaces that is
1560 * not always true, and we have to look at the SVGA3D utilities.
1563 svga_texture_device_format_has_alpha(struct pipe_resource
*texture
)
1565 /* the svga_texture() call below is invalid for PIPE_BUFFER resources */
1566 assert(texture
->target
!= PIPE_BUFFER
);
1568 enum svga3d_block_desc block_desc
=
1569 svga3dsurface_get_desc(svga_texture(texture
)->key
.format
)->block_desc
;
1571 return !!(block_desc
& SVGA3DBLOCKDESC_ALPHA
);