1 /**********************************************************
2 * Copyright 2008-2009 VMware, Inc. All rights reserved.
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 **********************************************************/
26 #include "svga3d_reg.h"
27 #include "svga3d_surfacedefs.h"
29 #include "pipe/p_state.h"
30 #include "pipe/p_defines.h"
31 #include "os/os_thread.h"
32 #include "util/u_format.h"
33 #include "util/u_inlines.h"
34 #include "util/u_math.h"
35 #include "util/u_memory.h"
36 #include "util/u_resource.h"
37 #include "util/u_upload_mgr.h"
40 #include "svga_format.h"
41 #include "svga_screen.h"
42 #include "svga_context.h"
43 #include "svga_resource_texture.h"
44 #include "svga_resource_buffer.h"
45 #include "svga_sampler_view.h"
46 #include "svga_winsys.h"
47 #include "svga_debug.h"
51 svga_transfer_dma_band(struct svga_context
*svga
,
52 struct svga_transfer
*st
,
53 SVGA3dTransferType transfer
,
54 unsigned x
, unsigned y
, unsigned z
,
55 unsigned w
, unsigned h
, unsigned d
,
56 unsigned srcx
, unsigned srcy
, unsigned srcz
,
57 SVGA3dSurfaceDMAFlags flags
)
59 struct svga_texture
*texture
= svga_texture(st
->base
.resource
);
63 assert(!st
->use_direct_map
);
75 SVGA_DBG(DEBUG_DMA
, "dma %s sid %p, face %u, (%u, %u, %u) - "
76 "(%u, %u, %u), %ubpp\n",
77 transfer
== SVGA3D_WRITE_HOST_VRAM
? "to" : "from",
86 util_format_get_blocksize(texture
->b
.b
.format
) * 8 /
87 (util_format_get_blockwidth(texture
->b
.b
.format
)
88 * util_format_get_blockheight(texture
->b
.b
.format
)));
90 ret
= SVGA3D_SurfaceDMA(svga
->swc
, st
, transfer
, &box
, 1, flags
);
92 svga_context_flush(svga
, NULL
);
93 ret
= SVGA3D_SurfaceDMA(svga
->swc
, st
, transfer
, &box
, 1, flags
);
94 assert(ret
== PIPE_OK
);
100 svga_transfer_dma(struct svga_context
*svga
,
101 struct svga_transfer
*st
,
102 SVGA3dTransferType transfer
,
103 SVGA3dSurfaceDMAFlags flags
)
105 struct svga_texture
*texture
= svga_texture(st
->base
.resource
);
106 struct svga_screen
*screen
= svga_screen(texture
->b
.b
.screen
);
107 struct svga_winsys_screen
*sws
= screen
->sws
;
108 struct pipe_fence_handle
*fence
= NULL
;
110 assert(!st
->use_direct_map
);
112 if (transfer
== SVGA3D_READ_HOST_VRAM
) {
113 SVGA_DBG(DEBUG_PERF
, "%s: readback transfer\n", __FUNCTION__
);
116 /* Ensure any pending operations on host surfaces are queued on the command
119 svga_surfaces_flush( svga
);
122 /* Do the DMA transfer in a single go */
123 svga_transfer_dma_band(svga
, st
, transfer
,
124 st
->base
.box
.x
, st
->base
.box
.y
, st
->base
.box
.z
,
125 st
->base
.box
.width
, st
->base
.box
.height
, st
->base
.box
.depth
,
129 if (transfer
== SVGA3D_READ_HOST_VRAM
) {
130 svga_context_flush(svga
, &fence
);
131 sws
->fence_finish(sws
, fence
, 0);
132 sws
->fence_reference(sws
, &fence
, NULL
);
137 unsigned blockheight
=
138 util_format_get_blockheight(st
->base
.resource
->format
);
140 h
= st
->hw_nblocksy
* blockheight
;
143 for (y
= 0; y
< st
->base
.box
.height
; y
+= h
) {
144 unsigned offset
, length
;
147 if (y
+ h
> st
->base
.box
.height
)
148 h
= st
->base
.box
.height
- y
;
150 /* Transfer band must be aligned to pixel block boundaries */
151 assert(y
% blockheight
== 0);
152 assert(h
% blockheight
== 0);
154 offset
= y
* st
->base
.stride
/ blockheight
;
155 length
= h
* st
->base
.stride
/ blockheight
;
157 sw
= (uint8_t *) st
->swbuf
+ offset
;
159 if (transfer
== SVGA3D_WRITE_HOST_VRAM
) {
160 unsigned usage
= PIPE_TRANSFER_WRITE
;
162 /* Wait for the previous DMAs to complete */
163 /* TODO: keep one DMA (at half the size) in the background */
165 svga_context_flush(svga
, NULL
);
166 usage
|= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
;
169 hw
= sws
->buffer_map(sws
, st
->hwbuf
, usage
);
172 memcpy(hw
, sw
, length
);
173 sws
->buffer_unmap(sws
, st
->hwbuf
);
177 svga_transfer_dma_band(svga
, st
, transfer
,
178 st
->base
.box
.x
, y
, st
->base
.box
.z
,
179 st
->base
.box
.width
, h
, st
->base
.box
.depth
,
183 * Prevent the texture contents to be discarded on the next band
186 flags
.discard
= FALSE
;
188 if (transfer
== SVGA3D_READ_HOST_VRAM
) {
189 svga_context_flush(svga
, &fence
);
190 sws
->fence_finish(sws
, fence
, 0);
192 hw
= sws
->buffer_map(sws
, st
->hwbuf
, PIPE_TRANSFER_READ
);
195 memcpy(sw
, hw
, length
);
196 sws
->buffer_unmap(sws
, st
->hwbuf
);
206 svga_texture_get_handle(struct pipe_screen
*screen
,
207 struct pipe_resource
*texture
,
208 struct winsys_handle
*whandle
)
210 struct svga_winsys_screen
*sws
= svga_winsys_screen(texture
->screen
);
213 assert(svga_texture(texture
)->key
.cachable
== 0);
214 svga_texture(texture
)->key
.cachable
= 0;
216 stride
= util_format_get_nblocksx(texture
->format
, texture
->width0
) *
217 util_format_get_blocksize(texture
->format
);
219 return sws
->surface_get_handle(sws
, svga_texture(texture
)->handle
,
225 svga_texture_destroy(struct pipe_screen
*screen
,
226 struct pipe_resource
*pt
)
228 struct svga_screen
*ss
= svga_screen(screen
);
229 struct svga_texture
*tex
= svga_texture(pt
);
231 ss
->texture_timestamp
++;
233 svga_sampler_view_reference(&tex
->cached_view
, NULL
);
236 DBG("%s deleting %p\n", __FUNCTION__, (void *) tex);
238 SVGA_DBG(DEBUG_DMA
, "unref sid %p (texture)\n", tex
->handle
);
239 svga_screen_surface_destroy(ss
, &tex
->key
, &tex
->handle
);
241 ss
->hud
.total_resource_bytes
-= tex
->size
;
244 FREE(tex
->rendered_to
);
248 assert(ss
->hud
.num_resources
> 0);
249 if (ss
->hud
.num_resources
> 0)
250 ss
->hud
.num_resources
--;
255 * Determine if we need to read back a texture image before mapping it.
258 need_tex_readback(struct pipe_transfer
*transfer
)
260 struct svga_texture
*t
= svga_texture(transfer
->resource
);
262 if (transfer
->usage
& PIPE_TRANSFER_READ
)
265 if ((transfer
->usage
& PIPE_TRANSFER_WRITE
) &&
266 ((transfer
->usage
& PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
) == 0)) {
269 if (transfer
->resource
->target
== PIPE_TEXTURE_CUBE
) {
270 assert(transfer
->box
.depth
== 1);
271 face
= transfer
->box
.z
;
276 if (svga_was_texture_rendered_to(t
, face
, transfer
->level
)) {
285 static enum pipe_error
286 readback_image_vgpu9(struct svga_context
*svga
,
287 struct svga_winsys_surface
*surf
,
293 ret
= SVGA3D_ReadbackGBImage(svga
->swc
, surf
, slice
, level
);
294 if (ret
!= PIPE_OK
) {
295 svga_context_flush(svga
, NULL
);
296 ret
= SVGA3D_ReadbackGBImage(svga
->swc
, surf
, slice
, level
);
302 static enum pipe_error
303 readback_image_vgpu10(struct svga_context
*svga
,
304 struct svga_winsys_surface
*surf
,
307 unsigned numMipLevels
)
310 unsigned subResource
;
312 subResource
= slice
* numMipLevels
+ level
;
313 ret
= SVGA3D_vgpu10_ReadbackSubResource(svga
->swc
, surf
, subResource
);
314 if (ret
!= PIPE_OK
) {
315 svga_context_flush(svga
, NULL
);
316 ret
= SVGA3D_vgpu10_ReadbackSubResource(svga
->swc
, surf
, subResource
);
323 * Use DMA for the transfer request
326 svga_texture_transfer_map_dma(struct svga_context
*svga
,
327 struct svga_transfer
*st
)
329 struct svga_winsys_screen
*sws
= svga_screen(svga
->pipe
.screen
)->sws
;
330 struct pipe_resource
*texture
= st
->base
.resource
;
331 unsigned nblocksx
, nblocksy
;
333 unsigned usage
= st
->base
.usage
;
335 /* we'll put the data into a tightly packed buffer */
336 nblocksx
= util_format_get_nblocksx(texture
->format
, st
->base
.box
.width
);
337 nblocksy
= util_format_get_nblocksy(texture
->format
, st
->base
.box
.height
);
338 d
= st
->base
.box
.depth
;
340 st
->base
.stride
= nblocksx
*util_format_get_blocksize(texture
->format
);
341 st
->base
.layer_stride
= st
->base
.stride
* nblocksy
;
342 st
->hw_nblocksy
= nblocksy
;
344 st
->hwbuf
= svga_winsys_buffer_create(svga
, 1, 0,
345 st
->hw_nblocksy
* st
->base
.stride
* d
);
347 while (!st
->hwbuf
&& (st
->hw_nblocksy
/= 2)) {
349 svga_winsys_buffer_create(svga
, 1, 0,
350 st
->hw_nblocksy
* st
->base
.stride
* d
);
356 if (st
->hw_nblocksy
< nblocksy
) {
357 /* We couldn't allocate a hardware buffer big enough for the transfer,
358 * so allocate regular malloc memory instead
361 debug_printf("%s: failed to allocate %u KB of DMA, "
362 "splitting into %u x %u KB DMA transfers\n",
364 (nblocksy
* st
->base
.stride
+ 1023) / 1024,
365 (nblocksy
+ st
->hw_nblocksy
- 1) / st
->hw_nblocksy
,
366 (st
->hw_nblocksy
* st
->base
.stride
+ 1023) / 1024);
369 st
->swbuf
= MALLOC(nblocksy
* st
->base
.stride
* d
);
371 sws
->buffer_destroy(sws
, st
->hwbuf
);
376 if (usage
& PIPE_TRANSFER_READ
) {
377 SVGA3dSurfaceDMAFlags flags
;
378 memset(&flags
, 0, sizeof flags
);
379 svga_transfer_dma(svga
, st
, SVGA3D_READ_HOST_VRAM
, flags
);
386 return sws
->buffer_map(sws
, st
->hwbuf
, usage
);
392 * Use direct map for the transfer request
395 svga_texture_transfer_map_direct(struct svga_context
*svga
,
396 struct svga_transfer
*st
)
398 struct svga_winsys_screen
*sws
= svga_screen(svga
->pipe
.screen
)->sws
;
399 struct pipe_transfer
*transfer
= &st
->base
;
400 struct pipe_resource
*texture
= transfer
->resource
;
401 struct svga_texture
*tex
= svga_texture(texture
);
402 struct svga_winsys_surface
*surf
= tex
->handle
;
403 unsigned level
= st
->base
.level
;
404 unsigned w
, h
, nblocksx
, nblocksy
;
405 unsigned usage
= st
->base
.usage
;
407 /* we'll directly access the guest-backed surface */
408 w
= u_minify(texture
->width0
, level
);
409 h
= u_minify(texture
->height0
, level
);
410 nblocksx
= util_format_get_nblocksx(texture
->format
, w
);
411 nblocksy
= util_format_get_nblocksy(texture
->format
, h
);
412 st
->hw_nblocksy
= nblocksy
;
413 st
->base
.stride
= nblocksx
*util_format_get_blocksize(texture
->format
);
414 st
->base
.layer_stride
= st
->base
.stride
* nblocksy
;
416 if (need_tex_readback(transfer
)) {
419 svga_surfaces_flush(svga
);
421 if (svga_have_vgpu10(svga
)) {
422 ret
= readback_image_vgpu10(svga
, surf
, st
->slice
, level
,
423 tex
->b
.b
.last_level
+ 1);
425 ret
= readback_image_vgpu9(svga
, surf
, st
->slice
, level
);
428 svga
->hud
.num_readbacks
++;
429 SVGA_STATS_COUNT_INC(sws
, SVGA_STATS_COUNT_TEXREADBACK
);
431 assert(ret
== PIPE_OK
);
434 svga_context_flush(svga
, NULL
);
437 * Note: if PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE were specified
438 * we could potentially clear the flag for all faces/layers/mips.
440 svga_clear_texture_rendered_to(tex
, st
->slice
, level
);
443 assert(usage
& PIPE_TRANSFER_WRITE
);
444 if ((usage
& PIPE_TRANSFER_UNSYNCHRONIZED
) == 0) {
445 if (svga_is_texture_dirty(tex
, st
->slice
, level
)) {
447 * do a surface flush if the subresource has been modified
448 * in this command buffer.
450 svga_surfaces_flush(svga
);
451 if (!sws
->surface_is_flushed(sws
, surf
)) {
452 svga
->hud
.surface_write_flushes
++;
453 SVGA_STATS_COUNT_INC(sws
, SVGA_STATS_COUNT_SURFACEWRITEFLUSH
);
454 svga_context_flush(svga
, NULL
);
464 SVGA3dSize baseLevelSize
;
467 unsigned offset
, mip_width
, mip_height
;
469 map
= svga
->swc
->surface_map(svga
->swc
, surf
, usage
, &retry
);
470 if (map
== NULL
&& retry
) {
472 * At this point, the svga_surfaces_flush() should already have
473 * called in svga_texture_get_transfer().
475 svga
->hud
.surface_write_flushes
++;
476 svga_context_flush(svga
, NULL
);
477 map
= svga
->swc
->surface_map(svga
->swc
, surf
, usage
, &retry
);
481 * Make sure we return NULL if the map fails
488 * Compute the offset to the specific texture slice in the buffer.
490 baseLevelSize
.width
= tex
->b
.b
.width0
;
491 baseLevelSize
.height
= tex
->b
.b
.height0
;
492 baseLevelSize
.depth
= tex
->b
.b
.depth0
;
494 if ((tex
->b
.b
.target
== PIPE_TEXTURE_1D_ARRAY
) ||
495 (tex
->b
.b
.target
== PIPE_TEXTURE_2D_ARRAY
)) {
496 st
->base
.layer_stride
=
497 svga3dsurface_get_image_offset(tex
->key
.format
, baseLevelSize
,
498 tex
->b
.b
.last_level
+ 1, 1, 0);
501 offset
= svga3dsurface_get_image_offset(tex
->key
.format
, baseLevelSize
,
502 tex
->b
.b
.last_level
+ 1, /* numMips */
508 mip_width
= u_minify(tex
->b
.b
.width0
, level
);
509 mip_height
= u_minify(tex
->b
.b
.height0
, level
);
511 offset
+= svga3dsurface_get_pixel_offset(tex
->key
.format
,
512 mip_width
, mip_height
,
517 return (void *) (map
+ offset
);
523 * Request a transfer map to the texture resource
526 svga_texture_transfer_map(struct pipe_context
*pipe
,
527 struct pipe_resource
*texture
,
530 const struct pipe_box
*box
,
531 struct pipe_transfer
**ptransfer
)
533 struct svga_context
*svga
= svga_context(pipe
);
534 struct svga_winsys_screen
*sws
= svga_screen(pipe
->screen
)->sws
;
535 struct svga_texture
*tex
= svga_texture(texture
);
536 struct svga_transfer
*st
;
537 struct svga_winsys_surface
*surf
= tex
->handle
;
538 boolean use_direct_map
= svga_have_gb_objects(svga
) &&
539 !svga_have_gb_dma(svga
);
541 int64_t begin
= svga_get_time(svga
);
543 SVGA_STATS_TIME_PUSH(sws
, SVGA_STATS_TIME_TEXTRANSFERMAP
);
548 /* We can't map texture storage directly unless we have GB objects */
549 if (usage
& PIPE_TRANSFER_MAP_DIRECTLY
) {
550 if (svga_have_gb_objects(svga
))
551 use_direct_map
= TRUE
;
556 st
= CALLOC_STRUCT(svga_transfer
);
560 st
->base
.level
= level
;
561 st
->base
.usage
= usage
;
564 switch (tex
->b
.b
.target
) {
565 case PIPE_TEXTURE_CUBE
:
566 st
->slice
= st
->base
.box
.z
;
567 st
->base
.box
.z
= 0; /* so we don't apply double offsets below */
569 case PIPE_TEXTURE_2D_ARRAY
:
570 case PIPE_TEXTURE_1D_ARRAY
:
571 st
->slice
= st
->base
.box
.z
;
572 st
->base
.box
.z
= 0; /* so we don't apply double offsets below */
574 /* Force direct map for transfering multiple slices */
575 if (st
->base
.box
.depth
> 1)
576 use_direct_map
= svga_have_gb_objects(svga
);
584 st
->use_direct_map
= use_direct_map
;
585 pipe_resource_reference(&st
->base
.resource
, texture
);
587 /* If this is the first time mapping to the surface in this
588 * command buffer, clear the dirty masks of this surface.
590 if (sws
->surface_is_flushed(sws
, surf
)) {
591 svga_clear_texture_dirty(tex
);
594 if (!use_direct_map
) {
595 /* upload to the DMA buffer */
596 map
= svga_texture_transfer_map_dma(svga
, st
);
599 if (svga_texture_transfer_map_can_upload(svga
, st
)) {
600 /* upload to the texture upload buffer */
601 map
= svga_texture_transfer_map_upload(svga
, st
);
605 /* map directly to the GBS surface */
606 map
= svga_texture_transfer_map_direct(svga
, st
);
614 *ptransfer
= &st
->base
;
615 svga
->hud
.num_textures_mapped
++;
616 if (usage
& PIPE_TRANSFER_WRITE
) {
617 /* record texture upload for HUD */
618 svga
->hud
.num_bytes_uploaded
+=
619 st
->base
.layer_stride
* st
->base
.box
.depth
;
621 /* mark this texture level as dirty */
622 svga_set_texture_dirty(tex
, st
->slice
, level
);
627 svga
->hud
.map_buffer_time
+= (svga_get_time(svga
) - begin
);
628 SVGA_STATS_TIME_POP(sws
);
635 * Unmap a GB texture surface.
638 svga_texture_surface_unmap(struct svga_context
*svga
,
639 struct pipe_transfer
*transfer
)
641 struct svga_winsys_surface
*surf
= svga_texture(transfer
->resource
)->handle
;
642 struct svga_winsys_context
*swc
= svga
->swc
;
647 swc
->surface_unmap(swc
, surf
, &rebind
);
650 ret
= SVGA3D_BindGBSurface(swc
, surf
);
651 if (ret
!= PIPE_OK
) {
652 /* flush and retry */
653 svga_context_flush(svga
, NULL
);
654 ret
= SVGA3D_BindGBSurface(swc
, surf
);
655 assert(ret
== PIPE_OK
);
661 static enum pipe_error
662 update_image_vgpu9(struct svga_context
*svga
,
663 struct svga_winsys_surface
*surf
,
664 const SVGA3dBox
*box
,
670 ret
= SVGA3D_UpdateGBImage(svga
->swc
, surf
, box
, slice
, level
);
671 if (ret
!= PIPE_OK
) {
672 svga_context_flush(svga
, NULL
);
673 ret
= SVGA3D_UpdateGBImage(svga
->swc
, surf
, box
, slice
, level
);
679 static enum pipe_error
680 update_image_vgpu10(struct svga_context
*svga
,
681 struct svga_winsys_surface
*surf
,
682 const SVGA3dBox
*box
,
685 unsigned numMipLevels
)
688 unsigned subResource
;
690 subResource
= slice
* numMipLevels
+ level
;
691 ret
= SVGA3D_vgpu10_UpdateSubResource(svga
->swc
, surf
, box
, subResource
);
692 if (ret
!= PIPE_OK
) {
693 svga_context_flush(svga
, NULL
);
694 ret
= SVGA3D_vgpu10_UpdateSubResource(svga
->swc
, surf
, box
, subResource
);
701 * unmap DMA transfer request
704 svga_texture_transfer_unmap_dma(struct svga_context
*svga
,
705 struct svga_transfer
*st
)
707 struct svga_winsys_screen
*sws
= svga_screen(svga
->pipe
.screen
)->sws
;
710 sws
->buffer_unmap(sws
, st
->hwbuf
);
712 if (st
->base
.usage
& PIPE_TRANSFER_WRITE
) {
713 /* Use DMA to transfer texture data */
714 SVGA3dSurfaceDMAFlags flags
;
716 memset(&flags
, 0, sizeof flags
);
717 if (st
->base
.usage
& PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
) {
718 flags
.discard
= TRUE
;
720 if (st
->base
.usage
& PIPE_TRANSFER_UNSYNCHRONIZED
) {
721 flags
.unsynchronized
= TRUE
;
724 svga_transfer_dma(svga
, st
, SVGA3D_WRITE_HOST_VRAM
, flags
);
728 sws
->buffer_destroy(sws
, st
->hwbuf
);
733 * unmap direct map transfer request
736 svga_texture_transfer_unmap_direct(struct svga_context
*svga
,
737 struct svga_transfer
*st
)
739 struct pipe_transfer
*transfer
= &st
->base
;
740 struct svga_texture
*tex
= svga_texture(transfer
->resource
);
742 svga_texture_surface_unmap(svga
, transfer
);
744 /* Now send an update command to update the content in the backend. */
745 if (st
->base
.usage
& PIPE_TRANSFER_WRITE
) {
746 struct svga_winsys_surface
*surf
= tex
->handle
;
749 unsigned nlayers
= 1;
751 assert(svga_have_gb_objects(svga
));
753 /* update the effected region */
754 box
.x
= transfer
->box
.x
;
755 box
.y
= transfer
->box
.y
;
756 box
.w
= transfer
->box
.width
;
757 box
.h
= transfer
->box
.height
;
758 box
.d
= transfer
->box
.depth
;
760 switch (tex
->b
.b
.target
) {
761 case PIPE_TEXTURE_CUBE
:
764 case PIPE_TEXTURE_2D_ARRAY
:
769 case PIPE_TEXTURE_1D_ARRAY
:
775 box
.z
= transfer
->box
.z
;
780 debug_printf("%s %d, %d, %d %d x %d x %d\n",
783 box
.w
, box
.h
, box
.d
);
785 if (svga_have_vgpu10(svga
)) {
787 for (i
= 0; i
< nlayers
; i
++) {
788 ret
= update_image_vgpu10(svga
, surf
, &box
,
789 st
->slice
+ i
, transfer
->level
,
790 tex
->b
.b
.last_level
+ 1);
791 assert(ret
== PIPE_OK
);
794 assert(nlayers
== 1);
795 ret
= update_image_vgpu9(svga
, surf
, &box
, st
->slice
, transfer
->level
);
796 assert(ret
== PIPE_OK
);
803 svga_texture_transfer_unmap(struct pipe_context
*pipe
,
804 struct pipe_transfer
*transfer
)
806 struct svga_context
*svga
= svga_context(pipe
);
807 struct svga_screen
*ss
= svga_screen(pipe
->screen
);
808 struct svga_winsys_screen
*sws
= ss
->sws
;
809 struct svga_transfer
*st
= svga_transfer(transfer
);
810 struct svga_texture
*tex
= svga_texture(transfer
->resource
);
812 SVGA_STATS_TIME_PUSH(sws
, SVGA_STATS_TIME_TEXTRANSFERUNMAP
);
814 if (!st
->use_direct_map
) {
815 svga_texture_transfer_unmap_dma(svga
, st
);
817 else if (st
->upload
.buf
) {
818 svga_texture_transfer_unmap_upload(svga
, st
);
821 svga_texture_transfer_unmap_direct(svga
, st
);
824 if (st
->base
.usage
& PIPE_TRANSFER_WRITE
) {
825 svga
->hud
.num_resource_updates
++;
827 /* Mark the texture level as dirty */
828 ss
->texture_timestamp
++;
829 svga_age_texture_view(tex
, transfer
->level
);
830 if (transfer
->resource
->target
== PIPE_TEXTURE_CUBE
)
831 svga_define_texture_level(tex
, st
->slice
, transfer
->level
);
833 svga_define_texture_level(tex
, 0, transfer
->level
);
836 pipe_resource_reference(&st
->base
.resource
, NULL
);
838 SVGA_STATS_TIME_POP(sws
);
844 * Does format store depth values?
846 static inline boolean
847 format_has_depth(enum pipe_format format
)
849 const struct util_format_description
*desc
= util_format_description(format
);
850 return util_format_has_depth(desc
);
854 struct u_resource_vtbl svga_texture_vtbl
=
856 svga_texture_get_handle
, /* get_handle */
857 svga_texture_destroy
, /* resource_destroy */
858 svga_texture_transfer_map
, /* transfer_map */
859 u_default_transfer_flush_region
, /* transfer_flush_region */
860 svga_texture_transfer_unmap
, /* transfer_unmap */
864 struct pipe_resource
*
865 svga_texture_create(struct pipe_screen
*screen
,
866 const struct pipe_resource
*template)
868 struct svga_screen
*svgascreen
= svga_screen(screen
);
869 struct svga_texture
*tex
;
870 unsigned bindings
= template->bind
;
872 SVGA_STATS_TIME_PUSH(svgascreen
->sws
,
873 SVGA_STATS_TIME_CREATETEXTURE
);
875 assert(template->last_level
< SVGA_MAX_TEXTURE_LEVELS
);
876 if (template->last_level
>= SVGA_MAX_TEXTURE_LEVELS
) {
880 tex
= CALLOC_STRUCT(svga_texture
);
885 tex
->defined
= CALLOC(template->depth0
* template->array_size
,
886 sizeof(tex
->defined
[0]));
892 tex
->rendered_to
= CALLOC(template->depth0
* template->array_size
,
893 sizeof(tex
->rendered_to
[0]));
894 if (!tex
->rendered_to
) {
898 tex
->dirty
= CALLOC(template->depth0
* template->array_size
,
899 sizeof(tex
->dirty
[0]));
904 tex
->b
.b
= *template;
905 tex
->b
.vtbl
= &svga_texture_vtbl
;
906 pipe_reference_init(&tex
->b
.b
.reference
, 1);
907 tex
->b
.b
.screen
= screen
;
910 tex
->key
.size
.width
= template->width0
;
911 tex
->key
.size
.height
= template->height0
;
912 tex
->key
.size
.depth
= template->depth0
;
913 tex
->key
.arraySize
= 1;
914 tex
->key
.numFaces
= 1;
916 /* single sample texture can be treated as non-multisamples texture */
917 tex
->key
.sampleCount
= template->nr_samples
> 1 ? template->nr_samples
: 0;
919 if (template->nr_samples
> 1) {
920 tex
->key
.flags
|= SVGA3D_SURFACE_MASKABLE_ANTIALIAS
;
923 if (svgascreen
->sws
->have_vgpu10
) {
924 switch (template->target
) {
925 case PIPE_TEXTURE_1D
:
926 tex
->key
.flags
|= SVGA3D_SURFACE_1D
;
928 case PIPE_TEXTURE_1D_ARRAY
:
929 tex
->key
.flags
|= SVGA3D_SURFACE_1D
;
931 case PIPE_TEXTURE_2D_ARRAY
:
932 tex
->key
.flags
|= SVGA3D_SURFACE_ARRAY
;
933 tex
->key
.arraySize
= template->array_size
;
935 case PIPE_TEXTURE_3D
:
936 tex
->key
.flags
|= SVGA3D_SURFACE_VOLUME
;
938 case PIPE_TEXTURE_CUBE
:
939 tex
->key
.flags
|= (SVGA3D_SURFACE_CUBEMAP
| SVGA3D_SURFACE_ARRAY
);
940 tex
->key
.numFaces
= 6;
947 switch (template->target
) {
948 case PIPE_TEXTURE_3D
:
949 tex
->key
.flags
|= SVGA3D_SURFACE_VOLUME
;
951 case PIPE_TEXTURE_CUBE
:
952 tex
->key
.flags
|= SVGA3D_SURFACE_CUBEMAP
;
953 tex
->key
.numFaces
= 6;
960 tex
->key
.cachable
= 1;
962 if ((bindings
& (PIPE_BIND_RENDER_TARGET
| PIPE_BIND_DEPTH_STENCIL
)) &&
963 !(bindings
& PIPE_BIND_SAMPLER_VIEW
)) {
964 /* Also check if the format can be sampled from */
965 if (screen
->is_format_supported(screen
, template->format
,
967 template->nr_samples
,
968 PIPE_BIND_SAMPLER_VIEW
)) {
969 bindings
|= PIPE_BIND_SAMPLER_VIEW
;
973 if (bindings
& PIPE_BIND_SAMPLER_VIEW
) {
974 tex
->key
.flags
|= SVGA3D_SURFACE_HINT_TEXTURE
;
975 tex
->key
.flags
|= SVGA3D_SURFACE_BIND_SHADER_RESOURCE
;
977 if (!(bindings
& PIPE_BIND_RENDER_TARGET
)) {
978 /* Also check if the format is color renderable */
979 if (screen
->is_format_supported(screen
, template->format
,
981 template->nr_samples
,
982 PIPE_BIND_RENDER_TARGET
)) {
983 bindings
|= PIPE_BIND_RENDER_TARGET
;
987 if (!(bindings
& PIPE_BIND_DEPTH_STENCIL
)) {
988 /* Also check if the format is depth/stencil renderable */
989 if (screen
->is_format_supported(screen
, template->format
,
991 template->nr_samples
,
992 PIPE_BIND_DEPTH_STENCIL
)) {
993 bindings
|= PIPE_BIND_DEPTH_STENCIL
;
998 if (bindings
& PIPE_BIND_DISPLAY_TARGET
) {
999 tex
->key
.cachable
= 0;
1002 if (bindings
& PIPE_BIND_SHARED
) {
1003 tex
->key
.cachable
= 0;
1006 if (bindings
& (PIPE_BIND_SCANOUT
| PIPE_BIND_CURSOR
)) {
1007 tex
->key
.scanout
= 1;
1008 tex
->key
.cachable
= 0;
1012 * Note: Previously we never passed the
1013 * SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot
1014 * know beforehand whether a texture will be used as a rendertarget or not
1015 * and it always requests PIPE_BIND_RENDER_TARGET, therefore
1016 * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose.
1018 * However, this was changed since other state trackers
1019 * (XA for example) uses it accurately and certain device versions
1020 * relies on it in certain situations to render correctly.
1022 if ((bindings
& PIPE_BIND_RENDER_TARGET
) &&
1023 !util_format_is_s3tc(template->format
)) {
1024 tex
->key
.flags
|= SVGA3D_SURFACE_HINT_RENDERTARGET
;
1025 tex
->key
.flags
|= SVGA3D_SURFACE_BIND_RENDER_TARGET
;
1028 if (bindings
& PIPE_BIND_DEPTH_STENCIL
) {
1029 tex
->key
.flags
|= SVGA3D_SURFACE_HINT_DEPTHSTENCIL
;
1030 tex
->key
.flags
|= SVGA3D_SURFACE_BIND_DEPTH_STENCIL
;
1033 tex
->key
.numMipLevels
= template->last_level
+ 1;
1035 tex
->key
.format
= svga_translate_format(svgascreen
, template->format
,
1037 if (tex
->key
.format
== SVGA3D_FORMAT_INVALID
) {
1041 /* The actual allocation is done with a typeless format. Typeless
1042 * formats can be reinterpreted as other formats. For example,
1043 * SVGA3D_R8G8B8A8_UNORM_TYPELESS can be interpreted as
1044 * SVGA3D_R8G8B8A8_UNORM_SRGB or SVGA3D_R8G8B8A8_UNORM.
1045 * Do not use typeless formats for SHARED, DISPLAY_TARGET or SCANOUT
1048 if (svgascreen
->sws
->have_vgpu10
1049 && ((bindings
& (PIPE_BIND_SHARED
|
1050 PIPE_BIND_DISPLAY_TARGET
|
1051 PIPE_BIND_SCANOUT
)) == 0)) {
1052 SVGA3dSurfaceFormat typeless
= svga_typeless_format(tex
->key
.format
);
1054 debug_printf("Convert resource type %s -> %s (bind 0x%x)\n",
1055 svga_format_name(tex
->key
.format
),
1056 svga_format_name(typeless
),
1060 if (svga_format_is_uncompressed_snorm(tex
->key
.format
)) {
1061 /* We can't normally render to snorm surfaces, but once we
1062 * substitute a typeless format, we can if the rendertarget view
1063 * is unorm. This can happen with GL_ARB_copy_image.
1065 tex
->key
.flags
|= SVGA3D_SURFACE_HINT_RENDERTARGET
;
1066 tex
->key
.flags
|= SVGA3D_SURFACE_BIND_RENDER_TARGET
;
1069 tex
->key
.format
= typeless
;
1072 SVGA_DBG(DEBUG_DMA
, "surface_create for texture\n", tex
->handle
);
1073 tex
->handle
= svga_screen_surface_create(svgascreen
, bindings
,
1074 tex
->b
.b
.usage
, &tex
->key
);
1079 SVGA_DBG(DEBUG_DMA
, " --> got sid %p (texture)\n", tex
->handle
);
1081 debug_reference(&tex
->b
.b
.reference
,
1082 (debug_reference_descriptor
)debug_describe_resource
, 0);
1084 tex
->size
= util_resource_size(template);
1085 svgascreen
->hud
.total_resource_bytes
+= tex
->size
;
1086 svgascreen
->hud
.num_resources
++;
1088 SVGA_STATS_TIME_POP(svgascreen
->sws
);
1095 if (tex
->rendered_to
)
1096 FREE(tex
->rendered_to
);
1101 SVGA_STATS_TIME_POP(svgascreen
->sws
);
1106 struct pipe_resource
*
1107 svga_texture_from_handle(struct pipe_screen
*screen
,
1108 const struct pipe_resource
*template,
1109 struct winsys_handle
*whandle
)
1111 struct svga_winsys_screen
*sws
= svga_winsys_screen(screen
);
1112 struct svga_screen
*ss
= svga_screen(screen
);
1113 struct svga_winsys_surface
*srf
;
1114 struct svga_texture
*tex
;
1115 enum SVGA3dSurfaceFormat format
= 0;
1118 /* Only supports one type */
1119 if ((template->target
!= PIPE_TEXTURE_2D
&&
1120 template->target
!= PIPE_TEXTURE_RECT
) ||
1121 template->last_level
!= 0 ||
1122 template->depth0
!= 1) {
1126 srf
= sws
->surface_from_handle(sws
, whandle
, &format
);
1131 if (svga_translate_format(svga_screen(screen
), template->format
,
1132 template->bind
) != format
) {
1133 unsigned f1
= svga_translate_format(svga_screen(screen
),
1134 template->format
, template->bind
);
1135 unsigned f2
= format
;
1137 /* It's okay for XRGB and ARGB or depth with/out stencil to get mixed up.
1139 if (f1
== SVGA3D_B8G8R8A8_UNORM
)
1140 f1
= SVGA3D_A8R8G8B8
;
1141 if (f1
== SVGA3D_B8G8R8X8_UNORM
)
1142 f1
= SVGA3D_X8R8G8B8
;
1144 if ( !( (f1
== f2
) ||
1145 (f1
== SVGA3D_X8R8G8B8
&& f2
== SVGA3D_A8R8G8B8
) ||
1146 (f1
== SVGA3D_X8R8G8B8
&& f2
== SVGA3D_B8G8R8X8_UNORM
) ||
1147 (f1
== SVGA3D_A8R8G8B8
&& f2
== SVGA3D_X8R8G8B8
) ||
1148 (f1
== SVGA3D_A8R8G8B8
&& f2
== SVGA3D_B8G8R8A8_UNORM
) ||
1149 (f1
== SVGA3D_Z_D24X8
&& f2
== SVGA3D_Z_D24S8
) ||
1150 (f1
== SVGA3D_Z_DF24
&& f2
== SVGA3D_Z_D24S8_INT
) ) ) {
1151 debug_printf("%s wrong format %s != %s\n", __FUNCTION__
,
1152 svga_format_name(f1
), svga_format_name(f2
));
1157 tex
= CALLOC_STRUCT(svga_texture
);
1161 tex
->defined
= CALLOC(template->depth0
* template->array_size
,
1162 sizeof(tex
->defined
[0]));
1163 if (!tex
->defined
) {
1168 tex
->b
.b
= *template;
1169 tex
->b
.vtbl
= &svga_texture_vtbl
;
1170 pipe_reference_init(&tex
->b
.b
.reference
, 1);
1171 tex
->b
.b
.screen
= screen
;
1173 SVGA_DBG(DEBUG_DMA
, "wrap surface sid %p\n", srf
);
1175 tex
->key
.cachable
= 0;
1176 tex
->key
.format
= format
;
1179 tex
->rendered_to
= CALLOC(1, sizeof(tex
->rendered_to
[0]));
1180 if (!tex
->rendered_to
)
1183 tex
->dirty
= CALLOC(1, sizeof(tex
->dirty
[0]));
1187 tex
->imported
= TRUE
;
1189 ss
->hud
.num_resources
++;
1196 if (tex
->rendered_to
)
1197 FREE(tex
->rendered_to
);
1205 svga_texture_generate_mipmap(struct pipe_context
*pipe
,
1206 struct pipe_resource
*pt
,
1207 enum pipe_format format
,
1208 unsigned base_level
,
1209 unsigned last_level
,
1210 unsigned first_layer
,
1211 unsigned last_layer
)
1213 struct pipe_sampler_view templ
, *psv
;
1214 struct svga_pipe_sampler_view
*sv
;
1215 struct svga_context
*svga
= svga_context(pipe
);
1216 struct svga_texture
*tex
= svga_texture(pt
);
1217 enum pipe_error ret
;
1219 assert(svga_have_vgpu10(svga
));
1221 /* Only support 2D texture for now */
1222 if (pt
->target
!= PIPE_TEXTURE_2D
)
1225 /* Fallback to the mipmap generation utility for those formats that
1226 * do not support hw generate mipmap
1228 if (!svga_format_support_gen_mips(format
))
1231 /* Make sure the texture surface was created with
1232 * SVGA3D_SURFACE_BIND_RENDER_TARGET
1234 if (!tex
->handle
|| !(tex
->key
.flags
& SVGA3D_SURFACE_BIND_RENDER_TARGET
))
1237 templ
.format
= format
;
1238 templ
.u
.tex
.first_layer
= first_layer
;
1239 templ
.u
.tex
.last_layer
= last_layer
;
1240 templ
.u
.tex
.first_level
= base_level
;
1241 templ
.u
.tex
.last_level
= last_level
;
1243 psv
= pipe
->create_sampler_view(pipe
, pt
, &templ
);
1247 sv
= svga_pipe_sampler_view(psv
);
1248 ret
= svga_validate_pipe_sampler_view(svga
, sv
);
1249 if (ret
!= PIPE_OK
) {
1250 svga_context_flush(svga
, NULL
);
1251 ret
= svga_validate_pipe_sampler_view(svga
, sv
);
1252 assert(ret
== PIPE_OK
);
1255 ret
= SVGA3D_vgpu10_GenMips(svga
->swc
, sv
->id
, tex
->handle
);
1256 if (ret
!= PIPE_OK
) {
1257 svga_context_flush(svga
, NULL
);
1258 ret
= SVGA3D_vgpu10_GenMips(svga
->swc
, sv
->id
, tex
->handle
);
1260 pipe_sampler_view_reference(&psv
, NULL
);
1262 svga
->hud
.num_generate_mipmap
++;
1268 /* texture upload buffer default size in bytes */
1269 #define TEX_UPLOAD_DEFAULT_SIZE (1024 * 1024)
1272 * Create a texture upload buffer
1275 svga_texture_transfer_map_upload_create(struct svga_context
*svga
)
1277 svga
->tex_upload
= u_upload_create(&svga
->pipe
, TEX_UPLOAD_DEFAULT_SIZE
,
1278 0, PIPE_USAGE_STAGING
);
1279 return svga
->tex_upload
!= NULL
;
1284 * Destroy the texture upload buffer
1287 svga_texture_transfer_map_upload_destroy(struct svga_context
*svga
)
1289 u_upload_destroy(svga
->tex_upload
);
1294 * Returns true if this transfer map request can use the upload buffer.
1297 svga_texture_transfer_map_can_upload(struct svga_context
*svga
,
1298 struct svga_transfer
*st
)
1300 struct pipe_resource
*texture
= st
->base
.resource
;
1302 if (!svga_have_vgpu10(svga
))
1305 if (svga_sws(svga
)->have_transfer_from_buffer_cmd
== FALSE
)
1308 if (st
->base
.usage
& PIPE_TRANSFER_READ
)
1311 /* TransferFromBuffer command is not well supported with multi-samples surface */
1312 if (texture
->nr_samples
> 1)
1315 if (util_format_is_compressed(texture
->format
)) {
1316 /* XXX Need to take a closer look to see why texture upload
1317 * with 3D texture with compressed format fails
1319 if (texture
->target
== PIPE_TEXTURE_3D
)
1324 struct svga_texture
*tex
= svga_texture(texture
);
1325 unsigned blockw
, blockh
, bytesPerBlock
;
1327 svga_format_size(tex
->key
.format
, &blockw
, &blockh
, &bytesPerBlock
);
1329 /* dest box must start on block boundary */
1330 assert((st
->base
.box
.x
% blockw
) == 0);
1331 assert((st
->base
.box
.y
% blockh
) == 0);
1335 else if (texture
->format
== PIPE_FORMAT_R9G9B9E5_FLOAT
) {
1344 * Use upload buffer for the transfer map request.
1347 svga_texture_transfer_map_upload(struct svga_context
*svga
,
1348 struct svga_transfer
*st
)
1350 struct pipe_resource
*texture
= st
->base
.resource
;
1351 struct pipe_resource
*tex_buffer
= NULL
;
1353 unsigned nblocksx
, nblocksy
;
1355 unsigned upload_size
;
1357 assert(svga
->tex_upload
);
1359 st
->upload
.box
.x
= st
->base
.box
.x
;
1360 st
->upload
.box
.y
= st
->base
.box
.y
;
1361 st
->upload
.box
.z
= st
->base
.box
.z
;
1362 st
->upload
.box
.w
= st
->base
.box
.width
;
1363 st
->upload
.box
.h
= st
->base
.box
.height
;
1364 st
->upload
.box
.d
= st
->base
.box
.depth
;
1365 st
->upload
.nlayers
= 1;
1367 switch (texture
->target
) {
1368 case PIPE_TEXTURE_CUBE
:
1369 st
->upload
.box
.z
= 0;
1371 case PIPE_TEXTURE_2D_ARRAY
:
1372 st
->upload
.nlayers
= st
->base
.box
.depth
;
1373 st
->upload
.box
.z
= 0;
1374 st
->upload
.box
.d
= 1;
1376 case PIPE_TEXTURE_1D_ARRAY
:
1377 st
->upload
.nlayers
= st
->base
.box
.depth
;
1378 st
->upload
.box
.y
= st
->upload
.box
.z
= 0;
1379 st
->upload
.box
.d
= 1;
1385 nblocksx
= util_format_get_nblocksx(texture
->format
, st
->base
.box
.width
);
1386 nblocksy
= util_format_get_nblocksy(texture
->format
, st
->base
.box
.height
);
1388 st
->base
.stride
= nblocksx
* util_format_get_blocksize(texture
->format
);
1389 st
->base
.layer_stride
= st
->base
.stride
* nblocksy
;
1391 /* In order to use the TransferFromBuffer command to update the
1392 * texture content from the buffer, the layer stride for a multi-layers
1393 * surface needs to be in multiples of 16 bytes.
1395 if (st
->upload
.nlayers
> 1 && st
->base
.layer_stride
& 15)
1398 upload_size
= st
->base
.layer_stride
* st
->base
.box
.depth
;
1399 upload_size
= align(upload_size
, 16);
1401 /* If the upload size exceeds the default buffer size, the
1402 * upload buffer manager code will try to allocate a new buffer
1403 * with the new buffer size.
1405 u_upload_alloc(svga
->tex_upload
, 0, upload_size
, 16,
1406 &offset
, &tex_buffer
, &tex_map
);
1412 st
->upload
.buf
= tex_buffer
;
1413 st
->upload
.map
= tex_map
;
1414 st
->upload
.offset
= offset
;
1421 * Unmap upload map transfer request
1424 svga_texture_transfer_unmap_upload(struct svga_context
*svga
,
1425 struct svga_transfer
*st
)
1427 struct svga_winsys_surface
*srcsurf
;
1428 struct svga_winsys_surface
*dstsurf
;
1429 struct pipe_resource
*texture
= st
->base
.resource
;
1430 enum pipe_error ret
;
1431 unsigned subResource
;
1432 unsigned numMipLevels
;
1434 unsigned offset
= st
->upload
.offset
;
1436 assert(svga
->tex_upload
);
1437 assert(st
->upload
.buf
);
1439 /* unmap the texture upload buffer */
1440 u_upload_unmap(svga
->tex_upload
);
1442 srcsurf
= svga_buffer_handle(svga
, st
->upload
.buf
);
1443 dstsurf
= svga_texture(texture
)->handle
;
1446 numMipLevels
= texture
->last_level
+ 1;
1448 for (i
= 0, layer
= st
->slice
; i
< st
->upload
.nlayers
; i
++, layer
++) {
1449 subResource
= layer
* numMipLevels
+ st
->base
.level
;
1451 /* send a transferFromBuffer command to update the host texture surface */
1452 assert((offset
& 15) == 0);
1454 ret
= SVGA3D_vgpu10_TransferFromBuffer(svga
->swc
, srcsurf
,
1457 st
->base
.layer_stride
,
1458 dstsurf
, subResource
,
1460 if (ret
!= PIPE_OK
) {
1461 svga_context_flush(svga
, NULL
);
1462 ret
= SVGA3D_vgpu10_TransferFromBuffer(svga
->swc
, srcsurf
,
1465 st
->base
.layer_stride
,
1466 dstsurf
, subResource
,
1468 assert(ret
== PIPE_OK
);
1470 offset
+= st
->base
.layer_stride
;
1473 pipe_resource_reference(&st
->upload
.buf
, NULL
);