src/gallium/drivers/svga/svga_screen_buffer.c

   1 /**********************************************************
   2  * Copyright 2008-2009 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #include "svga_cmd.h"
  27
  28 #include "pipe/p_state.h"
  29 #include "pipe/p_defines.h"
  30 #include "pipe/p_inlines.h"
  31 #include "pipe/p_thread.h"
  32 #include "util/u_math.h"
  33 #include "util/u_memory.h"
  34
  35 #include "svga_context.h"
  36 #include "svga_screen.h"
  37 #include "svga_screen_buffer.h"
  38 #include "svga_winsys.h"
  39 #include "svga_debug.h"
  40
  41
  42 /**
  43  * Vertex and index buffers have to be treated slightly differently from
  44  * regular guest memory regions because the SVGA device sees them as
  45  * surfaces, and the state tracker can create/destroy without the pipe
  46  * driver, therefore we must do the uploads from the vws.
  47  */
  48 static INLINE boolean
  49 svga_buffer_needs_hw_storage(unsigned usage)
  50 {
  51    return usage & (PIPE_BUFFER_USAGE_VERTEX | PIPE_BUFFER_USAGE_INDEX);
  52 }
  53
  54
  55 static INLINE enum pipe_error
  56 svga_buffer_create_host_surface(struct svga_screen *ss,
  57                                 struct svga_buffer *sbuf)
  58 {
  59    if(!sbuf->handle) {
  60       sbuf->key.flags = 0;
  61
  62       sbuf->key.format = SVGA3D_BUFFER;
  63       if(sbuf->base.usage & PIPE_BUFFER_USAGE_VERTEX)
  64          sbuf->key.flags |= SVGA3D_SURFACE_HINT_VERTEXBUFFER;
  65       if(sbuf->base.usage & PIPE_BUFFER_USAGE_INDEX)
  66          sbuf->key.flags |= SVGA3D_SURFACE_HINT_INDEXBUFFER;
  67
  68       sbuf->key.size.width = sbuf->base.size;
  69       sbuf->key.size.height = 1;
  70       sbuf->key.size.depth = 1;
  71
  72       sbuf->key.numFaces = 1;
  73       sbuf->key.numMipLevels = 1;
  74       sbuf->key.cachable = 1;
  75
  76       SVGA_DBG(DEBUG_DMA, "surface_create for buffer sz %d\n", sbuf->base.size);
  77
  78       sbuf->handle = svga_screen_surface_create(ss, &sbuf->key);
  79       if(!sbuf->handle)
  80          return PIPE_ERROR_OUT_OF_MEMORY;
  81
  82       /* Always set the discard flag on the first time the buffer is written
  83        * as svga_screen_surface_create might have passed a recycled host
  84        * buffer.
  85        */
  86       sbuf->hw.flags.discard = TRUE;
  87
  88       SVGA_DBG(DEBUG_DMA, "   --> got sid %p sz %d (buffer)\n", sbuf->handle, sbuf->base.size);
  89    }
  90
  91    return PIPE_OK;
  92 }
  93
  94
  95 static INLINE void
  96 svga_buffer_destroy_host_surface(struct svga_screen *ss,
  97                                  struct svga_buffer *sbuf)
  98 {
  99    if(sbuf->handle) {
 100       SVGA_DBG(DEBUG_DMA, " ungrab sid %p sz %d\n", sbuf->handle, sbuf->base.size);
 101       svga_screen_surface_destroy(ss, &sbuf->key, &sbuf->handle);
 102    }
 103 }
 104
 105
 106 static INLINE void
 107 svga_buffer_destroy_hw_storage(struct svga_screen *ss, struct svga_buffer *sbuf)
 108 {
 109    struct svga_winsys_screen *sws = ss->sws;
 110
 111    assert(!sbuf->map.count);
 112    assert(sbuf->hw.buf);
 113    if(sbuf->hw.buf) {
 114       sws->buffer_destroy(sws, sbuf->hw.buf);
 115       sbuf->hw.buf = NULL;
 116       assert(sbuf->head.prev && sbuf->head.next);
 117       LIST_DEL(&sbuf->head);
 118 #ifdef DEBUG
 119       sbuf->head.next = sbuf->head.prev = NULL;
 120 #endif
 121    }
 122 }
 123
 124 static INLINE enum pipe_error
 125 svga_buffer_backup(struct svga_screen *ss, struct svga_buffer *sbuf)
 126 {
 127    if (sbuf->hw.buf && sbuf->hw.num_ranges) {
 128       void *src;
 129
 130       if (!sbuf->swbuf)
 131          sbuf->swbuf = align_malloc(sbuf->base.size, sbuf->base.alignment);
 132       if (!sbuf->swbuf)
 133          return PIPE_ERROR_OUT_OF_MEMORY;
 134
 135       src = ss->sws->buffer_map(ss->sws, sbuf->hw.buf,
 136                                 PIPE_BUFFER_USAGE_CPU_READ);
 137       if (!src)
 138          return PIPE_ERROR;
 139
 140       memcpy(sbuf->swbuf, src, sbuf->base.size);
 141       ss->sws->buffer_unmap(ss->sws, sbuf->hw.buf);
 142    }
 143
 144    return PIPE_OK;
 145 }
 146
 147 /**
 148  * Try to make GMR space available by freeing the hardware storage of
 149  * unmapped
 150  */
 151 boolean
 152 svga_buffer_free_cached_hw_storage(struct svga_screen *ss)
 153 {
 154    struct list_head *curr;
 155    struct svga_buffer *sbuf;
 156    enum pipe_error ret = PIPE_OK;
 157
 158    curr = ss->cached_buffers.prev;
 159
 160    /* free the least recently used buffer's hw storage which is not mapped */
 161    do {
 162       if(curr == &ss->cached_buffers)
 163          return FALSE;
 164
 165       sbuf = LIST_ENTRY(struct svga_buffer, curr, head);
 166
 167       curr = curr->prev;
 168       if (sbuf->map.count == 0)
 169          ret = svga_buffer_backup(ss, sbuf);
 170
 171    } while(sbuf->map.count != 0 || ret != PIPE_OK);
 172
 173    svga_buffer_destroy_hw_storage(ss, sbuf);
 174
 175    return TRUE;
 176 }
 177
 178 struct svga_winsys_buffer *
 179 svga_winsys_buffer_create( struct svga_screen *ss,
 180                            unsigned alignment,
 181                            unsigned usage,
 182                            unsigned size )
 183 {
 184    struct svga_winsys_screen *sws = ss->sws;
 185    struct svga_winsys_buffer *buf;
 186
 187    /* Just try */
 188    buf = sws->buffer_create(sws, alignment, usage, size);
 189    if(!buf) {
 190
 191       SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "flushing screen to find %d bytes GMR\n",
 192                size);
 193
 194       /* Try flushing all pending DMAs */
 195       svga_screen_flush(ss, NULL);
 196       buf = sws->buffer_create(sws, alignment, usage, size);
 197
 198       SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "evicting buffers to find %d bytes GMR\n",
 199                size);
 200
 201       /* Try evicing all buffer storage */
 202       while(!buf && svga_buffer_free_cached_hw_storage(ss))
 203          buf = sws->buffer_create(sws, alignment, usage, size);
 204    }
 205
 206    return buf;
 207 }
 208
 209
 210 /**
 211  * Allocate DMA'ble storage for the buffer.
 212  *
 213  * Called before mapping a buffer.
 214  */
 215 static INLINE enum pipe_error
 216 svga_buffer_create_hw_storage(struct svga_screen *ss,
 217                               struct svga_buffer *sbuf)
 218 {
 219    if(!sbuf->hw.buf) {
 220       unsigned alignment = sbuf->base.alignment;
 221       unsigned usage = 0;
 222       unsigned size = sbuf->base.size;
 223
 224       sbuf->hw.buf = svga_winsys_buffer_create(ss, alignment, usage, size);
 225       if(!sbuf->hw.buf)
 226          return PIPE_ERROR_OUT_OF_MEMORY;
 227
 228       assert(!sbuf->needs_flush);
 229       assert(!sbuf->head.prev && !sbuf->head.next);
 230       LIST_ADD(&sbuf->head, &ss->cached_buffers);
 231    }
 232
 233    return PIPE_OK;
 234 }
 235
 236
 237 /**
 238  * Variant of SVGA3D_BufferDMA which leaves the copy box temporarily in blank.
 239  */
 240 static enum pipe_error
 241 svga_buffer_upload_command(struct svga_context *svga,
 242                            struct svga_buffer *sbuf)
 243 {
 244    struct svga_winsys_context *swc = svga->swc;
 245    struct svga_winsys_buffer *guest = sbuf->hw.buf;
 246    struct svga_winsys_surface *host = sbuf->handle;
 247    SVGA3dTransferType transfer = SVGA3D_WRITE_HOST_VRAM;
 248    SVGA3dSurfaceDMAFlags flags = sbuf->hw.flags;
 249    SVGA3dCmdSurfaceDMA *cmd;
 250    uint32 numBoxes = sbuf->hw.num_ranges;
 251    SVGA3dCopyBox *boxes;
 252    SVGA3dCmdSurfaceDMASuffix *pSuffix;
 253    unsigned region_flags;
 254    unsigned surface_flags;
 255    struct pipe_buffer *dummy;
 256
 257    if(transfer == SVGA3D_WRITE_HOST_VRAM) {
 258       region_flags = PIPE_BUFFER_USAGE_GPU_READ;
 259       surface_flags = PIPE_BUFFER_USAGE_GPU_WRITE;
 260    }
 261    else if(transfer == SVGA3D_READ_HOST_VRAM) {
 262       region_flags = PIPE_BUFFER_USAGE_GPU_WRITE;
 263       surface_flags = PIPE_BUFFER_USAGE_GPU_READ;
 264    }
 265    else {
 266       assert(0);
 267       return PIPE_ERROR_BAD_INPUT;
 268    }
 269
 270    assert(numBoxes);
 271
 272    cmd = SVGA3D_FIFOReserve(swc,
 273                             SVGA_3D_CMD_SURFACE_DMA,
 274                             sizeof *cmd + numBoxes * sizeof *boxes + sizeof *pSuffix,
 275                             2);
 276    if(!cmd)
 277       return PIPE_ERROR_OUT_OF_MEMORY;
 278
 279    swc->region_relocation(swc, &cmd->guest.ptr, guest, 0, region_flags);
 280    cmd->guest.pitch = 0;
 281
 282    swc->surface_relocation(swc, &cmd->host.sid, host, surface_flags);
 283    cmd->host.face = 0;
 284    cmd->host.mipmap = 0;
 285
 286    cmd->transfer = transfer;
 287
 288    sbuf->hw.boxes = (SVGA3dCopyBox *)&cmd[1];
 289    sbuf->hw.svga = svga;
 290
 291    /* Increment reference count */
 292    dummy = NULL;
 293    pipe_buffer_reference(&dummy, &sbuf->base);
 294
 295    pSuffix = (SVGA3dCmdSurfaceDMASuffix *)((uint8_t*)cmd + sizeof *cmd + numBoxes * sizeof *boxes);
 296    pSuffix->suffixSize = sizeof *pSuffix;
 297    pSuffix->maximumOffset = sbuf->base.size;
 298    pSuffix->flags = flags;
 299
 300    swc->commit(swc);
 301
 302    return PIPE_OK;
 303 }
 304
 305
 306 /**
 307  * Patch up the upload DMA command reserved by svga_buffer_upload_command
 308  * with the final ranges.
 309  */
 310 static void
 311 svga_buffer_upload_flush(struct svga_context *svga,
 312                          struct svga_buffer *sbuf)
 313 {
 314    struct svga_screen *ss = svga_screen(svga->pipe.screen);
 315    SVGA3dCopyBox *boxes;
 316    unsigned i;
 317
 318    assert(sbuf->handle);
 319    assert(sbuf->hw.buf);
 320    assert(sbuf->hw.num_ranges);
 321    assert(sbuf->hw.svga == svga);
 322    assert(sbuf->hw.boxes);
 323
 324    /*
 325     * Patch the DMA command with the final copy box.
 326     */
 327
 328    SVGA_DBG(DEBUG_DMA, "dma to sid %p\n", sbuf->handle);
 329
 330    boxes = sbuf->hw.boxes;
 331    for(i = 0; i < sbuf->hw.num_ranges; ++i) {
 332       SVGA_DBG(DEBUG_DMA, "  bytes %u - %u\n",
 333                sbuf->hw.ranges[i].start, sbuf->hw.ranges[i].end);
 334
 335       boxes[i].x = sbuf->hw.ranges[i].start;
 336       boxes[i].y = 0;
 337       boxes[i].z = 0;
 338       boxes[i].w = sbuf->hw.ranges[i].end - sbuf->hw.ranges[i].start;
 339       boxes[i].h = 1;
 340       boxes[i].d = 1;
 341       boxes[i].srcx = sbuf->hw.ranges[i].start;
 342       boxes[i].srcy = 0;
 343       boxes[i].srcz = 0;
 344    }
 345
 346    sbuf->hw.num_ranges = 0;
 347    memset(&sbuf->hw.flags, 0, sizeof sbuf->hw.flags);
 348
 349    assert(sbuf->head.prev && sbuf->head.next);
 350    LIST_DEL(&sbuf->head);
 351    sbuf->needs_flush = FALSE;
 352    /* XXX: do we care about cached_buffers any more ?*/
 353    LIST_ADD(&sbuf->head, &ss->cached_buffers);
 354
 355    sbuf->hw.svga = NULL;
 356    sbuf->hw.boxes = NULL;
 357
 358    /* Decrement reference count */
 359    pipe_buffer_reference((struct pipe_buffer **)&sbuf, NULL);
 360 }
 361
 362
 363 /**
 364  * Queue a DMA upload of a range of this buffer to the host.
 365  *
 366  * This function only notes the range down. It doesn't actually emit a DMA
 367  * upload command. That only happens when a context tries to refer to this
 368  * buffer, and the DMA upload command is added to that context's command buffer.
 369  *
 370  * We try to lump as many contiguous DMA transfers together as possible.
 371  */
 372 static void
 373 svga_buffer_upload_queue(struct svga_buffer *sbuf,
 374                          unsigned start,
 375                          unsigned end)
 376 {
 377    unsigned i;
 378
 379    assert(sbuf->hw.buf);
 380    assert(end > start);
 381
 382    /*
 383     * Try to grow one of the ranges.
 384     *
 385     * Note that it is not this function task to care about overlapping ranges,
 386     * as the GMR was already given so it is too late to do anything. Situations
 387     * where overlapping ranges may pose a problem should be detected via
 388     * pipe_context::is_buffer_referenced and the context that refers to the
 389     * buffer should be flushed.
 390     */
 391
 392    for(i = 0; i < sbuf->hw.num_ranges; ++i) {
 393       if(start <= sbuf->hw.ranges[i].end && sbuf->hw.ranges[i].start <= end) {
 394          sbuf->hw.ranges[i].start = MIN2(sbuf->hw.ranges[i].start, start);
 395          sbuf->hw.ranges[i].end   = MAX2(sbuf->hw.ranges[i].end,    end);
 396          return;
 397       }
 398    }
 399
 400    /*
 401     * We cannot add a new range to an existing DMA command, so patch-up the
 402     * pending DMA upload and start clean.
 403     */
 404
 405    if(sbuf->needs_flush)
 406       svga_buffer_upload_flush(sbuf->hw.svga, sbuf);
 407
 408    assert(!sbuf->needs_flush);
 409    assert(!sbuf->hw.svga);
 410    assert(!sbuf->hw.boxes);
 411
 412    /*
 413     * Add a new range.
 414     */
 415
 416    sbuf->hw.ranges[sbuf->hw.num_ranges].start = start;
 417    sbuf->hw.ranges[sbuf->hw.num_ranges].end = end;
 418    ++sbuf->hw.num_ranges;
 419 }
 420
 421
 422 static void *
 423 svga_buffer_map_range( struct pipe_screen *screen,
 424                        struct pipe_buffer *buf,
 425                        unsigned offset, unsigned length,
 426                        unsigned usage )
 427 {
 428    struct svga_screen *ss = svga_screen(screen);
 429    struct svga_winsys_screen *sws = ss->sws;
 430    struct svga_buffer *sbuf = svga_buffer( buf );
 431    void *map;
 432
 433    if(sbuf->swbuf) {
 434       /* User/malloc buffer */
 435       map = sbuf->swbuf;
 436    }
 437    else {
 438       if(!sbuf->hw.buf) {
 439          struct svga_winsys_surface *handle = sbuf->handle;
 440
 441          if(svga_buffer_create_hw_storage(ss, sbuf) != PIPE_OK)
 442             return NULL;
 443
 444          /* Populate the hardware storage if the host surface pre-existed */
 445          if((usage & PIPE_BUFFER_USAGE_CPU_READ) && handle) {
 446             SVGA3dSurfaceDMAFlags flags;
 447             enum pipe_error ret;
 448             struct pipe_fence_handle *fence = NULL;
 449
 450             SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "dma from sid %p (buffer), bytes %u - %u\n",
 451                      sbuf->handle, 0, sbuf->base.size);
 452
 453             memset(&flags, 0, sizeof flags);
 454
 455             ret = SVGA3D_BufferDMA(ss->swc,
 456                                    sbuf->hw.buf,
 457                                    sbuf->handle,
 458                                    SVGA3D_READ_HOST_VRAM,
 459                                    sbuf->base.size,
 460                                    0,
 461                                    flags);
 462             if(ret != PIPE_OK) {
 463                ss->swc->flush(ss->swc, NULL);
 464
 465                ret = SVGA3D_BufferDMA(ss->swc,
 466                                       sbuf->hw.buf,
 467                                       sbuf->handle,
 468                                       SVGA3D_READ_HOST_VRAM,
 469                                       sbuf->base.size,
 470                                       0,
 471                                       flags);
 472                assert(ret == PIPE_OK);
 473             }
 474
 475             ss->swc->flush(ss->swc, &fence);
 476             sws->fence_finish(sws, fence, 0);
 477             sws->fence_reference(sws, &fence, NULL);
 478          }
 479       }
 480       else {
 481          if((usage & PIPE_BUFFER_USAGE_CPU_READ) && !sbuf->needs_flush) {
 482             /* We already had the hardware storage but we would have to issue
 483              * a download if we hadn't, so move the buffer to the begginning
 484              * of the LRU list.
 485              */
 486             assert(sbuf->head.prev && sbuf->head.next);
 487             LIST_DEL(&sbuf->head);
 488             LIST_ADD(&sbuf->head, &ss->cached_buffers);
 489          }
 490       }
 491
 492       map = sws->buffer_map(sws, sbuf->hw.buf, usage);
 493    }
 494
 495    if(map) {
 496       pipe_mutex_lock(ss->swc_mutex);
 497
 498       ++sbuf->map.count;
 499
 500       if (usage & PIPE_BUFFER_USAGE_CPU_WRITE) {
 501          assert(sbuf->map.count <= 1);
 502          sbuf->map.writing = TRUE;
 503          if (usage & PIPE_BUFFER_USAGE_FLUSH_EXPLICIT)
 504             sbuf->map.flush_explicit = TRUE;
 505       }
 506
 507       pipe_mutex_unlock(ss->swc_mutex);
 508    }
 509
 510    return map;
 511 }
 512
 513 static void
 514 svga_buffer_flush_mapped_range( struct pipe_screen *screen,
 515                                 struct pipe_buffer *buf,
 516                                 unsigned offset, unsigned length)
 517 {
 518    struct svga_buffer *sbuf = svga_buffer( buf );
 519    struct svga_screen *ss = svga_screen(screen);
 520
 521    pipe_mutex_lock(ss->swc_mutex);
 522    assert(sbuf->map.writing);
 523    if(sbuf->map.writing) {
 524       assert(sbuf->map.flush_explicit);
 525       if(sbuf->hw.buf)
 526          svga_buffer_upload_queue(sbuf, offset, offset + length);
 527    }
 528    pipe_mutex_unlock(ss->swc_mutex);
 529 }
 530
 531 static void
 532 svga_buffer_unmap( struct pipe_screen *screen,
 533                    struct pipe_buffer *buf)
 534 {
 535    struct svga_screen *ss = svga_screen(screen);
 536    struct svga_winsys_screen *sws = ss->sws;
 537    struct svga_buffer *sbuf = svga_buffer( buf );
 538
 539    pipe_mutex_lock(ss->swc_mutex);
 540
 541    assert(sbuf->map.count);
 542    if(sbuf->map.count)
 543       --sbuf->map.count;
 544
 545    if(sbuf->hw.buf)
 546       sws->buffer_unmap(sws, sbuf->hw.buf);
 547
 548    if(sbuf->map.writing) {
 549       if(!sbuf->map.flush_explicit) {
 550          /* No mapped range was flushed -- flush the whole buffer */
 551          SVGA_DBG(DEBUG_DMA, "flushing the whole buffer\n");
 552
 553          if(sbuf->hw.buf)
 554             svga_buffer_upload_queue(sbuf, 0, sbuf->base.size);
 555       }
 556
 557       sbuf->map.writing = FALSE;
 558       sbuf->map.flush_explicit = FALSE;
 559    }
 560
 561    pipe_mutex_unlock(ss->swc_mutex);
 562 }
 563
 564 static void
 565 svga_buffer_destroy( struct pipe_buffer *buf )
 566 {
 567    struct svga_screen *ss = svga_screen(buf->screen);
 568    struct svga_buffer *sbuf = svga_buffer( buf );
 569
 570    assert(!p_atomic_read(&buf->reference.count));
 571
 572    assert(!sbuf->needs_flush);
 573
 574    if(sbuf->handle) {
 575       SVGA_DBG(DEBUG_DMA, "release sid %p sz %d\n", sbuf->handle, sbuf->base.size);
 576       svga_screen_surface_destroy(ss, &sbuf->key, &sbuf->handle);
 577    }
 578
 579    if(sbuf->hw.buf)
 580       svga_buffer_destroy_hw_storage(ss, sbuf);
 581
 582    if(sbuf->swbuf && !sbuf->user)
 583       align_free(sbuf->swbuf);
 584
 585    FREE(sbuf);
 586 }
 587
 588 static struct pipe_buffer *
 589 svga_buffer_create(struct pipe_screen *screen,
 590                    unsigned alignment,
 591                    unsigned usage,
 592                    unsigned size)
 593 {
 594    struct svga_screen *ss = svga_screen(screen);
 595    struct svga_buffer *sbuf;
 596
 597    assert(size);
 598    assert(alignment);
 599
 600    sbuf = CALLOC_STRUCT(svga_buffer);
 601    if(!sbuf)
 602       goto error1;
 603
 604    sbuf->magic = SVGA_BUFFER_MAGIC;
 605
 606    pipe_reference_init(&sbuf->base.reference, 1);
 607    sbuf->base.screen = screen;
 608    sbuf->base.alignment = alignment;
 609    sbuf->base.usage = usage;
 610    sbuf->base.size = size;
 611
 612    if(svga_buffer_needs_hw_storage(usage)) {
 613       if(svga_buffer_create_host_surface(ss, sbuf) != PIPE_OK)
 614          goto error2;
 615    }
 616    else {
 617       if(alignment < sizeof(void*))
 618          alignment = sizeof(void*);
 619
 620       usage |= PIPE_BUFFER_USAGE_CPU_READ_WRITE;
 621
 622       sbuf->swbuf = align_malloc(size, alignment);
 623       if(!sbuf->swbuf)
 624          goto error2;
 625    }
 626
 627    return &sbuf->base;
 628
 629 error2:
 630    FREE(sbuf);
 631 error1:
 632    return NULL;
 633 }
 634
 635 static struct pipe_buffer *
 636 svga_user_buffer_create(struct pipe_screen *screen,
 637                         void *ptr,
 638                         unsigned bytes)
 639 {
 640    struct svga_buffer *sbuf;
 641
 642    sbuf = CALLOC_STRUCT(svga_buffer);
 643    if(!sbuf)
 644       goto no_sbuf;
 645
 646    sbuf->magic = SVGA_BUFFER_MAGIC;
 647
 648    sbuf->swbuf = ptr;
 649    sbuf->user = TRUE;
 650
 651    pipe_reference_init(&sbuf->base.reference, 1);
 652    sbuf->base.screen = screen;
 653    sbuf->base.alignment = 1;
 654    sbuf->base.usage = 0;
 655    sbuf->base.size = bytes;
 656
 657    return &sbuf->base;
 658
 659 no_sbuf:
 660    return NULL;
 661 }
 662
 663
 664 void
 665 svga_screen_init_buffer_functions(struct pipe_screen *screen)
 666 {
 667    screen->buffer_create = svga_buffer_create;
 668    screen->user_buffer_create = svga_user_buffer_create;
 669    screen->buffer_map_range = svga_buffer_map_range;
 670    screen->buffer_flush_mapped_range = svga_buffer_flush_mapped_range;
 671    screen->buffer_unmap = svga_buffer_unmap;
 672    screen->buffer_destroy = svga_buffer_destroy;
 673 }
 674
 675
 676 /**
 677  * Copy the contents of the user buffer / malloc buffer to a hardware buffer.
 678  */
 679 static INLINE enum pipe_error
 680 svga_buffer_update_hw(struct svga_screen *ss, struct svga_buffer *sbuf)
 681 {
 682    if(!sbuf->hw.buf) {
 683       enum pipe_error ret;
 684       void *map;
 685
 686       assert(sbuf->swbuf);
 687       if(!sbuf->swbuf)
 688          return PIPE_ERROR;
 689
 690       ret = svga_buffer_create_hw_storage(ss, sbuf);
 691       assert(ret == PIPE_OK);
 692       if(ret != PIPE_OK)
 693          return ret;
 694
 695       pipe_mutex_lock(ss->swc_mutex);
 696       map = ss->sws->buffer_map(ss->sws, sbuf->hw.buf, PIPE_BUFFER_USAGE_CPU_WRITE);
 697       assert(map);
 698       if(!map) {
 699          pipe_mutex_unlock(ss->swc_mutex);
 700          return PIPE_ERROR_OUT_OF_MEMORY;
 701       }
 702
 703       memcpy(map, sbuf->swbuf, sbuf->base.size);
 704       ss->sws->buffer_unmap(ss->sws, sbuf->hw.buf);
 705
 706       /* This user/malloc buffer is now indistinguishable from a gpu buffer */
 707       assert(!sbuf->map.count);
 708       if(!sbuf->map.count) {
 709          if(sbuf->user)
 710             sbuf->user = FALSE;
 711          else
 712             align_free(sbuf->swbuf);
 713          sbuf->swbuf = NULL;
 714       }
 715
 716       svga_buffer_upload_queue(sbuf, 0, sbuf->base.size);
 717    }
 718
 719    pipe_mutex_unlock(ss->swc_mutex);
 720    return PIPE_OK;
 721 }
 722
 723
 724 struct svga_winsys_surface *
 725 svga_buffer_handle(struct svga_context *svga,
 726                    struct pipe_buffer *buf)
 727 {
 728    struct pipe_screen *screen = svga->pipe.screen;
 729    struct svga_screen *ss = svga_screen(screen);
 730    struct svga_buffer *sbuf;
 731    enum pipe_error ret;
 732
 733    if(!buf)
 734       return NULL;
 735
 736    sbuf = svga_buffer(buf);
 737
 738    assert(!sbuf->map.count);
 739
 740    if(!sbuf->handle) {
 741       ret = svga_buffer_create_host_surface(ss, sbuf);
 742       if(ret != PIPE_OK)
 743          return NULL;
 744
 745       ret = svga_buffer_update_hw(ss, sbuf);
 746       if(ret != PIPE_OK)
 747          return NULL;
 748    }
 749
 750    if(!sbuf->needs_flush && sbuf->hw.num_ranges) {
 751       /* Queue the buffer for flushing */
 752       ret = svga_buffer_upload_command(svga, sbuf);
 753       if(ret != PIPE_OK)
 754          /* XXX: Should probably have a richer return value */
 755          return NULL;
 756
 757       assert(sbuf->hw.svga == svga);
 758
 759       sbuf->needs_flush = TRUE;
 760       assert(sbuf->head.prev && sbuf->head.next);
 761       LIST_DEL(&sbuf->head);
 762       LIST_ADDTAIL(&sbuf->head, &svga->dirty_buffers);
 763    }
 764
 765    return sbuf->handle;
 766 }
 767
 768 struct pipe_buffer *
 769 svga_screen_buffer_wrap_surface(struct pipe_screen *screen,
 770                                 enum SVGA3dSurfaceFormat format,
 771                                 struct svga_winsys_surface *srf)
 772 {
 773    struct pipe_buffer *buf;
 774    struct svga_buffer *sbuf;
 775    struct svga_winsys_screen *sws = svga_winsys_screen(screen);
 776
 777    buf = svga_buffer_create(screen, 0, SVGA_BUFFER_USAGE_WRAPPED, 0);
 778    if (!buf)
 779       return NULL;
 780
 781    sbuf = svga_buffer(buf);
 782
 783    /*
 784     * We are not the creator of this surface and therefore we must not
 785     * cache it for reuse. Set the cacheable flag to zero in the key to
 786     * prevent this.
 787     */
 788    sbuf->key.format = format;
 789    sbuf->key.cachable = 0;
 790    sws->surface_reference(sws, &sbuf->handle, srf);
 791
 792    return buf;
 793 }
 794
 795
 796 struct svga_winsys_surface *
 797 svga_screen_buffer_get_winsys_surface(struct pipe_buffer *buffer)
 798 {
 799    struct svga_winsys_screen *sws = svga_winsys_screen(buffer->screen);
 800    struct svga_winsys_surface *vsurf = NULL;
 801
 802    assert(svga_buffer(buffer)->key.cachable == 0);
 803    svga_buffer(buffer)->key.cachable = 0;
 804    sws->surface_reference(sws, &vsurf, svga_buffer(buffer)->handle);
 805    return vsurf;
 806 }
 807
 808 void
 809 svga_context_flush_buffers(struct svga_context *svga)
 810 {
 811    struct list_head *curr, *next;
 812    struct svga_buffer *sbuf;
 813
 814    curr = svga->dirty_buffers.next;
 815    next = curr->next;
 816    while(curr != &svga->dirty_buffers) {
 817       sbuf = LIST_ENTRY(struct svga_buffer, curr, head);
 818
 819       assert(p_atomic_read(&sbuf->base.reference.count) != 0);
 820       assert(sbuf->needs_flush);
 821
 822       svga_buffer_upload_flush(svga, sbuf);
 823
 824       curr = next;
 825       next = curr->next;
 826    }
 827 }