src/gallium/drivers/svga/svga_shader.c

   1 /**********************************************************
   2  * Copyright 2008-2012 VMware, Inc.  All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person
   5  * obtaining a copy of this software and associated documentation
   6  * files (the "Software"), to deal in the Software without
   7  * restriction, including without limitation the rights to use, copy,
   8  * modify, merge, publish, distribute, sublicense, and/or sell copies
   9  * of the Software, and to permit persons to whom the Software is
  10  * furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **********************************************************/
  25
  26 #include "util/u_bitmask.h"
  27 #include "util/u_memory.h"
  28 #include "util/u_format.h"
  29 #include "svga_context.h"
  30 #include "svga_cmd.h"
  31 #include "svga_format.h"
  32 #include "svga_shader.h"
  33 #include "svga_resource_texture.h"
  34
  35
  36 /**
  37  * This bit isn't really used anywhere.  It only serves to help
  38  * generate a unique "signature" for the vertex shader output bitmask.
  39  * Shader input/output signatures are used to resolve shader linking
  40  * issues.
  41  */
  42 #define FOG_GENERIC_BIT (((uint64_t) 1) << 63)
  43
  44
  45 /**
  46  * Use the shader info to generate a bitmask indicating which generic
  47  * inputs are used by the shader.  A set bit indicates that GENERIC[i]
  48  * is used.
  49  */
  50 uint64_t
  51 svga_get_generic_inputs_mask(const struct tgsi_shader_info *info)
  52 {
  53    unsigned i;
  54    uint64_t mask = 0x0;
  55
  56    for (i = 0; i < info->num_inputs; i++) {
  57       if (info->input_semantic_name[i] == TGSI_SEMANTIC_GENERIC) {
  58          unsigned j = info->input_semantic_index[i];
  59          assert(j < sizeof(mask) * 8);
  60          mask |= ((uint64_t) 1) << j;
  61       }
  62    }
  63
  64    return mask;
  65 }
  66
  67
  68 /**
  69  * Scan shader info to return a bitmask of written outputs.
  70  */
  71 uint64_t
  72 svga_get_generic_outputs_mask(const struct tgsi_shader_info *info)
  73 {
  74    unsigned i;
  75    uint64_t mask = 0x0;
  76
  77    for (i = 0; i < info->num_outputs; i++) {
  78       switch (info->output_semantic_name[i]) {
  79       case TGSI_SEMANTIC_GENERIC:
  80          {
  81             unsigned j = info->output_semantic_index[i];
  82             assert(j < sizeof(mask) * 8);
  83             mask |= ((uint64_t) 1) << j;
  84          }
  85          break;
  86       case TGSI_SEMANTIC_FOG:
  87          mask |= FOG_GENERIC_BIT;
  88          break;
  89       }
  90    }
  91
  92    return mask;
  93 }
  94
  95
  96
  97 /**
  98  * Given a mask of used generic variables (as returned by the above functions)
  99  * fill in a table which maps those indexes to small integers.
 100  * This table is used by the remap_generic_index() function in
 101  * svga_tgsi_decl_sm30.c
 102  * Example: if generics_mask = binary(1010) it means that GENERIC[1] and
 103  * GENERIC[3] are used.  The remap_table will contain:
 104  *   table[1] = 0;
 105  *   table[3] = 1;
 106  * The remaining table entries will be filled in with the next unused
 107  * generic index (in this example, 2).
 108  */
 109 void
 110 svga_remap_generics(uint64_t generics_mask,
 111                     int8_t remap_table[MAX_GENERIC_VARYING])
 112 {
 113    /* Note texcoord[0] is reserved so start at 1 */
 114    unsigned count = 1, i;
 115
 116    for (i = 0; i < MAX_GENERIC_VARYING; i++) {
 117       remap_table[i] = -1;
 118    }
 119
 120    /* for each bit set in generic_mask */
 121    while (generics_mask) {
 122       unsigned index = ffsll(generics_mask) - 1;
 123       remap_table[index] = count++;
 124       generics_mask &= ~((uint64_t) 1 << index);
 125    }
 126 }
 127
 128
 129 /**
 130  * Use the generic remap table to map a TGSI generic varying variable
 131  * index to a small integer.  If the remapping table doesn't have a
 132  * valid value for the given index (the table entry is -1) it means
 133  * the fragment shader doesn't use that VS output.  Just allocate
 134  * the next free value in that case.  Alternately, we could cull
 135  * VS instructions that write to register, or replace the register
 136  * with a dummy temp register.
 137  * XXX TODO: we should do one of the later as it would save precious
 138  * texcoord registers.
 139  */
 140 int
 141 svga_remap_generic_index(int8_t remap_table[MAX_GENERIC_VARYING],
 142                          int generic_index)
 143 {
 144    assert(generic_index < MAX_GENERIC_VARYING);
 145
 146    if (generic_index >= MAX_GENERIC_VARYING) {
 147       /* just don't return a random/garbage value */
 148       generic_index = MAX_GENERIC_VARYING - 1;
 149    }
 150
 151    if (remap_table[generic_index] == -1) {
 152       /* This is a VS output that has no matching PS input.  Find a
 153        * free index.
 154        */
 155       int i, max = 0;
 156       for (i = 0; i < MAX_GENERIC_VARYING; i++) {
 157          max = MAX2(max, remap_table[i]);
 158       }
 159       remap_table[generic_index] = max + 1;
 160    }
 161
 162    return remap_table[generic_index];
 163 }
 164
 165 static const enum pipe_swizzle copy_alpha[PIPE_SWIZZLE_MAX] = {
 166    PIPE_SWIZZLE_X,
 167    PIPE_SWIZZLE_Y,
 168    PIPE_SWIZZLE_Z,
 169    PIPE_SWIZZLE_W,
 170    PIPE_SWIZZLE_0,
 171    PIPE_SWIZZLE_1,
 172    PIPE_SWIZZLE_NONE
 173 };
 174
 175 static const enum pipe_swizzle set_alpha[PIPE_SWIZZLE_MAX] = {
 176    PIPE_SWIZZLE_X,
 177    PIPE_SWIZZLE_Y,
 178    PIPE_SWIZZLE_Z,
 179    PIPE_SWIZZLE_1,
 180    PIPE_SWIZZLE_0,
 181    PIPE_SWIZZLE_1,
 182    PIPE_SWIZZLE_NONE
 183 };
 184
 185 /**
 186  * Initialize the shader-neutral fields of svga_compile_key from context
 187  * state.  This is basically the texture-related state.
 188  */
 189 void
 190 svga_init_shader_key_common(const struct svga_context *svga,
 191                             enum pipe_shader_type shader,
 192                             struct svga_compile_key *key)
 193 {
 194    unsigned i, idx = 0;
 195    const enum pipe_swizzle *swizzle_tab;
 196
 197    assert(shader < ARRAY_SIZE(svga->curr.num_sampler_views));
 198
 199    /* In case the number of samplers and sampler_views doesn't match,
 200     * loop over the lower of the two counts.
 201     */
 202    key->num_textures = MAX2(svga->curr.num_sampler_views[shader],
 203                             svga->curr.num_samplers[shader]);
 204
 205    for (i = 0; i < key->num_textures; i++) {
 206       struct pipe_sampler_view *view = svga->curr.sampler_views[shader][i];
 207       const struct svga_sampler_state *sampler = svga->curr.sampler[shader][i];
 208       if (view) {
 209          assert(view->texture);
 210          assert(view->texture->target < (1 << 4)); /* texture_target:4 */
 211
 212          /* 1D/2D array textures with one slice are treated as non-arrays
 213           * by the SVGA3D device.  Convert the texture type here so that
 214           * we emit the right TEX/SAMPLE instruction in the shader.
 215           */
 216          if (view->texture->target == PIPE_TEXTURE_1D_ARRAY ||
 217              view->texture->target == PIPE_TEXTURE_2D_ARRAY) {
 218             if (view->texture->array_size == 1) {
 219                key->tex[i].is_array = 0;
 220             }
 221             else {
 222                assert(view->texture->array_size > 1);
 223                key->tex[i].is_array = 1;
 224             }
 225          }
 226
 227          swizzle_tab = (!util_format_has_alpha(view->format) &&
 228                         svga_texture_device_format_has_alpha(view->texture)) ?
 229             set_alpha : copy_alpha;
 230
 231          /* If we have a non-alpha view into an svga3d surface with an
 232           * alpha channel, then explicitly set the alpha channel to 1
 233           * when sampling. Note that we need to check the
 234           * actual device format to cover also imported surface cases.
 235           */
 236
 237          key->tex[i].swizzle_r = swizzle_tab[view->swizzle_r];
 238          key->tex[i].swizzle_g = swizzle_tab[view->swizzle_g];
 239          key->tex[i].swizzle_b = swizzle_tab[view->swizzle_b];
 240          key->tex[i].swizzle_a = swizzle_tab[view->swizzle_a];
 241       }
 242
 243       if (sampler) {
 244          if (!sampler->normalized_coords) {
 245             assert(idx < (1 << 5));  /* width_height_idx:5 bitfield */
 246             key->tex[i].width_height_idx = idx++;
 247             key->tex[i].unnormalized = TRUE;
 248             ++key->num_unnormalized_coords;
 249          }
 250       }
 251    }
 252 }
 253
 254
 255 /** Search for a compiled shader variant with the same compile key */
 256 struct svga_shader_variant *
 257 svga_search_shader_key(const struct svga_shader *shader,
 258                        const struct svga_compile_key *key)
 259 {
 260    struct svga_shader_variant *variant = shader->variants;
 261
 262    assert(key);
 263
 264    for ( ; variant; variant = variant->next) {
 265       if (svga_compile_keys_equal(key, &variant->key))
 266          return variant;
 267    }
 268    return NULL;
 269 }
 270
 271 /** Search for a shader with the same token key */
 272 struct svga_shader *
 273 svga_search_shader_token_key(struct svga_shader *pshader,
 274                              const struct svga_token_key *key)
 275 {
 276    struct svga_shader *shader = pshader;
 277
 278    assert(key);
 279
 280    for ( ; shader; shader = shader->next) {
 281       if (memcmp(key, &shader->token_key, sizeof(struct svga_token_key)) == 0)
 282          return shader;
 283    }
 284    return NULL;
 285 }
 286
 287 /**
 288  * Helper function to define a gb shader for non-vgpu10 device
 289  */
 290 static enum pipe_error
 291 define_gb_shader_vgpu9(struct svga_context *svga,
 292                        SVGA3dShaderType type,
 293                        struct svga_shader_variant *variant,
 294                        unsigned codeLen)
 295 {
 296    struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws;
 297    enum pipe_error ret;
 298
 299    /**
 300     * Create gb memory for the shader and upload the shader code.
 301     * Kernel module will allocate an id for the shader and issue
 302     * the DefineGBShader command.
 303     */
 304    variant->gb_shader = sws->shader_create(sws, type,
 305                                            variant->tokens, codeLen);
 306
 307    if (!variant->gb_shader)
 308       return PIPE_ERROR_OUT_OF_MEMORY;
 309
 310    ret = SVGA3D_BindGBShader(svga->swc, variant->gb_shader);
 311
 312    return ret;
 313 }
 314
 315 /**
 316  * Helper function to define a gb shader for vgpu10 device
 317  */
 318 static enum pipe_error
 319 define_gb_shader_vgpu10(struct svga_context *svga,
 320                         SVGA3dShaderType type,
 321                         struct svga_shader_variant *variant,
 322                         unsigned codeLen)
 323 {
 324    struct svga_winsys_context *swc = svga->swc;
 325    enum pipe_error ret;
 326
 327    /**
 328     * Shaders in VGPU10 enabled device reside in the device COTable.
 329     * SVGA driver will allocate an integer ID for the shader and
 330     * issue DXDefineShader and DXBindShader commands.
 331     */
 332    variant->id = util_bitmask_add(svga->shader_id_bm);
 333    if (variant->id == UTIL_BITMASK_INVALID_INDEX) {
 334       return PIPE_ERROR_OUT_OF_MEMORY;
 335    }
 336
 337    /* Create gb memory for the shader and upload the shader code */
 338    variant->gb_shader = swc->shader_create(swc,
 339                                            variant->id, type,
 340                                            variant->tokens, codeLen);
 341
 342    if (!variant->gb_shader) {
 343       /* Free the shader ID */
 344       assert(variant->id != UTIL_BITMASK_INVALID_INDEX);
 345       goto fail_no_allocation;
 346    }
 347
 348    /**
 349     * Since we don't want to do any flush within state emission to avoid
 350     * partial state in a command buffer, it's important to make sure that
 351     * there is enough room to send both the DXDefineShader & DXBindShader
 352     * commands in the same command buffer. So let's send both
 353     * commands in one command reservation. If it fails, we'll undo
 354     * the shader creation and return an error.
 355     */
 356    ret = SVGA3D_vgpu10_DefineAndBindShader(swc, variant->gb_shader,
 357                                            variant->id, type, codeLen);
 358
 359    if (ret != PIPE_OK)
 360       goto fail;
 361
 362    return PIPE_OK;
 363
 364 fail:
 365    swc->shader_destroy(swc, variant->gb_shader);
 366    variant->gb_shader = NULL;
 367
 368 fail_no_allocation:
 369    util_bitmask_clear(svga->shader_id_bm, variant->id);
 370    variant->id = UTIL_BITMASK_INVALID_INDEX;
 371
 372    return PIPE_ERROR_OUT_OF_MEMORY;
 373 }
 374
 375 /**
 376  * Issue the SVGA3D commands to define a new shader.
 377  * \param variant  contains the shader tokens, etc.  The result->id field will
 378  *                 be set here.
 379  */
 380 enum pipe_error
 381 svga_define_shader(struct svga_context *svga,
 382                    SVGA3dShaderType type,
 383                    struct svga_shader_variant *variant)
 384 {
 385    unsigned codeLen = variant->nr_tokens * sizeof(variant->tokens[0]);
 386    enum pipe_error ret;
 387
 388    SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_DEFINESHADER);
 389
 390    variant->id = UTIL_BITMASK_INVALID_INDEX;
 391
 392    if (svga_have_gb_objects(svga)) {
 393       if (svga_have_vgpu10(svga))
 394          ret = define_gb_shader_vgpu10(svga, type, variant, codeLen);
 395       else
 396          ret = define_gb_shader_vgpu9(svga, type, variant, codeLen);
 397    }
 398    else {
 399       /* Allocate an integer ID for the shader */
 400       variant->id = util_bitmask_add(svga->shader_id_bm);
 401       if (variant->id == UTIL_BITMASK_INVALID_INDEX) {
 402          ret = PIPE_ERROR_OUT_OF_MEMORY;
 403          goto done;
 404       }
 405
 406       /* Issue SVGA3D device command to define the shader */
 407       ret = SVGA3D_DefineShader(svga->swc,
 408                                 variant->id,
 409                                 type,
 410                                 variant->tokens,
 411                                 codeLen);
 412       if (ret != PIPE_OK) {
 413          /* free the ID */
 414          assert(variant->id != UTIL_BITMASK_INVALID_INDEX);
 415          util_bitmask_clear(svga->shader_id_bm, variant->id);
 416          variant->id = UTIL_BITMASK_INVALID_INDEX;
 417       }
 418    }
 419
 420 done:
 421    SVGA_STATS_TIME_POP(svga_sws(svga));
 422    return ret;
 423 }
 424
 425
 426 /**
 427  * Issue the SVGA3D commands to set/bind a shader.
 428  * \param result  the shader to bind.
 429  */
 430 enum pipe_error
 431 svga_set_shader(struct svga_context *svga,
 432                 SVGA3dShaderType type,
 433                 struct svga_shader_variant *variant)
 434 {
 435    enum pipe_error ret;
 436    unsigned id = variant ? variant->id : SVGA3D_INVALID_ID;
 437
 438    assert(type == SVGA3D_SHADERTYPE_VS ||
 439           type == SVGA3D_SHADERTYPE_GS ||
 440           type == SVGA3D_SHADERTYPE_PS);
 441
 442    if (svga_have_gb_objects(svga)) {
 443       struct svga_winsys_gb_shader *gbshader =
 444          variant ? variant->gb_shader : NULL;
 445
 446       if (svga_have_vgpu10(svga))
 447          ret = SVGA3D_vgpu10_SetShader(svga->swc, type, gbshader, id);
 448       else
 449          ret = SVGA3D_SetGBShader(svga->swc, type, gbshader);
 450    }
 451    else {
 452       ret = SVGA3D_SetShader(svga->swc, type, id);
 453    }
 454
 455    return ret;
 456 }
 457
 458
 459 struct svga_shader_variant *
 460 svga_new_shader_variant(struct svga_context *svga)
 461 {
 462    svga->hud.num_shaders++;
 463    return CALLOC_STRUCT(svga_shader_variant);
 464 }
 465
 466
 467 enum pipe_error
 468 svga_destroy_shader_variant(struct svga_context *svga,
 469                             SVGA3dShaderType type,
 470                             struct svga_shader_variant *variant)
 471 {
 472    enum pipe_error ret = PIPE_OK;
 473
 474    if (svga_have_gb_objects(svga) && variant->gb_shader) {
 475       if (svga_have_vgpu10(svga)) {
 476          struct svga_winsys_context *swc = svga->swc;
 477          swc->shader_destroy(swc, variant->gb_shader);
 478          ret = SVGA3D_vgpu10_DestroyShader(svga->swc, variant->id);
 479          if (ret != PIPE_OK) {
 480             /* flush and try again */
 481             svga_context_flush(svga, NULL);
 482             ret = SVGA3D_vgpu10_DestroyShader(svga->swc, variant->id);
 483          }
 484          util_bitmask_clear(svga->shader_id_bm, variant->id);
 485       }
 486       else {
 487          struct svga_winsys_screen *sws = svga_screen(svga->pipe.screen)->sws;
 488          sws->shader_destroy(sws, variant->gb_shader);
 489       }
 490       variant->gb_shader = NULL;
 491    }
 492    else {
 493       if (variant->id != UTIL_BITMASK_INVALID_INDEX) {
 494          ret = SVGA3D_DestroyShader(svga->swc, variant->id, type);
 495          if (ret != PIPE_OK) {
 496             /* flush and try again */
 497             svga_context_flush(svga, NULL);
 498             ret = SVGA3D_DestroyShader(svga->swc, variant->id, type);
 499             assert(ret == PIPE_OK);
 500          }
 501          util_bitmask_clear(svga->shader_id_bm, variant->id);
 502       }
 503    }
 504
 505    FREE((unsigned *)variant->tokens);
 506    FREE(variant);
 507
 508    svga->hud.num_shaders--;
 509
 510    return ret;
 511 }
 512
 513 /*
 514  * Rebind shaders.
 515  * Called at the beginning of every new command buffer to ensure that
 516  * shaders are properly paged-in. Instead of sending the SetShader
 517  * command, this function sends a private allocation command to
 518  * page in a shader. This avoids emitting redundant state to the device
 519  * just to page in a resource.
 520  */
 521 enum pipe_error
 522 svga_rebind_shaders(struct svga_context *svga)
 523 {
 524    struct svga_winsys_context *swc = svga->swc;
 525    struct svga_hw_draw_state *hw = &svga->state.hw_draw;
 526    enum pipe_error ret;
 527
 528    assert(svga_have_vgpu10(svga));
 529
 530    /**
 531     * If the underlying winsys layer does not need resource rebinding,
 532     * just clear the rebind flags and return.
 533     */
 534    if (swc->resource_rebind == NULL) {
 535       svga->rebind.flags.vs = 0;
 536       svga->rebind.flags.gs = 0;
 537       svga->rebind.flags.fs = 0;
 538
 539       return PIPE_OK;
 540    }
 541
 542    if (svga->rebind.flags.vs && hw->vs && hw->vs->gb_shader) {
 543       ret = swc->resource_rebind(swc, NULL, hw->vs->gb_shader, SVGA_RELOC_READ);
 544       if (ret != PIPE_OK)
 545          return ret;
 546    }
 547    svga->rebind.flags.vs = 0;
 548
 549    if (svga->rebind.flags.gs && hw->gs && hw->gs->gb_shader) {
 550       ret = swc->resource_rebind(swc, NULL, hw->gs->gb_shader, SVGA_RELOC_READ);
 551       if (ret != PIPE_OK)
 552          return ret;
 553    }
 554    svga->rebind.flags.gs = 0;
 555
 556    if (svga->rebind.flags.fs && hw->fs && hw->fs->gb_shader) {
 557       ret = swc->resource_rebind(swc, NULL, hw->fs->gb_shader, SVGA_RELOC_READ);
 558       if (ret != PIPE_OK)
 559          return ret;
 560    }
 561    svga->rebind.flags.fs = 0;
 562
 563    return PIPE_OK;
 564 }