1 /****************************************************************************
2 * Copyright (C) 2014-2015 Intel Corporation. All Rights Reserved.
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15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
23 * @file builder_misc.cpp
25 * @brief Implementation for miscellaneous builder functions
29 ******************************************************************************/
31 #include "common/rdtsc_buckets.h"
37 void __cdecl
CallPrint(const char* fmt
, ...);
39 //////////////////////////////////////////////////////////////////////////
40 /// @brief Convert an IEEE 754 32-bit single precision float to an
41 /// 16 bit float with 5 exponent bits and a variable
42 /// number of mantissa bits.
43 /// @param val - 32-bit float
44 /// @todo Maybe move this outside of this file into a header?
45 static uint16_t Convert32To16Float(float val
)
47 uint32_t sign
, exp
, mant
;
50 // Extract the sign, exponent, and mantissa
51 uint32_t uf
= *(uint32_t*)&val
;
52 sign
= (uf
& 0x80000000) >> 31;
53 exp
= (uf
& 0x7F800000) >> 23;
54 mant
= uf
& 0x007FFFFF;
56 // Check for out of range
61 sign
= 1; // set the sign bit for NANs
63 else if (std::isinf(val
))
68 else if (exp
> (0x70 + 0x1E)) // Too big to represent -> max representable value
73 else if ((exp
<= 0x70) && (exp
>= 0x66)) // It's a denorm
76 for (; exp
<= 0x70; mant
>>= 1, exp
++)
81 else if (exp
< 0x66) // Too small to represent -> Zero
88 // Saves bits that will be shifted off for rounding
89 roundBits
= mant
& 0x1FFFu
;
90 // convert exponent and mantissa to 16 bit format
94 // Essentially RTZ, but round up if off by only 1 lsb
95 if (roundBits
== 0x1FFFu
)
99 if ((mant
& 0xC00u
) != 0)
101 // make sure only the needed bits are used
106 uint32_t tmpVal
= (sign
<< 15) | (exp
<< 10) | mant
;
107 return (uint16_t)tmpVal
;
110 //////////////////////////////////////////////////////////////////////////
111 /// @brief Convert an IEEE 754 16-bit float to an 32-bit single precision
113 /// @param val - 16-bit float
114 /// @todo Maybe move this outside of this file into a header?
115 static float ConvertSmallFloatTo32(UINT val
)
118 if ((val
& 0x7fff) == 0)
120 result
= ((uint32_t)(val
& 0x8000)) << 16;
122 else if ((val
& 0x7c00) == 0x7c00)
124 result
= ((val
& 0x3ff) == 0) ? 0x7f800000 : 0x7fc00000;
125 result
|= ((uint32_t)val
& 0x8000) << 16;
129 uint32_t sign
= (val
& 0x8000) << 16;
130 uint32_t mant
= (val
& 0x3ff) << 13;
131 uint32_t exp
= (val
>> 10) & 0x1f;
132 if ((exp
== 0) && (mant
!= 0)) // Adjust exponent and mantissa for denormals
135 while (mant
< (0x400 << 13))
140 mant
&= (0x3ff << 13);
142 exp
= ((exp
- 15 + 127) & 0xff) << 23;
143 result
= sign
| exp
| mant
;
146 return *(float*)&result
;
149 Constant
*Builder::C(bool i
)
151 return ConstantInt::get(IRB()->getInt1Ty(), (i
? 1 : 0));
154 Constant
*Builder::C(char i
)
156 return ConstantInt::get(IRB()->getInt8Ty(), i
);
159 Constant
*Builder::C(uint8_t i
)
161 return ConstantInt::get(IRB()->getInt8Ty(), i
);
164 Constant
*Builder::C(int i
)
166 return ConstantInt::get(IRB()->getInt32Ty(), i
);
169 Constant
*Builder::C(int64_t i
)
171 return ConstantInt::get(IRB()->getInt64Ty(), i
);
174 Constant
*Builder::C(uint16_t i
)
176 return ConstantInt::get(mInt16Ty
,i
);
179 Constant
*Builder::C(uint32_t i
)
181 return ConstantInt::get(IRB()->getInt32Ty(), i
);
184 Constant
*Builder::C(float i
)
186 return ConstantFP::get(IRB()->getFloatTy(), i
);
189 Constant
*Builder::PRED(bool pred
)
191 return ConstantInt::get(IRB()->getInt1Ty(), (pred
? 1 : 0));
194 Value
*Builder::VIMMED1(int i
)
196 return ConstantVector::getSplat(mVWidth
, cast
<ConstantInt
>(C(i
)));
199 Value
*Builder::VIMMED1(uint32_t i
)
201 return ConstantVector::getSplat(mVWidth
, cast
<ConstantInt
>(C(i
)));
204 Value
*Builder::VIMMED1(float i
)
206 return ConstantVector::getSplat(mVWidth
, cast
<ConstantFP
>(C(i
)));
209 Value
*Builder::VIMMED1(bool i
)
211 return ConstantVector::getSplat(mVWidth
, cast
<ConstantInt
>(C(i
)));
214 Value
*Builder::VUNDEF_IPTR()
216 return UndefValue::get(VectorType::get(mInt32PtrTy
,mVWidth
));
219 Value
*Builder::VUNDEF_I()
221 return UndefValue::get(VectorType::get(mInt32Ty
, mVWidth
));
224 Value
*Builder::VUNDEF(Type
*ty
, uint32_t size
)
226 return UndefValue::get(VectorType::get(ty
, size
));
229 Value
*Builder::VUNDEF_F()
231 return UndefValue::get(VectorType::get(mFP32Ty
, mVWidth
));
234 Value
*Builder::VUNDEF(Type
* t
)
236 return UndefValue::get(VectorType::get(t
, mVWidth
));
239 #if HAVE_LLVM == 0x306
240 Value
*Builder::VINSERT(Value
*vec
, Value
*val
, uint64_t index
)
242 return VINSERT(vec
, val
, C((int64_t)index
));
246 Value
*Builder::VBROADCAST(Value
*src
)
248 // check if src is already a vector
249 if (src
->getType()->isVectorTy())
254 return VECTOR_SPLAT(mVWidth
, src
);
257 uint32_t Builder::IMMED(Value
* v
)
259 SWR_ASSERT(isa
<ConstantInt
>(v
));
260 ConstantInt
*pValConst
= cast
<ConstantInt
>(v
);
261 return pValConst
->getZExtValue();
264 int32_t Builder::S_IMMED(Value
* v
)
266 SWR_ASSERT(isa
<ConstantInt
>(v
));
267 ConstantInt
*pValConst
= cast
<ConstantInt
>(v
);
268 return pValConst
->getSExtValue();
271 Value
*Builder::GEP(Value
* ptr
, const std::initializer_list
<Value
*> &indexList
)
273 std::vector
<Value
*> indices
;
274 for (auto i
: indexList
)
275 indices
.push_back(i
);
276 return GEPA(ptr
, indices
);
279 Value
*Builder::GEP(Value
* ptr
, const std::initializer_list
<uint32_t> &indexList
)
281 std::vector
<Value
*> indices
;
282 for (auto i
: indexList
)
283 indices
.push_back(C(i
));
284 return GEPA(ptr
, indices
);
287 LoadInst
*Builder::LOAD(Value
*basePtr
, const std::initializer_list
<uint32_t> &indices
, const llvm::Twine
& name
)
289 std::vector
<Value
*> valIndices
;
290 for (auto i
: indices
)
291 valIndices
.push_back(C(i
));
292 return LOAD(GEPA(basePtr
, valIndices
), name
);
295 LoadInst
*Builder::LOADV(Value
*basePtr
, const std::initializer_list
<Value
*> &indices
, const llvm::Twine
& name
)
297 std::vector
<Value
*> valIndices
;
298 for (auto i
: indices
)
299 valIndices
.push_back(i
);
300 return LOAD(GEPA(basePtr
, valIndices
), name
);
303 StoreInst
*Builder::STORE(Value
*val
, Value
*basePtr
, const std::initializer_list
<uint32_t> &indices
)
305 std::vector
<Value
*> valIndices
;
306 for (auto i
: indices
)
307 valIndices
.push_back(C(i
));
308 return STORE(val
, GEPA(basePtr
, valIndices
));
311 StoreInst
*Builder::STOREV(Value
*val
, Value
*basePtr
, const std::initializer_list
<Value
*> &indices
)
313 std::vector
<Value
*> valIndices
;
314 for (auto i
: indices
)
315 valIndices
.push_back(i
);
316 return STORE(val
, GEPA(basePtr
, valIndices
));
319 CallInst
*Builder::CALL(Value
*Callee
, const std::initializer_list
<Value
*> &argsList
)
321 std::vector
<Value
*> args
;
322 for (auto arg
: argsList
)
324 return CALLA(Callee
, args
);
327 #if HAVE_LLVM > 0x306
328 CallInst
*Builder::CALL(Value
*Callee
, Value
* arg
)
330 std::vector
<Value
*> args
;
332 return CALLA(Callee
, args
);
335 CallInst
*Builder::CALL2(Value
*Callee
, Value
* arg1
, Value
* arg2
)
337 std::vector
<Value
*> args
;
338 args
.push_back(arg1
);
339 args
.push_back(arg2
);
340 return CALLA(Callee
, args
);
343 CallInst
*Builder::CALL3(Value
*Callee
, Value
* arg1
, Value
* arg2
, Value
* arg3
)
345 std::vector
<Value
*> args
;
346 args
.push_back(arg1
);
347 args
.push_back(arg2
);
348 args
.push_back(arg3
);
349 return CALLA(Callee
, args
);
353 Value
*Builder::VRCP(Value
*va
)
355 return FDIV(VIMMED1(1.0f
), va
); // 1 / a
358 Value
*Builder::VPLANEPS(Value
* vA
, Value
* vB
, Value
* vC
, Value
* &vX
, Value
* &vY
)
360 Value
* vOut
= FMADDPS(vA
, vX
, vC
);
361 vOut
= FMADDPS(vB
, vY
, vOut
);
365 //////////////////////////////////////////////////////////////////////////
366 /// @brief Generate an i32 masked load operation in LLVM IR. If not
367 /// supported on the underlying platform, emulate it with float masked load
368 /// @param src - base address pointer for the load
369 /// @param vMask - SIMD wide mask that controls whether to access memory load 0
370 Value
*Builder::MASKLOADD(Value
* src
,Value
* mask
)
373 // use avx2 gather instruction is available
374 if(JM()->mArch
.AVX2())
376 Function
*func
= Intrinsic::getDeclaration(JM()->mpCurrentModule
, Intrinsic::x86_avx2_maskload_d_256
);
377 vResult
= CALL(func
,{src
,mask
});
381 // maskload intrinsic expects integer mask operand in llvm >= 3.8
382 #if (LLVM_VERSION_MAJOR > 3) || (LLVM_VERSION_MAJOR == 3 && LLVM_VERSION_MINOR >= 8)
383 mask
= BITCAST(mask
,VectorType::get(mInt32Ty
,mVWidth
));
385 mask
= BITCAST(mask
,VectorType::get(mFP32Ty
,mVWidth
));
387 Function
*func
= Intrinsic::getDeclaration(JM()->mpCurrentModule
,Intrinsic::x86_avx_maskload_ps_256
);
388 vResult
= BITCAST(CALL(func
,{src
,mask
}), VectorType::get(mInt32Ty
,mVWidth
));
393 //////////////////////////////////////////////////////////////////////////
394 /// @brief insert a JIT call to CallPrint
395 /// - outputs formatted string to both stdout and VS output window
396 /// - DEBUG builds only
398 /// PRINT("index %d = 0x%p\n",{C(lane), pIndex});
399 /// where C(lane) creates a constant value to print, and pIndex is the Value*
400 /// result from a GEP, printing out the pointer to memory
401 /// @param printStr - constant string to print, which includes format specifiers
402 /// @param printArgs - initializer list of Value*'s to print to std out
403 CallInst
*Builder::PRINT(const std::string
&printStr
,const std::initializer_list
<Value
*> &printArgs
)
405 // push the arguments to CallPrint into a vector
406 std::vector
<Value
*> printCallArgs
;
407 // save room for the format string. we still need to modify it for vectors
408 printCallArgs
.resize(1);
410 // search through the format string for special processing
412 std::string
tempStr(printStr
);
413 pos
= tempStr
.find('%', pos
);
414 auto v
= printArgs
.begin();
416 while ((pos
!= std::string::npos
) && (v
!= printArgs
.end()))
419 Type
* pType
= pArg
->getType();
421 if (pType
->isVectorTy())
423 Type
* pContainedType
= pType
->getContainedType(0);
425 if (toupper(tempStr
[pos
+ 1]) == 'X')
428 tempStr
[pos
+ 1] = 'x';
429 tempStr
.insert(pos
+ 2, "%08X ");
432 printCallArgs
.push_back(VEXTRACT(pArg
, C(0)));
434 std::string vectorFormatStr
;
435 for (uint32_t i
= 1; i
< pType
->getVectorNumElements(); ++i
)
437 vectorFormatStr
+= "0x%08X ";
438 printCallArgs
.push_back(VEXTRACT(pArg
, C(i
)));
441 tempStr
.insert(pos
, vectorFormatStr
);
442 pos
+= vectorFormatStr
.size();
444 else if ((tempStr
[pos
+ 1] == 'f') && (pContainedType
->isFloatTy()))
447 for (; i
< (pArg
->getType()->getVectorNumElements()) - 1; i
++)
449 tempStr
.insert(pos
, std::string("%f "));
451 printCallArgs
.push_back(FP_EXT(VEXTRACT(pArg
, C(i
)), Type::getDoubleTy(JM()->mContext
)));
453 printCallArgs
.push_back(FP_EXT(VEXTRACT(pArg
, C(i
)), Type::getDoubleTy(JM()->mContext
)));
455 else if ((tempStr
[pos
+ 1] == 'd') && (pContainedType
->isIntegerTy()))
458 for (; i
< (pArg
->getType()->getVectorNumElements()) - 1; i
++)
460 tempStr
.insert(pos
, std::string("%d "));
462 printCallArgs
.push_back(VEXTRACT(pArg
, C(i
)));
464 printCallArgs
.push_back(VEXTRACT(pArg
, C(i
)));
469 if (toupper(tempStr
[pos
+ 1]) == 'X')
472 tempStr
.insert(pos
+ 1, "x%08");
473 printCallArgs
.push_back(pArg
);
476 // for %f we need to cast float Values to doubles so that they print out correctly
477 else if ((tempStr
[pos
+ 1] == 'f') && (pType
->isFloatTy()))
479 printCallArgs
.push_back(FP_EXT(pArg
, Type::getDoubleTy(JM()->mContext
)));
484 printCallArgs
.push_back(pArg
);
488 // advance to the next arguement
490 pos
= tempStr
.find('%', ++pos
);
493 // create global variable constant string
494 Constant
*constString
= ConstantDataArray::getString(JM()->mContext
,tempStr
,true);
495 GlobalVariable
*gvPtr
= new GlobalVariable(constString
->getType(),true,GlobalValue::InternalLinkage
,constString
,"printStr");
496 JM()->mpCurrentModule
->getGlobalList().push_back(gvPtr
);
498 // get a pointer to the first character in the constant string array
499 std::vector
<Constant
*> geplist
{C(0),C(0)};
500 #if HAVE_LLVM == 0x306
501 Constant
*strGEP
= ConstantExpr::getGetElementPtr(gvPtr
,geplist
,false);
503 Constant
*strGEP
= ConstantExpr::getGetElementPtr(nullptr, gvPtr
,geplist
,false);
506 // insert the pointer to the format string in the argument vector
507 printCallArgs
[0] = strGEP
;
509 // get pointer to CallPrint function and insert decl into the module if needed
510 std::vector
<Type
*> args
;
511 args
.push_back(PointerType::get(mInt8Ty
,0));
512 FunctionType
* callPrintTy
= FunctionType::get(Type::getVoidTy(JM()->mContext
),args
,true);
513 Function
*callPrintFn
= cast
<Function
>(JM()->mpCurrentModule
->getOrInsertFunction("CallPrint", callPrintTy
));
515 // if we haven't yet added the symbol to the symbol table
516 if((sys::DynamicLibrary::SearchForAddressOfSymbol("CallPrint")) == nullptr)
518 sys::DynamicLibrary::AddSymbol("CallPrint", (void *)&CallPrint
);
521 // insert a call to CallPrint
522 return CALLA(callPrintFn
,printCallArgs
);
525 //////////////////////////////////////////////////////////////////////////
526 /// @brief Wrapper around PRINT with initializer list.
527 CallInst
* Builder::PRINT(const std::string
&printStr
)
529 return PRINT(printStr
, {});
532 //////////////////////////////////////////////////////////////////////////
533 /// @brief Generate a masked gather operation in LLVM IR. If not
534 /// supported on the underlying platform, emulate it with loads
535 /// @param vSrc - SIMD wide value that will be loaded if mask is invalid
536 /// @param pBase - Int8* base VB address pointer value
537 /// @param vIndices - SIMD wide value of VB byte offsets
538 /// @param vMask - SIMD wide mask that controls whether to access memory or the src values
539 /// @param scale - value to scale indices by
540 Value
*Builder::GATHERPS(Value
* vSrc
, Value
* pBase
, Value
* vIndices
, Value
* vMask
, Value
* scale
)
544 // use avx2 gather instruction if available
545 if(JM()->mArch
.AVX2())
547 // force mask to <N x float>, required by vgather
548 vMask
= BITCAST(vMask
, mSimdFP32Ty
);
549 vGather
= VGATHERPS(vSrc
,pBase
,vIndices
,vMask
,scale
);
553 Value
* pStack
= STACKSAVE();
555 // store vSrc on the stack. this way we can select between a valid load address and the vSrc address
556 Value
* vSrcPtr
= ALLOCA(vSrc
->getType());
557 STORE(vSrc
, vSrcPtr
);
559 vGather
= VUNDEF_F();
560 Value
*vScaleVec
= VBROADCAST(Z_EXT(scale
,mInt32Ty
));
561 Value
*vOffsets
= MUL(vIndices
,vScaleVec
);
562 Value
*mask
= MASK(vMask
);
563 for(uint32_t i
= 0; i
< mVWidth
; ++i
)
565 // single component byte index
566 Value
*offset
= VEXTRACT(vOffsets
,C(i
));
567 // byte pointer to component
568 Value
*loadAddress
= GEP(pBase
,offset
);
569 loadAddress
= BITCAST(loadAddress
,PointerType::get(mFP32Ty
,0));
570 // pointer to the value to load if we're masking off a component
571 Value
*maskLoadAddress
= GEP(vSrcPtr
,{C(0), C(i
)});
572 Value
*selMask
= VEXTRACT(mask
,C(i
));
573 // switch in a safe address to load if we're trying to access a vertex
574 Value
*validAddress
= SELECT(selMask
, loadAddress
, maskLoadAddress
);
575 Value
*val
= LOAD(validAddress
);
576 vGather
= VINSERT(vGather
,val
,C(i
));
578 STACKRESTORE(pStack
);
584 //////////////////////////////////////////////////////////////////////////
585 /// @brief Generate a masked gather operation in LLVM IR. If not
586 /// supported on the underlying platform, emulate it with loads
587 /// @param vSrc - SIMD wide value that will be loaded if mask is invalid
588 /// @param pBase - Int8* base VB address pointer value
589 /// @param vIndices - SIMD wide value of VB byte offsets
590 /// @param vMask - SIMD wide mask that controls whether to access memory or the src values
591 /// @param scale - value to scale indices by
592 Value
*Builder::GATHERDD(Value
* vSrc
, Value
* pBase
, Value
* vIndices
, Value
* vMask
, Value
* scale
)
596 // use avx2 gather instruction if available
597 if(JM()->mArch
.AVX2())
599 vGather
= VGATHERDD(vSrc
, pBase
, vIndices
, vMask
, scale
);
603 Value
* pStack
= STACKSAVE();
605 // store vSrc on the stack. this way we can select between a valid load address and the vSrc address
606 Value
* vSrcPtr
= ALLOCA(vSrc
->getType());
607 STORE(vSrc
, vSrcPtr
);
609 vGather
= VUNDEF_I();
610 Value
*vScaleVec
= VBROADCAST(Z_EXT(scale
, mInt32Ty
));
611 Value
*vOffsets
= MUL(vIndices
, vScaleVec
);
612 Value
*mask
= MASK(vMask
);
613 for(uint32_t i
= 0; i
< mVWidth
; ++i
)
615 // single component byte index
616 Value
*offset
= VEXTRACT(vOffsets
, C(i
));
617 // byte pointer to component
618 Value
*loadAddress
= GEP(pBase
, offset
);
619 loadAddress
= BITCAST(loadAddress
, PointerType::get(mInt32Ty
, 0));
620 // pointer to the value to load if we're masking off a component
621 Value
*maskLoadAddress
= GEP(vSrcPtr
, {C(0), C(i
)});
622 Value
*selMask
= VEXTRACT(mask
, C(i
));
623 // switch in a safe address to load if we're trying to access a vertex
624 Value
*validAddress
= SELECT(selMask
, loadAddress
, maskLoadAddress
);
625 Value
*val
= LOAD(validAddress
, C(0));
626 vGather
= VINSERT(vGather
, val
, C(i
));
629 STACKRESTORE(pStack
);
634 //////////////////////////////////////////////////////////////////////////
635 /// @brief convert x86 <N x float> mask to llvm <N x i1> mask
636 Value
* Builder::MASK(Value
* vmask
)
638 Value
* src
= BITCAST(vmask
, mSimdInt32Ty
);
639 return ICMP_SLT(src
, VIMMED1(0));
642 //////////////////////////////////////////////////////////////////////////
643 /// @brief convert llvm <N x i1> mask to x86 <N x i32> mask
644 Value
* Builder::VMASK(Value
* mask
)
646 return S_EXT(mask
, mSimdInt32Ty
);
649 //////////////////////////////////////////////////////////////////////////
650 /// @brief Generate a VPSHUFB operation in LLVM IR. If not
651 /// supported on the underlying platform, emulate it
652 /// @param a - 256bit SIMD(32x8bit) of 8bit integer values
653 /// @param b - 256bit SIMD(32x8bit) of 8bit integer mask values
654 /// Byte masks in lower 128 lane of b selects 8 bit values from lower
655 /// 128bits of a, and vice versa for the upper lanes. If the mask
656 /// value is negative, '0' is inserted.
657 Value
*Builder::PSHUFB(Value
* a
, Value
* b
)
660 // use avx2 pshufb instruction if available
661 if(JM()->mArch
.AVX2())
667 Constant
* cB
= dyn_cast
<Constant
>(b
);
668 // number of 8 bit elements in b
669 uint32_t numElms
= cast
<VectorType
>(cB
->getType())->getNumElements();
671 Value
* vShuf
= UndefValue::get(VectorType::get(mInt8Ty
, numElms
));
673 // insert an 8 bit value from the high and low lanes of a per loop iteration
675 for(uint32_t i
= 0; i
< numElms
; i
++)
677 ConstantInt
* cLow128b
= cast
<ConstantInt
>(cB
->getAggregateElement(i
));
678 ConstantInt
* cHigh128b
= cast
<ConstantInt
>(cB
->getAggregateElement(i
+ numElms
));
680 // extract values from constant mask
681 char valLow128bLane
= (char)(cLow128b
->getSExtValue());
682 char valHigh128bLane
= (char)(cHigh128b
->getSExtValue());
684 Value
* insertValLow128b
;
685 Value
* insertValHigh128b
;
687 // if the mask value is negative, insert a '0' in the respective output position
688 // otherwise, lookup the value at mask position (bits 3..0 of the respective mask byte) in a and insert in output vector
689 insertValLow128b
= (valLow128bLane
< 0) ? C((char)0) : VEXTRACT(a
, C((valLow128bLane
& 0xF)));
690 insertValHigh128b
= (valHigh128bLane
< 0) ? C((char)0) : VEXTRACT(a
, C((valHigh128bLane
& 0xF) + numElms
));
692 vShuf
= VINSERT(vShuf
, insertValLow128b
, i
);
693 vShuf
= VINSERT(vShuf
, insertValHigh128b
, (i
+ numElms
));
700 //////////////////////////////////////////////////////////////////////////
701 /// @brief Generate a VPSHUFB operation (sign extend 8 8bit values to 32
702 /// bits)in LLVM IR. If not supported on the underlying platform, emulate it
703 /// @param a - 128bit SIMD lane(16x8bit) of 8bit integer values. Only
704 /// lower 8 values are used.
705 Value
*Builder::PMOVSXBD(Value
* a
)
707 // llvm-3.9 removed the pmovsxbd intrinsic
708 #if HAVE_LLVM < 0x309
709 // use avx2 byte sign extend instruction if available
710 if(JM()->mArch
.AVX2())
712 Function
*pmovsxbd
= Intrinsic::getDeclaration(JM()->mpCurrentModule
, Intrinsic::x86_avx2_pmovsxbd
);
713 return CALL(pmovsxbd
, std::initializer_list
<Value
*>{a
});
718 // VPMOVSXBD output type
719 Type
* v8x32Ty
= VectorType::get(mInt32Ty
, 8);
720 // Extract 8 values from 128bit lane and sign extend
721 return S_EXT(VSHUFFLE(a
, a
, C
<int>({0, 1, 2, 3, 4, 5, 6, 7})), v8x32Ty
);
725 //////////////////////////////////////////////////////////////////////////
726 /// @brief Generate a VPSHUFB operation (sign extend 8 16bit values to 32
727 /// bits)in LLVM IR. If not supported on the underlying platform, emulate it
728 /// @param a - 128bit SIMD lane(8x16bit) of 16bit integer values.
729 Value
*Builder::PMOVSXWD(Value
* a
)
731 // llvm-3.9 removed the pmovsxwd intrinsic
732 #if HAVE_LLVM < 0x309
733 // use avx2 word sign extend if available
734 if(JM()->mArch
.AVX2())
736 Function
*pmovsxwd
= Intrinsic::getDeclaration(JM()->mpCurrentModule
, Intrinsic::x86_avx2_pmovsxwd
);
737 return CALL(pmovsxwd
, std::initializer_list
<Value
*>{a
});
742 // VPMOVSXWD output type
743 Type
* v8x32Ty
= VectorType::get(mInt32Ty
, 8);
744 // Extract 8 values from 128bit lane and sign extend
745 return S_EXT(VSHUFFLE(a
, a
, C
<int>({0, 1, 2, 3, 4, 5, 6, 7})), v8x32Ty
);
749 //////////////////////////////////////////////////////////////////////////
750 /// @brief Generate a VPERMD operation (shuffle 32 bit integer values
751 /// across 128 bit lanes) in LLVM IR. If not supported on the underlying
752 /// platform, emulate it
753 /// @param a - 256bit SIMD lane(8x32bit) of integer values.
754 /// @param idx - 256bit SIMD lane(8x32bit) of 3 bit lane index values
755 Value
*Builder::PERMD(Value
* a
, Value
* idx
)
758 // use avx2 permute instruction if available
759 if(JM()->mArch
.AVX2())
761 res
= VPERMD(a
, idx
);
765 if (isa
<Constant
>(idx
))
767 res
= VSHUFFLE(a
, a
, idx
);
772 for (uint32_t l
= 0; l
< JM()->mVWidth
; ++l
)
774 Value
* pIndex
= VEXTRACT(idx
, C(l
));
775 Value
* pVal
= VEXTRACT(a
, pIndex
);
776 res
= VINSERT(res
, pVal
, C(l
));
783 //////////////////////////////////////////////////////////////////////////
784 /// @brief Generate a VPERMPS operation (shuffle 32 bit float values
785 /// across 128 bit lanes) in LLVM IR. If not supported on the underlying
786 /// platform, emulate it
787 /// @param a - 256bit SIMD lane(8x32bit) of float values.
788 /// @param idx - 256bit SIMD lane(8x32bit) of 3 bit lane index values
789 Value
*Builder::PERMPS(Value
* a
, Value
* idx
)
792 // use avx2 permute instruction if available
793 if (JM()->mArch
.AVX2())
795 // llvm 3.6.0 swapped the order of the args to vpermd
796 res
= VPERMPS(idx
, a
);
800 if (isa
<Constant
>(idx
))
802 res
= VSHUFFLE(a
, a
, idx
);
807 for (uint32_t l
= 0; l
< JM()->mVWidth
; ++l
)
809 Value
* pIndex
= VEXTRACT(idx
, C(l
));
810 Value
* pVal
= VEXTRACT(a
, pIndex
);
811 res
= VINSERT(res
, pVal
, C(l
));
819 //////////////////////////////////////////////////////////////////////////
820 /// @brief Generate a VCVTPH2PS operation (float16->float32 conversion)
821 /// in LLVM IR. If not supported on the underlying platform, emulate it
822 /// @param a - 128bit SIMD lane(8x16bit) of float16 in int16 format.
823 Value
*Builder::CVTPH2PS(Value
* a
)
825 if (JM()->mArch
.F16C())
831 FunctionType
* pFuncTy
= FunctionType::get(mFP32Ty
, mInt16Ty
);
832 Function
* pCvtPh2Ps
= cast
<Function
>(JM()->mpCurrentModule
->getOrInsertFunction("ConvertSmallFloatTo32", pFuncTy
));
834 if (sys::DynamicLibrary::SearchForAddressOfSymbol("ConvertSmallFloatTo32") == nullptr)
836 sys::DynamicLibrary::AddSymbol("ConvertSmallFloatTo32", (void *)&ConvertSmallFloatTo32
);
839 Value
* pResult
= UndefValue::get(mSimdFP32Ty
);
840 for (uint32_t i
= 0; i
< mVWidth
; ++i
)
842 Value
* pSrc
= VEXTRACT(a
, C(i
));
843 Value
* pConv
= CALL(pCvtPh2Ps
, std::initializer_list
<Value
*>{pSrc
});
844 pResult
= VINSERT(pResult
, pConv
, C(i
));
851 //////////////////////////////////////////////////////////////////////////
852 /// @brief Generate a VCVTPS2PH operation (float32->float16 conversion)
853 /// in LLVM IR. If not supported on the underlying platform, emulate it
854 /// @param a - 128bit SIMD lane(8x16bit) of float16 in int16 format.
855 Value
*Builder::CVTPS2PH(Value
* a
, Value
* rounding
)
857 if (JM()->mArch
.F16C())
859 return VCVTPS2PH(a
, rounding
);
863 // call scalar C function for now
864 FunctionType
* pFuncTy
= FunctionType::get(mInt16Ty
, mFP32Ty
);
865 Function
* pCvtPs2Ph
= cast
<Function
>(JM()->mpCurrentModule
->getOrInsertFunction("Convert32To16Float", pFuncTy
));
867 if (sys::DynamicLibrary::SearchForAddressOfSymbol("Convert32To16Float") == nullptr)
869 sys::DynamicLibrary::AddSymbol("Convert32To16Float", (void *)&Convert32To16Float
);
872 Value
* pResult
= UndefValue::get(mSimdInt16Ty
);
873 for (uint32_t i
= 0; i
< mVWidth
; ++i
)
875 Value
* pSrc
= VEXTRACT(a
, C(i
));
876 Value
* pConv
= CALL(pCvtPs2Ph
, std::initializer_list
<Value
*>{pSrc
});
877 pResult
= VINSERT(pResult
, pConv
, C(i
));
884 Value
*Builder::PMAXSD(Value
* a
, Value
* b
)
886 // llvm-3.9 removed the pmax intrinsics
887 #if HAVE_LLVM >= 0x309
888 Value
* cmp
= ICMP_SGT(a
, b
);
889 return SELECT(cmp
, a
, b
);
891 if (JM()->mArch
.AVX2())
893 Function
* pmaxsd
= Intrinsic::getDeclaration(JM()->mpCurrentModule
, Intrinsic::x86_avx2_pmaxs_d
);
894 return CALL(pmaxsd
, {a
, b
});
898 // use 4-wide sse max intrinsic on lower/upper halves of 8-wide sources
899 Function
* pmaxsd
= Intrinsic::getDeclaration(JM()->mpCurrentModule
, Intrinsic::x86_sse41_pmaxsd
);
902 Value
* aLo
= VEXTRACTI128(a
, C((uint8_t)0));
903 Value
* bLo
= VEXTRACTI128(b
, C((uint8_t)0));
904 Value
* resLo
= CALL(pmaxsd
, {aLo
, bLo
});
907 Value
* aHi
= VEXTRACTI128(a
, C((uint8_t)1));
908 Value
* bHi
= VEXTRACTI128(b
, C((uint8_t)1));
909 Value
* resHi
= CALL(pmaxsd
, {aHi
, bHi
});
912 Value
* result
= VINSERTI128(VUNDEF_I(), resLo
, C((uint8_t)0));
913 result
= VINSERTI128(result
, resHi
, C((uint8_t)1));
920 Value
*Builder::PMINSD(Value
* a
, Value
* b
)
922 // llvm-3.9 removed the pmin intrinsics
923 #if HAVE_LLVM >= 0x309
924 Value
* cmp
= ICMP_SLT(a
, b
);
925 return SELECT(cmp
, a
, b
);
927 if (JM()->mArch
.AVX2())
929 Function
* pminsd
= Intrinsic::getDeclaration(JM()->mpCurrentModule
, Intrinsic::x86_avx2_pmins_d
);
930 return CALL(pminsd
, {a
, b
});
934 // use 4-wide sse max intrinsic on lower/upper halves of 8-wide sources
935 Function
* pminsd
= Intrinsic::getDeclaration(JM()->mpCurrentModule
, Intrinsic::x86_sse41_pminsd
);
938 Value
* aLo
= VEXTRACTI128(a
, C((uint8_t)0));
939 Value
* bLo
= VEXTRACTI128(b
, C((uint8_t)0));
940 Value
* resLo
= CALL(pminsd
, {aLo
, bLo
});
943 Value
* aHi
= VEXTRACTI128(a
, C((uint8_t)1));
944 Value
* bHi
= VEXTRACTI128(b
, C((uint8_t)1));
945 Value
* resHi
= CALL(pminsd
, {aHi
, bHi
});
948 Value
* result
= VINSERTI128(VUNDEF_I(), resLo
, C((uint8_t)0));
949 result
= VINSERTI128(result
, resHi
, C((uint8_t)1));
956 void Builder::Gather4(const SWR_FORMAT format
, Value
* pSrcBase
, Value
* byteOffsets
,
957 Value
* mask
, Value
* vGatherComponents
[], bool bPackedOutput
)
959 const SWR_FORMAT_INFO
&info
= GetFormatInfo(format
);
960 if(info
.type
[0] == SWR_TYPE_FLOAT
&& info
.bpc
[0] == 32)
962 // ensure our mask is the correct type
963 mask
= BITCAST(mask
, mSimdFP32Ty
);
964 GATHER4PS(info
, pSrcBase
, byteOffsets
, mask
, vGatherComponents
, bPackedOutput
);
968 // ensure our mask is the correct type
969 mask
= BITCAST(mask
, mSimdInt32Ty
);
970 GATHER4DD(info
, pSrcBase
, byteOffsets
, mask
, vGatherComponents
, bPackedOutput
);
974 void Builder::GATHER4PS(const SWR_FORMAT_INFO
&info
, Value
* pSrcBase
, Value
* byteOffsets
,
975 Value
* mask
, Value
* vGatherComponents
[], bool bPackedOutput
)
977 switch(info
.bpp
/ info
.numComps
)
981 Value
* vGatherResult
[2];
984 // TODO: vGatherMaskedVal
985 Value
* vGatherMaskedVal
= VIMMED1((float)0);
987 // always have at least one component out of x or y to fetch
989 // save mask as it is zero'd out after each gather
992 vGatherResult
[0] = GATHERPS(vGatherMaskedVal
, pSrcBase
, byteOffsets
, vMask
, C((char)1));
993 // e.g. result of first 8x32bit integer gather for 16bit components
994 // 256i - 0 1 2 3 4 5 6 7
995 // xyxy xyxy xyxy xyxy xyxy xyxy xyxy xyxy
998 // if we have at least one component out of x or y to fetch
999 if(info
.numComps
> 2)
1001 // offset base to the next components(zw) in the vertex to gather
1002 pSrcBase
= GEP(pSrcBase
, C((char)4));
1005 vGatherResult
[1] = GATHERPS(vGatherMaskedVal
, pSrcBase
, byteOffsets
, vMask
, C((char)1));
1006 // e.g. result of second 8x32bit integer gather for 16bit components
1007 // 256i - 0 1 2 3 4 5 6 7
1008 // zwzw zwzw zwzw zwzw zwzw zwzw zwzw zwzw
1013 vGatherResult
[1] = vGatherMaskedVal
;
1016 // Shuffle gathered components into place, each row is a component
1017 Shuffle16bpcGather4(info
, vGatherResult
, vGatherComponents
, bPackedOutput
);
1023 for (uint32_t i
= 0; i
< 4; ++i
)
1025 vGatherComponents
[i
] = VIMMED1(*(float*)&info
.defaults
[i
]);
1028 for(uint32_t i
= 0; i
< info
.numComps
; i
++)
1030 uint32_t swizzleIndex
= info
.swizzle
[i
];
1032 // save mask as it is zero'd out after each gather
1033 Value
*vMask
= mask
;
1035 // Gather a SIMD of components
1036 vGatherComponents
[swizzleIndex
] = GATHERPS(vGatherComponents
[swizzleIndex
], pSrcBase
, byteOffsets
, vMask
, C((char)1));
1038 // offset base to the next component to gather
1039 pSrcBase
= GEP(pSrcBase
, C((char)4));
1044 SWR_ASSERT(0, "Invalid float format");
1049 void Builder::GATHER4DD(const SWR_FORMAT_INFO
&info
, Value
* pSrcBase
, Value
* byteOffsets
,
1050 Value
* mask
, Value
* vGatherComponents
[], bool bPackedOutput
)
1052 switch (info
.bpp
/ info
.numComps
)
1056 Value
* vGatherMaskedVal
= VIMMED1((int32_t)0);
1057 Value
* vGatherResult
= GATHERDD(vGatherMaskedVal
, pSrcBase
, byteOffsets
, mask
, C((char)1));
1058 // e.g. result of an 8x32bit integer gather for 8bit components
1059 // 256i - 0 1 2 3 4 5 6 7
1060 // xyzw xyzw xyzw xyzw xyzw xyzw xyzw xyzw
1062 Shuffle8bpcGather4(info
, vGatherResult
, vGatherComponents
, bPackedOutput
);
1067 Value
* vGatherResult
[2];
1070 // TODO: vGatherMaskedVal
1071 Value
* vGatherMaskedVal
= VIMMED1((int32_t)0);
1073 // always have at least one component out of x or y to fetch
1075 // save mask as it is zero'd out after each gather
1078 vGatherResult
[0] = GATHERDD(vGatherMaskedVal
, pSrcBase
, byteOffsets
, vMask
, C((char)1));
1079 // e.g. result of first 8x32bit integer gather for 16bit components
1080 // 256i - 0 1 2 3 4 5 6 7
1081 // xyxy xyxy xyxy xyxy xyxy xyxy xyxy xyxy
1084 // if we have at least one component out of x or y to fetch
1085 if(info
.numComps
> 2)
1087 // offset base to the next components(zw) in the vertex to gather
1088 pSrcBase
= GEP(pSrcBase
, C((char)4));
1091 vGatherResult
[1] = GATHERDD(vGatherMaskedVal
, pSrcBase
, byteOffsets
, vMask
, C((char)1));
1092 // e.g. result of second 8x32bit integer gather for 16bit components
1093 // 256i - 0 1 2 3 4 5 6 7
1094 // zwzw zwzw zwzw zwzw zwzw zwzw zwzw zwzw
1099 vGatherResult
[1] = vGatherMaskedVal
;
1102 // Shuffle gathered components into place, each row is a component
1103 Shuffle16bpcGather4(info
, vGatherResult
, vGatherComponents
, bPackedOutput
);
1110 for (uint32_t i
= 0; i
< 4; ++i
)
1112 vGatherComponents
[i
] = VIMMED1((int)info
.defaults
[i
]);
1115 for(uint32_t i
= 0; i
< info
.numComps
; i
++)
1117 uint32_t swizzleIndex
= info
.swizzle
[i
];
1119 // save mask as it is zero'd out after each gather
1120 Value
*vMask
= mask
;
1122 // Gather a SIMD of components
1123 vGatherComponents
[swizzleIndex
] = GATHERDD(vGatherComponents
[swizzleIndex
], pSrcBase
, byteOffsets
, vMask
, C((char)1));
1125 // offset base to the next component to gather
1126 pSrcBase
= GEP(pSrcBase
, C((char)4));
1131 SWR_ASSERT(0, "unsupported format");
1136 void Builder::Shuffle16bpcGather4(const SWR_FORMAT_INFO
&info
, Value
* vGatherInput
[2], Value
* vGatherOutput
[4], bool bPackedOutput
)
1139 Type
* vGatherTy
= VectorType::get(IntegerType::getInt32Ty(JM()->mContext
), mVWidth
);
1140 Type
* v32x8Ty
= VectorType::get(mInt8Ty
, mVWidth
* 4); // vwidth is units of 32 bits
1142 // input could either be float or int vector; do shuffle work in int
1143 vGatherInput
[0] = BITCAST(vGatherInput
[0], mSimdInt32Ty
);
1144 vGatherInput
[1] = BITCAST(vGatherInput
[1], mSimdInt32Ty
);
1148 Type
* v128bitTy
= VectorType::get(IntegerType::getIntNTy(JM()->mContext
, 128), mVWidth
/ 4); // vwidth is units of 32 bits
1151 Value
* vConstMask
= C
<char>({0, 1, 4, 5, 8, 9, 12, 13, 2, 3, 6, 7, 10, 11, 14, 15,
1152 0, 1, 4, 5, 8, 9, 12, 13, 2, 3, 6, 7, 10, 11, 14, 15});
1153 Value
* vShufResult
= BITCAST(PSHUFB(BITCAST(vGatherInput
[0], v32x8Ty
), vConstMask
), vGatherTy
);
1154 // after pshufb: group components together in each 128bit lane
1155 // 256i - 0 1 2 3 4 5 6 7
1156 // xxxx xxxx yyyy yyyy xxxx xxxx yyyy yyyy
1158 Value
* vi128XY
= BITCAST(PERMD(vShufResult
, C
<int32_t>({0, 1, 4, 5, 2, 3, 6, 7})), v128bitTy
);
1159 // after PERMD: move and pack xy components into each 128bit lane
1160 // 256i - 0 1 2 3 4 5 6 7
1161 // xxxx xxxx xxxx xxxx yyyy yyyy yyyy yyyy
1163 // do the same for zw components
1164 Value
* vi128ZW
= nullptr;
1165 if(info
.numComps
> 2)
1167 Value
* vShufResult
= BITCAST(PSHUFB(BITCAST(vGatherInput
[1], v32x8Ty
), vConstMask
), vGatherTy
);
1168 vi128ZW
= BITCAST(PERMD(vShufResult
, C
<int32_t>({0, 1, 4, 5, 2, 3, 6, 7})), v128bitTy
);
1171 for(uint32_t i
= 0; i
< 4; i
++)
1173 uint32_t swizzleIndex
= info
.swizzle
[i
];
1174 // todo: fixed for packed
1175 Value
* vGatherMaskedVal
= VIMMED1((int32_t)(info
.defaults
[i
]));
1176 if(i
>= info
.numComps
)
1178 // set the default component val
1179 vGatherOutput
[swizzleIndex
] = vGatherMaskedVal
;
1183 // if x or z, extract 128bits from lane 0, else for y or w, extract from lane 1
1184 uint32_t lane
= ((i
== 0) || (i
== 2)) ? 0 : 1;
1185 // if x or y, use vi128XY permute result, else use vi128ZW
1186 Value
* selectedPermute
= (i
< 2) ? vi128XY
: vi128ZW
;
1188 // extract packed component 128 bit lanes
1189 vGatherOutput
[swizzleIndex
] = VEXTRACT(selectedPermute
, C(lane
));
1195 // pshufb masks for each component
1196 Value
* vConstMask
[2];
1198 vConstMask
[0] = C
<char>({0, 1, -1, -1, 4, 5, -1, -1, 8, 9, -1, -1, 12, 13, -1, -1,
1199 0, 1, -1, -1, 4, 5, -1, -1, 8, 9, -1, -1, 12, 13, -1, -1, });
1202 vConstMask
[1] = C
<char>({2, 3, -1, -1, 6, 7, -1, -1, 10, 11, -1, -1, 14, 15, -1, -1,
1203 2, 3, -1, -1, 6, 7, -1, -1, 10, 11, -1, -1, 14, 15, -1, -1});
1206 // shuffle enabled components into lower word of each 32bit lane, 0 extending to 32 bits
1208 for (uint32_t i
= 0; i
< 4; ++i
)
1210 vGatherOutput
[i
] = VIMMED1((int32_t)info
.defaults
[i
]);
1213 for(uint32_t i
= 0; i
< info
.numComps
; i
++)
1215 uint32_t swizzleIndex
= info
.swizzle
[i
];
1217 // select correct constMask for x/z or y/w pshufb
1218 uint32_t selectedMask
= ((i
== 0) || (i
== 2)) ? 0 : 1;
1219 // if x or y, use vi128XY permute result, else use vi128ZW
1220 uint32_t selectedGather
= (i
< 2) ? 0 : 1;
1222 vGatherOutput
[swizzleIndex
] = BITCAST(PSHUFB(BITCAST(vGatherInput
[selectedGather
], v32x8Ty
), vConstMask
[selectedMask
]), vGatherTy
);
1223 // after pshufb mask for x channel; z uses the same shuffle from the second gather
1224 // 256i - 0 1 2 3 4 5 6 7
1225 // xx00 xx00 xx00 xx00 xx00 xx00 xx00 xx00
1230 void Builder::Shuffle8bpcGather4(const SWR_FORMAT_INFO
&info
, Value
* vGatherInput
, Value
* vGatherOutput
[], bool bPackedOutput
)
1233 Type
* vGatherTy
= VectorType::get(IntegerType::getInt32Ty(JM()->mContext
), mVWidth
);
1234 Type
* v32x8Ty
= VectorType::get(mInt8Ty
, mVWidth
* 4 ); // vwidth is units of 32 bits
1238 Type
* v128Ty
= VectorType::get(IntegerType::getIntNTy(JM()->mContext
, 128), mVWidth
/ 4); // vwidth is units of 32 bits
1240 Value
* vConstMask
= C
<char>({0, 4, 8, 12, 1, 5, 9, 13, 2, 6, 10, 14, 3, 7, 11, 15,
1241 0, 4, 8, 12, 1, 5, 9, 13, 2, 6, 10, 14, 3, 7, 11, 15});
1242 Value
* vShufResult
= BITCAST(PSHUFB(BITCAST(vGatherInput
, v32x8Ty
), vConstMask
), vGatherTy
);
1243 // after pshufb: group components together in each 128bit lane
1244 // 256i - 0 1 2 3 4 5 6 7
1245 // xxxx yyyy zzzz wwww xxxx yyyy zzzz wwww
1247 Value
* vi128XY
= BITCAST(PERMD(vShufResult
, C
<int32_t>({0, 4, 0, 0, 1, 5, 0, 0})), v128Ty
);
1248 // after PERMD: move and pack xy and zw components in low 64 bits of each 128bit lane
1249 // 256i - 0 1 2 3 4 5 6 7
1250 // xxxx xxxx dcdc dcdc yyyy yyyy dcdc dcdc (dc - don't care)
1252 // do the same for zw components
1253 Value
* vi128ZW
= nullptr;
1254 if(info
.numComps
> 2)
1256 vi128ZW
= BITCAST(PERMD(vShufResult
, C
<int32_t>({2, 6, 0, 0, 3, 7, 0, 0})), v128Ty
);
1259 // sign extend all enabled components. If we have a fill vVertexElements, output to current simdvertex
1260 for(uint32_t i
= 0; i
< 4; i
++)
1262 uint32_t swizzleIndex
= info
.swizzle
[i
];
1263 // todo: fix for packed
1264 Value
* vGatherMaskedVal
= VIMMED1((int32_t)(info
.defaults
[i
]));
1265 if(i
>= info
.numComps
)
1267 // set the default component val
1268 vGatherOutput
[swizzleIndex
] = vGatherMaskedVal
;
1272 // if x or z, extract 128bits from lane 0, else for y or w, extract from lane 1
1273 uint32_t lane
= ((i
== 0) || (i
== 2)) ? 0 : 1;
1274 // if x or y, use vi128XY permute result, else use vi128ZW
1275 Value
* selectedPermute
= (i
< 2) ? vi128XY
: vi128ZW
;
1278 vGatherOutput
[swizzleIndex
] = VEXTRACT(selectedPermute
, C(lane
));
1283 // shuffle enabled components into lower byte of each 32bit lane, 0 extending to 32 bits
1285 for (uint32_t i
= 0; i
< 4; ++i
)
1287 vGatherOutput
[i
] = VIMMED1((int32_t)info
.defaults
[i
]);
1290 for(uint32_t i
= 0; i
< info
.numComps
; i
++){
1291 uint32_t swizzleIndex
= info
.swizzle
[i
];
1293 // pshufb masks for each component
1299 vConstMask
= C
<char>({0, -1, -1, -1, 4, -1, -1, -1, 8, -1, -1, -1, 12, -1, -1, -1,
1300 0, -1, -1, -1, 4, -1, -1, -1, 8, -1, -1, -1, 12, -1, -1, -1});
1304 vConstMask
= C
<char>({1, -1, -1, -1, 5, -1, -1, -1, 9, -1, -1, -1, 13, -1, -1, -1,
1305 1, -1, -1, -1, 5, -1, -1, -1, 9, -1, -1, -1, 13, -1, -1, -1});
1309 vConstMask
= C
<char>({2, -1, -1, -1, 6, -1, -1, -1, 10, -1, -1, -1, 14, -1, -1, -1,
1310 2, -1, -1, -1, 6, -1, -1, -1, 10, -1, -1, -1, 14, -1, -1, -1});
1314 vConstMask
= C
<char>({3, -1, -1, -1, 7, -1, -1, -1, 11, -1, -1, -1, 15, -1, -1, -1,
1315 3, -1, -1, -1, 7, -1, -1, -1, 11, -1, -1, -1, 15, -1, -1, -1});
1318 vConstMask
= nullptr;
1322 vGatherOutput
[swizzleIndex
] = BITCAST(PSHUFB(BITCAST(vGatherInput
, v32x8Ty
), vConstMask
), vGatherTy
);
1323 // after pshufb for x channel
1324 // 256i - 0 1 2 3 4 5 6 7
1325 // x000 x000 x000 x000 x000 x000 x000 x000
1330 // Helper function to create alloca in entry block of function
1331 Value
* Builder::CreateEntryAlloca(Function
* pFunc
, Type
* pType
)
1333 auto saveIP
= IRB()->saveIP();
1334 IRB()->SetInsertPoint(&pFunc
->getEntryBlock(),
1335 pFunc
->getEntryBlock().begin());
1336 Value
* pAlloca
= ALLOCA(pType
);
1337 IRB()->restoreIP(saveIP
);
1341 //////////////////////////////////////////////////////////////////////////
1342 /// @brief emulates a scatter operation.
1343 /// @param pDst - pointer to destination
1344 /// @param vSrc - vector of src data to scatter
1345 /// @param vOffsets - vector of byte offsets from pDst
1346 /// @param vMask - mask of valid lanes
1347 void Builder::SCATTERPS(Value
* pDst
, Value
* vSrc
, Value
* vOffsets
, Value
* vMask
)
1349 /* Scatter algorithm
1351 while(Index = BitScanForward(mask))
1352 srcElem = srcVector[Index]
1353 offsetElem = offsetVector[Index]
1354 *(pDst + offsetElem) = srcElem
1355 Update mask (&= ~(1<<Index)
1359 BasicBlock
* pCurBB
= IRB()->GetInsertBlock();
1360 Function
* pFunc
= pCurBB
->getParent();
1361 Type
* pSrcTy
= vSrc
->getType()->getVectorElementType();
1363 // Store vectors on stack
1364 if (pScatterStackSrc
== nullptr)
1366 // Save off stack allocations and reuse per scatter. Significantly reduces stack
1367 // requirements for shaders with a lot of scatters.
1368 pScatterStackSrc
= CreateEntryAlloca(pFunc
, mSimdInt64Ty
);
1369 pScatterStackOffsets
= CreateEntryAlloca(pFunc
, mSimdInt32Ty
);
1372 Value
* pSrcArrayPtr
= BITCAST(pScatterStackSrc
, PointerType::get(vSrc
->getType(), 0));
1373 Value
* pOffsetsArrayPtr
= pScatterStackOffsets
;
1374 STORE(vSrc
, pSrcArrayPtr
);
1375 STORE(vOffsets
, pOffsetsArrayPtr
);
1377 // Cast to pointers for random access
1378 pSrcArrayPtr
= POINTER_CAST(pSrcArrayPtr
, PointerType::get(pSrcTy
, 0));
1379 pOffsetsArrayPtr
= POINTER_CAST(pOffsetsArrayPtr
, PointerType::get(mInt32Ty
, 0));
1381 Value
* pMask
= VMOVMSKPS(BITCAST(vMask
, mSimdFP32Ty
));
1383 // Get cttz function
1384 Function
* pfnCttz
= Intrinsic::getDeclaration(mpJitMgr
->mpCurrentModule
, Intrinsic::cttz
, { mInt32Ty
});
1386 // Setup loop basic block
1387 BasicBlock
* pLoop
= BasicBlock::Create(mpJitMgr
->mContext
, "Scatter Loop", pFunc
);
1389 // compute first set bit
1390 Value
* pIndex
= CALL(pfnCttz
, { pMask
, C(false) });
1392 Value
* pIsUndef
= ICMP_EQ(pIndex
, C(32));
1394 // Split current block
1395 BasicBlock
* pPostLoop
= pCurBB
->splitBasicBlock(cast
<Instruction
>(pIsUndef
)->getNextNode());
1397 // Remove unconditional jump created by splitBasicBlock
1398 pCurBB
->getTerminator()->eraseFromParent();
1400 // Add terminator to end of original block
1401 IRB()->SetInsertPoint(pCurBB
);
1403 // Add conditional branch
1404 COND_BR(pIsUndef
, pPostLoop
, pLoop
);
1406 // Add loop basic block contents
1407 IRB()->SetInsertPoint(pLoop
);
1408 PHINode
* pIndexPhi
= PHI(mInt32Ty
, 2);
1409 PHINode
* pMaskPhi
= PHI(mInt32Ty
, 2);
1411 pIndexPhi
->addIncoming(pIndex
, pCurBB
);
1412 pMaskPhi
->addIncoming(pMask
, pCurBB
);
1414 // Extract elements for this index
1415 Value
* pSrcElem
= LOADV(pSrcArrayPtr
, { pIndexPhi
});
1416 Value
* pOffsetElem
= LOADV(pOffsetsArrayPtr
, { pIndexPhi
});
1418 // GEP to this offset in dst
1419 Value
* pCurDst
= GEP(pDst
, pOffsetElem
);
1420 pCurDst
= POINTER_CAST(pCurDst
, PointerType::get(pSrcTy
, 0));
1421 STORE(pSrcElem
, pCurDst
);
1424 Value
* pNewMask
= AND(pMaskPhi
, NOT(SHL(C(1), pIndexPhi
)));
1427 Value
* pNewIndex
= CALL(pfnCttz
, { pNewMask
, C(false) });
1429 pIsUndef
= ICMP_EQ(pNewIndex
, C(32));
1430 COND_BR(pIsUndef
, pPostLoop
, pLoop
);
1433 pIndexPhi
->addIncoming(pNewIndex
, pLoop
);
1434 pMaskPhi
->addIncoming(pNewMask
, pLoop
);
1436 // Move builder to beginning of post loop
1437 IRB()->SetInsertPoint(pPostLoop
, pPostLoop
->begin());
1440 Value
* Builder::VABSPS(Value
* a
)
1442 Value
* asInt
= BITCAST(a
, mSimdInt32Ty
);
1443 Value
* result
= BITCAST(AND(asInt
, VIMMED1(0x7fffffff)), mSimdFP32Ty
);
1447 Value
*Builder::ICLAMP(Value
* src
, Value
* low
, Value
* high
)
1449 Value
*lowCmp
= ICMP_SLT(src
, low
);
1450 Value
*ret
= SELECT(lowCmp
, low
, src
);
1452 Value
*highCmp
= ICMP_SGT(ret
, high
);
1453 ret
= SELECT(highCmp
, high
, ret
);
1458 Value
*Builder::FCLAMP(Value
* src
, Value
* low
, Value
* high
)
1460 Value
*lowCmp
= FCMP_OLT(src
, low
);
1461 Value
*ret
= SELECT(lowCmp
, low
, src
);
1463 Value
*highCmp
= FCMP_OGT(ret
, high
);
1464 ret
= SELECT(highCmp
, high
, ret
);
1469 Value
*Builder::FCLAMP(Value
* src
, float low
, float high
)
1471 Value
* result
= VMAXPS(src
, VIMMED1(low
));
1472 result
= VMINPS(result
, VIMMED1(high
));
1477 //////////////////////////////////////////////////////////////////////////
1478 /// @brief save/restore stack, providing ability to push/pop the stack and
1479 /// reduce overall stack requirements for temporary stack use
1480 Value
* Builder::STACKSAVE()
1482 Function
* pfnStackSave
= Intrinsic::getDeclaration(JM()->mpCurrentModule
, Intrinsic::stacksave
);
1483 #if HAVE_LLVM == 0x306
1484 return CALL(pfnStackSave
);
1486 return CALLA(pfnStackSave
);
1490 void Builder::STACKRESTORE(Value
* pSaved
)
1492 Function
* pfnStackRestore
= Intrinsic::getDeclaration(JM()->mpCurrentModule
, Intrinsic::stackrestore
);
1493 CALL(pfnStackRestore
, std::initializer_list
<Value
*>{pSaved
});
1496 Value
*Builder::FMADDPS(Value
* a
, Value
* b
, Value
* c
)
1499 // use FMADs if available
1500 if(JM()->mArch
.AVX2())
1502 vOut
= VFMADDPS(a
, b
, c
);
1506 vOut
= FADD(FMUL(a
, b
), c
);
1511 Value
* Builder::POPCNT(Value
* a
)
1513 Function
* pCtPop
= Intrinsic::getDeclaration(JM()->mpCurrentModule
, Intrinsic::ctpop
, { a
->getType() });
1514 return CALL(pCtPop
, std::initializer_list
<Value
*>{a
});
1517 //////////////////////////////////////////////////////////////////////////
1518 /// @brief C functions called by LLVM IR
1519 //////////////////////////////////////////////////////////////////////////
1521 //////////////////////////////////////////////////////////////////////////
1522 /// @brief called in JIT code, inserted by PRINT
1523 /// output to both stdout and visual studio debug console
1524 void __cdecl
CallPrint(const char* fmt
, ...)
1527 va_start(args
, fmt
);
1530 #if defined( _WIN32 )
1532 vsnprintf_s(strBuf
, _TRUNCATE
, fmt
, args
);
1533 OutputDebugString(strBuf
);
1539 Value
*Builder::VEXTRACTI128(Value
* a
, Constant
* imm8
)
1541 #if HAVE_LLVM == 0x306
1543 Intrinsic::getDeclaration(JM()->mpCurrentModule
,
1544 Intrinsic::x86_avx_vextractf128_si_256
);
1545 return CALL(func
, {a
, imm8
});
1547 bool flag
= !imm8
->isZeroValue();
1548 SmallVector
<Constant
*,8> idx
;
1549 for (unsigned i
= 0; i
< mVWidth
/ 2; i
++) {
1550 idx
.push_back(C(flag
? i
+ mVWidth
/ 2 : i
));
1552 return VSHUFFLE(a
, VUNDEF_I(), ConstantVector::get(idx
));
1556 Value
*Builder::VINSERTI128(Value
* a
, Value
* b
, Constant
* imm8
)
1558 #if HAVE_LLVM == 0x306
1560 Intrinsic::getDeclaration(JM()->mpCurrentModule
,
1561 Intrinsic::x86_avx_vinsertf128_si_256
);
1562 return CALL(func
, {a
, b
, imm8
});
1564 bool flag
= !imm8
->isZeroValue();
1565 SmallVector
<Constant
*,8> idx
;
1566 for (unsigned i
= 0; i
< mVWidth
; i
++) {
1567 idx
.push_back(C(i
));
1569 Value
*inter
= VSHUFFLE(b
, VUNDEF_I(), ConstantVector::get(idx
));
1571 SmallVector
<Constant
*,8> idx2
;
1572 for (unsigned i
= 0; i
< mVWidth
/ 2; i
++) {
1573 idx2
.push_back(C(flag
? i
: i
+ mVWidth
));
1575 for (unsigned i
= mVWidth
/ 2; i
< mVWidth
; i
++) {
1576 idx2
.push_back(C(flag
? i
+ mVWidth
/ 2 : i
));
1578 return VSHUFFLE(a
, inter
, ConstantVector::get(idx2
));
1582 // rdtsc buckets macros
1583 void Builder::RDTSC_START(Value
* pBucketMgr
, Value
* pId
)
1585 // @todo due to an issue with thread local storage propagation in llvm, we can only safely call into
1586 // buckets framework when single threaded
1587 if (KNOB_SINGLE_THREADED
)
1589 std::vector
<Type
*> args
{
1590 PointerType::get(mInt32Ty
, 0), // pBucketMgr
1594 FunctionType
* pFuncTy
= FunctionType::get(Type::getVoidTy(JM()->mContext
), args
, false);
1595 Function
* pFunc
= cast
<Function
>(JM()->mpCurrentModule
->getOrInsertFunction("BucketManager_StartBucket", pFuncTy
));
1596 if (sys::DynamicLibrary::SearchForAddressOfSymbol("BucketManager_StartBucket") == nullptr)
1598 sys::DynamicLibrary::AddSymbol("BucketManager_StartBucket", (void*)&BucketManager_StartBucket
);
1601 CALL(pFunc
, { pBucketMgr
, pId
});
1605 void Builder::RDTSC_STOP(Value
* pBucketMgr
, Value
* pId
)
1607 // @todo due to an issue with thread local storage propagation in llvm, we can only safely call into
1608 // buckets framework when single threaded
1609 if (KNOB_SINGLE_THREADED
)
1611 std::vector
<Type
*> args
{
1612 PointerType::get(mInt32Ty
, 0), // pBucketMgr
1616 FunctionType
* pFuncTy
= FunctionType::get(Type::getVoidTy(JM()->mContext
), args
, false);
1617 Function
* pFunc
= cast
<Function
>(JM()->mpCurrentModule
->getOrInsertFunction("BucketManager_StopBucket", pFuncTy
));
1618 if (sys::DynamicLibrary::SearchForAddressOfSymbol("BucketManager_StopBucket") == nullptr)
1620 sys::DynamicLibrary::AddSymbol("BucketManager_StopBucket", (void*)&BucketManager_StopBucket
);
1623 CALL(pFunc
, { pBucketMgr
, pId
});